2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
37 * VIA Rhine fast ethernet PCI NIC driver
39 * Supports various network adapters based on the VIA Rhine
40 * and Rhine II PCI controllers, including the D-Link DFE530TX.
41 * Datasheets are available at http://www.via.com.tw.
43 * Written by Bill Paul <wpaul@ctr.columbia.edu>
44 * Electrical Engineering Department
45 * Columbia University, New York City
49 * The VIA Rhine controllers are similar in some respects to the
50 * the DEC tulip chips, except less complicated. The controller
51 * uses an MII bus and an external physical layer interface. The
52 * receiver has a one entry perfect filter and a 64-bit hash table
53 * multicast filter. Transmit and receive descriptors are similar
56 * The Rhine has a serious flaw in its transmit DMA mechanism:
57 * transmit buffers must be longword aligned. Unfortunately,
58 * FreeBSD doesn't guarantee that mbufs will be filled in starting
59 * at longword boundaries, so we have to do a buffer copy before
63 #ifdef HAVE_KERNEL_OPTION_HEADERS
64 #include "opt_device_polling.h"
67 #include <sys/param.h>
68 #include <sys/systm.h>
69 #include <sys/sockio.h>
71 #include <sys/malloc.h>
72 #include <sys/kernel.h>
73 #include <sys/module.h>
74 #include <sys/socket.h>
77 #include <net/if_arp.h>
78 #include <net/ethernet.h>
79 #include <net/if_dl.h>
80 #include <net/if_media.h>
81 #include <net/if_types.h>
85 #include <vm/vm.h> /* for vtophys */
86 #include <vm/pmap.h> /* for vtophys */
87 #include <machine/bus.h>
88 #include <machine/resource.h>
92 #include <dev/mii/mii.h>
93 #include <dev/mii/miivar.h>
95 #include <dev/pci/pcireg.h>
96 #include <dev/pci/pcivar.h>
100 #include <pci/if_vrreg.h>
102 MODULE_DEPEND(vr, pci, 1, 1, 1);
103 MODULE_DEPEND(vr, ether, 1, 1, 1);
104 MODULE_DEPEND(vr, miibus, 1, 1, 1);
106 /* "device miibus" required. See GENERIC if you get errors here. */
107 #include "miibus_if.h"
112 * Various supported device vendors/types and their names.
114 static struct vr_type vr_devs[] = {
115 { VIA_VENDORID, VIA_DEVICEID_RHINE,
116 "VIA VT3043 Rhine I 10/100BaseTX" },
117 { VIA_VENDORID, VIA_DEVICEID_RHINE_II,
118 "VIA VT86C100A Rhine II 10/100BaseTX" },
119 { VIA_VENDORID, VIA_DEVICEID_RHINE_II_2,
120 "VIA VT6102 Rhine II 10/100BaseTX" },
121 { VIA_VENDORID, VIA_DEVICEID_RHINE_III,
122 "VIA VT6105 Rhine III 10/100BaseTX" },
123 { VIA_VENDORID, VIA_DEVICEID_RHINE_III_M,
124 "VIA VT6105M Rhine III 10/100BaseTX" },
125 { DELTA_VENDORID, DELTA_DEVICEID_RHINE_II,
126 "Delta Electronics Rhine II 10/100BaseTX" },
127 { ADDTRON_VENDORID, ADDTRON_DEVICEID_RHINE_II,
128 "Addtron Technology Rhine II 10/100BaseTX" },
132 static int vr_probe(device_t);
133 static int vr_attach(device_t);
134 static int vr_detach(device_t);
136 static int vr_newbuf(struct vr_softc *, struct vr_chain_onefrag *,
138 static int vr_encap(struct vr_softc *, struct vr_chain *, struct mbuf * );
140 static void vr_rxeof(struct vr_softc *);
141 static void vr_rxeoc(struct vr_softc *);
142 static void vr_txeof(struct vr_softc *);
143 static void vr_tick(void *);
144 static void vr_intr(void *);
145 static void vr_start(struct ifnet *);
146 static void vr_start_locked(struct ifnet *);
147 static int vr_ioctl(struct ifnet *, u_long, caddr_t);
148 static void vr_init(void *);
149 static void vr_init_locked(struct vr_softc *);
150 static void vr_stop(struct vr_softc *);
151 static void vr_watchdog(struct ifnet *);
152 static void vr_shutdown(device_t);
153 static int vr_ifmedia_upd(struct ifnet *);
154 static void vr_ifmedia_sts(struct ifnet *, struct ifmediareq *);
157 static void vr_mii_sync(struct vr_softc *);
158 static void vr_mii_send(struct vr_softc *, uint32_t, int);
160 static int vr_mii_readreg(struct vr_softc *, struct vr_mii_frame *);
161 static int vr_mii_writereg(struct vr_softc *, struct vr_mii_frame *);
162 static int vr_miibus_readreg(device_t, uint16_t, uint16_t);
163 static int vr_miibus_writereg(device_t, uint16_t, uint16_t, uint16_t);
164 static void vr_miibus_statchg(device_t);
166 static void vr_setcfg(struct vr_softc *, int);
167 static void vr_setmulti(struct vr_softc *);
168 static void vr_reset(struct vr_softc *);
169 static int vr_list_rx_init(struct vr_softc *);
170 static int vr_list_tx_init(struct vr_softc *);
173 #define VR_RES SYS_RES_IOPORT
174 #define VR_RID VR_PCI_LOIO
176 #define VR_RES SYS_RES_MEMORY
177 #define VR_RID VR_PCI_LOMEM
180 static device_method_t vr_methods[] = {
181 /* Device interface */
182 DEVMETHOD(device_probe, vr_probe),
183 DEVMETHOD(device_attach, vr_attach),
184 DEVMETHOD(device_detach, vr_detach),
185 DEVMETHOD(device_shutdown, vr_shutdown),
188 DEVMETHOD(bus_print_child, bus_generic_print_child),
189 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
192 DEVMETHOD(miibus_readreg, vr_miibus_readreg),
193 DEVMETHOD(miibus_writereg, vr_miibus_writereg),
194 DEVMETHOD(miibus_statchg, vr_miibus_statchg),
199 static driver_t vr_driver = {
202 sizeof(struct vr_softc)
205 static devclass_t vr_devclass;
207 DRIVER_MODULE(vr, pci, vr_driver, vr_devclass, 0, 0);
208 DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0);
210 #define VR_SETBIT(sc, reg, x) \
211 CSR_WRITE_1(sc, reg, \
212 CSR_READ_1(sc, reg) | (x))
214 #define VR_CLRBIT(sc, reg, x) \
215 CSR_WRITE_1(sc, reg, \
216 CSR_READ_1(sc, reg) & ~(x))
218 #define VR_SETBIT16(sc, reg, x) \
219 CSR_WRITE_2(sc, reg, \
220 CSR_READ_2(sc, reg) | (x))
222 #define VR_CLRBIT16(sc, reg, x) \
223 CSR_WRITE_2(sc, reg, \
224 CSR_READ_2(sc, reg) & ~(x))
226 #define VR_SETBIT32(sc, reg, x) \
227 CSR_WRITE_4(sc, reg, \
228 CSR_READ_4(sc, reg) | (x))
230 #define VR_CLRBIT32(sc, reg, x) \
231 CSR_WRITE_4(sc, reg, \
232 CSR_READ_4(sc, reg) & ~(x))
235 CSR_WRITE_1(sc, VR_MIICMD, \
236 CSR_READ_1(sc, VR_MIICMD) | (x))
239 CSR_WRITE_1(sc, VR_MIICMD, \
240 CSR_READ_1(sc, VR_MIICMD) & ~(x))
244 * Sync the PHYs by setting data bit and strobing the clock 32 times.
247 vr_mii_sync(struct vr_softc *sc)
251 SIO_SET(VR_MIICMD_DIR|VR_MIICMD_DATAIN);
253 for (i = 0; i < 32; i++) {
254 SIO_SET(VR_MIICMD_CLK);
256 SIO_CLR(VR_MIICMD_CLK);
262 * Clock a series of bits through the MII.
265 vr_mii_send(struct vr_softc *sc, uint32_t bits, int cnt)
269 SIO_CLR(VR_MIICMD_CLK);
271 for (i = (0x1 << (cnt - 1)); i; i >>= 1) {
273 SIO_SET(VR_MIICMD_DATAIN);
275 SIO_CLR(VR_MIICMD_DATAIN);
278 SIO_CLR(VR_MIICMD_CLK);
280 SIO_SET(VR_MIICMD_CLK);
286 * Read an PHY register through the MII.
289 vr_mii_readreg(struct vr_softc *sc, struct vr_mii_frame *frame)
294 /* Set up frame for RX. */
295 frame->mii_stdelim = VR_MII_STARTDELIM;
296 frame->mii_opcode = VR_MII_READOP;
297 frame->mii_turnaround = 0;
300 CSR_WRITE_1(sc, VR_MIICMD, 0);
301 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
303 /* Turn on data xmit. */
304 SIO_SET(VR_MIICMD_DIR);
308 /* Send command/address info. */
309 vr_mii_send(sc, frame->mii_stdelim, 2);
310 vr_mii_send(sc, frame->mii_opcode, 2);
311 vr_mii_send(sc, frame->mii_phyaddr, 5);
312 vr_mii_send(sc, frame->mii_regaddr, 5);
315 SIO_CLR((VR_MIICMD_CLK|VR_MIICMD_DATAIN));
317 SIO_SET(VR_MIICMD_CLK);
321 SIO_CLR(VR_MIICMD_DIR);
324 SIO_CLR(VR_MIICMD_CLK);
326 ack = CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT;
327 SIO_SET(VR_MIICMD_CLK);
331 * Now try reading data bits. If the ack failed, we still
332 * need to clock through 16 cycles to keep the PHY(s) in sync.
335 for(i = 0; i < 16; i++) {
336 SIO_CLR(VR_MIICMD_CLK);
338 SIO_SET(VR_MIICMD_CLK);
344 for (i = 0x8000; i; i >>= 1) {
345 SIO_CLR(VR_MIICMD_CLK);
348 if (CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT)
349 frame->mii_data |= i;
352 SIO_SET(VR_MIICMD_CLK);
357 SIO_CLR(VR_MIICMD_CLK);
359 SIO_SET(VR_MIICMD_CLK);
370 /* Set the PHY address. */
371 CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)|
374 /* Set the register address. */
375 CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr);
376 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_READ_ENB);
378 for (i = 0; i < 10000; i++) {
379 if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_READ_ENB) == 0)
383 frame->mii_data = CSR_READ_2(sc, VR_MIIDATA);
391 * Write to a PHY register through the MII.
394 vr_mii_writereg(struct vr_softc *sc, struct vr_mii_frame *frame)
397 CSR_WRITE_1(sc, VR_MIICMD, 0);
398 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
400 /* Set up frame for TX. */
401 frame->mii_stdelim = VR_MII_STARTDELIM;
402 frame->mii_opcode = VR_MII_WRITEOP;
403 frame->mii_turnaround = VR_MII_TURNAROUND;
405 /* Turn on data output. */
406 SIO_SET(VR_MIICMD_DIR);
410 vr_mii_send(sc, frame->mii_stdelim, 2);
411 vr_mii_send(sc, frame->mii_opcode, 2);
412 vr_mii_send(sc, frame->mii_phyaddr, 5);
413 vr_mii_send(sc, frame->mii_regaddr, 5);
414 vr_mii_send(sc, frame->mii_turnaround, 2);
415 vr_mii_send(sc, frame->mii_data, 16);
418 SIO_SET(VR_MIICMD_CLK);
420 SIO_CLR(VR_MIICMD_CLK);
424 SIO_CLR(VR_MIICMD_DIR);
432 /* Set the PHY address. */
433 CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)|
436 /* Set the register address and data to write. */
437 CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr);
438 CSR_WRITE_2(sc, VR_MIIDATA, frame->mii_data);
440 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_WRITE_ENB);
442 for (i = 0; i < 10000; i++) {
443 if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_WRITE_ENB) == 0)
453 vr_miibus_readreg(device_t dev, uint16_t phy, uint16_t reg)
455 struct vr_mii_frame frame;
456 struct vr_softc *sc = device_get_softc(dev);
458 switch (sc->vr_revid) {
459 case REV_ID_VT6102_APOLLO:
468 bzero((char *)&frame, sizeof(frame));
469 frame.mii_phyaddr = phy;
470 frame.mii_regaddr = reg;
471 vr_mii_readreg(sc, &frame);
474 return (frame.mii_data);
478 vr_miibus_writereg(device_t dev, uint16_t phy, uint16_t reg, uint16_t data)
480 struct vr_mii_frame frame;
481 struct vr_softc *sc = device_get_softc(dev);
483 switch (sc->vr_revid) {
484 case REV_ID_VT6102_APOLLO:
491 bzero((char *)&frame, sizeof(frame));
492 frame.mii_phyaddr = phy;
493 frame.mii_regaddr = reg;
494 frame.mii_data = data;
495 vr_mii_writereg(sc, &frame);
501 vr_miibus_statchg(device_t dev)
503 struct mii_data *mii;
504 struct vr_softc *sc = device_get_softc(dev);
506 mii = device_get_softc(sc->vr_miibus);
507 vr_setcfg(sc, mii->mii_media_active);
511 * Program the 64-bit multicast hash filter.
514 vr_setmulti(struct vr_softc *sc)
516 struct ifnet *ifp = sc->vr_ifp;
518 uint32_t hashes[2] = { 0, 0 };
519 struct ifmultiaddr *ifma;
525 rxfilt = CSR_READ_1(sc, VR_RXCFG);
527 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
528 rxfilt |= VR_RXCFG_RX_MULTI;
529 CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
530 CSR_WRITE_4(sc, VR_MAR0, 0xFFFFFFFF);
531 CSR_WRITE_4(sc, VR_MAR1, 0xFFFFFFFF);
535 /* First, zero out all the existing hash bits. */
536 CSR_WRITE_4(sc, VR_MAR0, 0);
537 CSR_WRITE_4(sc, VR_MAR1, 0);
539 /* Now program new ones. */
541 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
542 if (ifma->ifma_addr->sa_family != AF_LINK)
544 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
545 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
547 hashes[0] |= (1 << h);
549 hashes[1] |= (1 << (h - 32));
555 rxfilt |= VR_RXCFG_RX_MULTI;
557 rxfilt &= ~VR_RXCFG_RX_MULTI;
559 CSR_WRITE_4(sc, VR_MAR0, hashes[0]);
560 CSR_WRITE_4(sc, VR_MAR1, hashes[1]);
561 CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
565 * In order to fiddle with the
566 * 'full-duplex' and '100Mbps' bits in the netconfig register, we
567 * first have to put the transmit and/or receive logic in the idle state.
570 vr_setcfg(struct vr_softc *sc, int media)
576 if (CSR_READ_2(sc, VR_COMMAND) & (VR_CMD_TX_ON|VR_CMD_RX_ON)) {
578 VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_TX_ON|VR_CMD_RX_ON));
581 if ((media & IFM_GMASK) == IFM_FDX)
582 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
584 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
587 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON|VR_CMD_RX_ON);
591 vr_reset(struct vr_softc *sc)
595 /*VR_LOCK_ASSERT(sc);*/ /* XXX: Called during attach w/o lock. */
597 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RESET);
599 for (i = 0; i < VR_TIMEOUT; i++) {
601 if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET))
604 if (i == VR_TIMEOUT) {
605 if (sc->vr_revid < REV_ID_VT3065_A)
606 if_printf(sc->vr_ifp, "reset never completed!\n");
608 /* Use newer force reset command */
609 if_printf(sc->vr_ifp, "Using force reset command.\n");
610 VR_SETBIT(sc, VR_MISC_CR1, VR_MISCCR1_FORSRST);
614 /* Wait a little while for the chip to get its brains in order. */
619 * Probe for a VIA Rhine chip. Check the PCI vendor and device
620 * IDs against our list and return a device name if we find a match.
623 vr_probe(device_t dev)
625 struct vr_type *t = vr_devs;
627 while (t->vr_name != NULL) {
628 if ((pci_get_vendor(dev) == t->vr_vid) &&
629 (pci_get_device(dev) == t->vr_did)) {
630 device_set_desc(dev, t->vr_name);
631 return (BUS_PROBE_DEFAULT);
640 * Attach the interface. Allocate softc structures, do ifmedia
641 * setup and ethernet/BPF attach.
648 u_char eaddr[ETHER_ADDR_LEN];
651 int unit, error = 0, rid;
653 sc = device_get_softc(dev);
654 unit = device_get_unit(dev);
656 mtx_init(&sc->vr_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
658 callout_init_mtx(&sc->vr_stat_callout, &sc->vr_mtx, 0);
661 * Map control/status registers.
663 pci_enable_busmaster(dev);
664 sc->vr_revid = pci_read_config(dev, VR_PCI_REVID, 4) & 0x000000FF;
667 sc->vr_res = bus_alloc_resource_any(dev, VR_RES, &rid, RF_ACTIVE);
669 if (sc->vr_res == NULL) {
670 device_printf(dev, "couldn't map ports/memory\n");
675 sc->vr_btag = rman_get_bustag(sc->vr_res);
676 sc->vr_bhandle = rman_get_bushandle(sc->vr_res);
678 /* Allocate interrupt */
680 sc->vr_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
681 RF_SHAREABLE | RF_ACTIVE);
683 if (sc->vr_irq == NULL) {
684 device_printf(dev, "couldn't map interrupt\n");
689 /* Allocate ifnet structure. */
690 ifp = sc->vr_ifp = if_alloc(IFT_ETHER);
692 device_printf(dev, "can not if_alloc()\n");
697 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
698 ifp->if_mtu = ETHERMTU;
699 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
700 ifp->if_ioctl = vr_ioctl;
701 ifp->if_start = vr_start;
702 ifp->if_watchdog = vr_watchdog;
703 ifp->if_init = vr_init;
704 IFQ_SET_MAXLEN(&ifp->if_snd, VR_TX_LIST_CNT - 1);
705 ifp->if_snd.ifq_maxlen = VR_TX_LIST_CNT - 1;
706 IFQ_SET_READY(&ifp->if_snd);
707 ifp->if_capenable = ifp->if_capabilities;
708 #ifdef DEVICE_POLLING
709 ifp->if_capabilities |= IFCAP_POLLING;
713 * Windows may put the chip in suspend mode when it
714 * shuts down. Be sure to kick it in the head to wake it
717 VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));
719 /* Reset the adapter. */
723 * Turn on bit2 (MIION) in PCI configuration register 0x53 during
724 * initialization and disable AUTOPOLL.
726 pci_write_config(dev, VR_PCI_MODE,
727 pci_read_config(dev, VR_PCI_MODE, 4) | (VR_MODE3_MIION << 24), 4);
728 VR_CLRBIT(sc, VR_MIICMD, VR_MIICMD_AUTOPOLL);
731 * Get station address. The way the Rhine chips work,
732 * you're not allowed to directly access the EEPROM once
733 * they've been programmed a special way. Consequently,
734 * we need to read the node address from the PAR0 and PAR1
737 VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD);
739 for (i = 0; i < ETHER_ADDR_LEN; i++)
740 eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i);
742 sc->vr_ldata = contigmalloc(sizeof(struct vr_list_data), M_DEVBUF,
743 M_NOWAIT | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0);
745 if (sc->vr_ldata == NULL) {
746 device_printf(dev, "no memory for list buffers!\n");
752 if (mii_phy_probe(dev, &sc->vr_miibus,
753 vr_ifmedia_upd, vr_ifmedia_sts)) {
754 device_printf(dev, "MII without any phy!\n");
759 /* Call MI attach routine. */
760 ether_ifattach(ifp, eaddr);
764 /* Hook interrupt last to avoid having to lock softc */
765 error = bus_setup_intr(dev, sc->vr_irq, INTR_TYPE_NET | INTR_MPSAFE,
766 vr_intr, sc, &sc->vr_intrhand);
769 device_printf(dev, "couldn't set up irq\n");
782 * Shutdown hardware and free up resources. This can be called any
783 * time after the mutex has been initialized. It is called in both
784 * the error case in attach and the normal detach case so it needs
785 * to be careful about only freeing resources that have actually been
789 vr_detach(device_t dev)
791 struct vr_softc *sc = device_get_softc(dev);
792 struct ifnet *ifp = sc->vr_ifp;
794 KASSERT(mtx_initialized(&sc->vr_mtx), ("vr mutex not initialized"));
796 #ifdef DEVICE_POLLING
797 if (ifp->if_capenable & IFCAP_POLLING)
798 ether_poll_deregister(ifp);
801 /* These should only be active if attach succeeded */
802 if (device_is_attached(dev)) {
807 callout_drain(&sc->vr_stat_callout);
811 device_delete_child(dev, sc->vr_miibus);
812 bus_generic_detach(dev);
815 bus_teardown_intr(dev, sc->vr_irq, sc->vr_intrhand);
817 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vr_irq);
819 bus_release_resource(dev, VR_RES, VR_RID, sc->vr_res);
825 contigfree(sc->vr_ldata, sizeof(struct vr_list_data), M_DEVBUF);
827 mtx_destroy(&sc->vr_mtx);
833 * Initialize the transmit descriptors.
836 vr_list_tx_init(struct vr_softc *sc)
838 struct vr_chain_data *cd;
839 struct vr_list_data *ld;
844 for (i = 0; i < VR_TX_LIST_CNT; i++) {
845 cd->vr_tx_chain[i].vr_ptr = &ld->vr_tx_list[i];
846 if (i == (VR_TX_LIST_CNT - 1))
847 cd->vr_tx_chain[i].vr_nextdesc =
850 cd->vr_tx_chain[i].vr_nextdesc =
851 &cd->vr_tx_chain[i + 1];
853 cd->vr_tx_cons = cd->vr_tx_prod = &cd->vr_tx_chain[0];
860 * Initialize the RX descriptors and allocate mbufs for them. Note that
861 * we arrange the descriptors in a closed ring, so that the last descriptor
862 * points back to the first.
865 vr_list_rx_init(struct vr_softc *sc)
867 struct vr_chain_data *cd;
868 struct vr_list_data *ld;
876 for (i = 0; i < VR_RX_LIST_CNT; i++) {
877 cd->vr_rx_chain[i].vr_ptr =
878 (struct vr_desc *)&ld->vr_rx_list[i];
879 if (vr_newbuf(sc, &cd->vr_rx_chain[i], NULL) == ENOBUFS)
881 if (i == (VR_RX_LIST_CNT - 1)) {
882 cd->vr_rx_chain[i].vr_nextdesc =
884 ld->vr_rx_list[i].vr_next =
885 vtophys(&ld->vr_rx_list[0]);
887 cd->vr_rx_chain[i].vr_nextdesc =
888 &cd->vr_rx_chain[i + 1];
889 ld->vr_rx_list[i].vr_next =
890 vtophys(&ld->vr_rx_list[i + 1]);
894 cd->vr_rx_head = &cd->vr_rx_chain[0];
900 * Initialize an RX descriptor and attach an MBUF cluster.
901 * Note: the length fields are only 11 bits wide, which means the
902 * largest size we can specify is 2047. This is important because
903 * MCLBYTES is 2048, so we have to subtract one otherwise we'll
904 * overflow the field and make a mess.
907 vr_newbuf(struct vr_softc *sc, struct vr_chain_onefrag *c, struct mbuf *m)
909 struct mbuf *m_new = NULL;
912 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
916 MCLGET(m_new, M_DONTWAIT);
917 if (!(m_new->m_flags & M_EXT)) {
921 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
924 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
925 m_new->m_data = m_new->m_ext.ext_buf;
928 m_adj(m_new, sizeof(uint64_t));
931 c->vr_ptr->vr_status = VR_RXSTAT;
932 c->vr_ptr->vr_data = vtophys(mtod(m_new, caddr_t));
933 c->vr_ptr->vr_ctl = VR_RXCTL | VR_RXLEN;
939 * A frame has been uploaded: pass the resulting mbuf chain up to
940 * the higher level protocols.
943 vr_rxeof(struct vr_softc *sc)
947 struct vr_chain_onefrag *cur_rx;
954 while (!((rxstat = sc->vr_cdata.vr_rx_head->vr_ptr->vr_status) &
956 #ifdef DEVICE_POLLING
957 if (ifp->if_capenable & IFCAP_POLLING) {
958 if (sc->rxcycles <= 0)
964 cur_rx = sc->vr_cdata.vr_rx_head;
965 sc->vr_cdata.vr_rx_head = cur_rx->vr_nextdesc;
969 * If an error occurs, update stats, clear the
970 * status word and leave the mbuf cluster in place:
971 * it should simply get re-used next time this descriptor
972 * comes up in the ring.
974 if (rxstat & VR_RXSTAT_RXERR) {
976 if_printf(ifp, "rx error (%02x):", rxstat & 0x000000ff);
977 if (rxstat & VR_RXSTAT_CRCERR)
978 printf(" crc error");
979 if (rxstat & VR_RXSTAT_FRAMEALIGNERR)
980 printf(" frame alignment error\n");
981 if (rxstat & VR_RXSTAT_FIFOOFLOW)
982 printf(" FIFO overflow");
983 if (rxstat & VR_RXSTAT_GIANT)
984 printf(" received giant packet");
985 if (rxstat & VR_RXSTAT_RUNT)
986 printf(" received runt packet");
987 if (rxstat & VR_RXSTAT_BUSERR)
988 printf(" system bus error");
989 if (rxstat & VR_RXSTAT_BUFFERR)
990 printf("rx buffer error");
992 vr_newbuf(sc, cur_rx, m);
996 /* No errors; receive the packet. */
997 total_len = VR_RXBYTES(cur_rx->vr_ptr->vr_status);
1000 * XXX The VIA Rhine chip includes the CRC with every
1001 * received frame, and there's no way to turn this
1002 * behavior off (at least, I can't find anything in
1003 * the manual that explains how to do it) so we have
1004 * to trim off the CRC manually.
1006 total_len -= ETHER_CRC_LEN;
1008 m0 = m_devget(mtod(m, char *), total_len, ETHER_ALIGN, ifp,
1010 vr_newbuf(sc, cur_rx, m);
1019 (*ifp->if_input)(ifp, m);
1025 vr_rxeoc(struct vr_softc *sc)
1027 struct ifnet *ifp = sc->vr_ifp;
1034 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
1037 /* Wait for receiver to stop */
1039 i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RX_ON);
1045 if_printf(ifp, "rx shutdown error!\n");
1046 sc->vr_flags |= VR_F_RESTART;
1052 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr));
1053 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
1054 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_GO);
1058 * A frame was downloaded to the chip. It's safe for us to clean up
1062 vr_txeof(struct vr_softc *sc)
1064 struct vr_chain *cur_tx;
1065 struct ifnet *ifp = sc->vr_ifp;
1070 * Go through our tx list and free mbufs for those
1071 * frames that have been transmitted.
1073 cur_tx = sc->vr_cdata.vr_tx_cons;
1074 while (cur_tx->vr_mbuf != NULL) {
1078 txstat = cur_tx->vr_ptr->vr_status;
1080 if ((txstat & VR_TXSTAT_ABRT) ||
1081 (txstat & VR_TXSTAT_UDF)) {
1083 i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_TX_ON);
1085 ; /* Wait for chip to shutdown */
1087 if_printf(ifp, "tx shutdown timeout\n");
1088 sc->vr_flags |= VR_F_RESTART;
1091 VR_TXOWN(cur_tx) = VR_TXSTAT_OWN;
1092 CSR_WRITE_4(sc, VR_TXADDR, vtophys(cur_tx->vr_ptr));
1096 if (txstat & VR_TXSTAT_OWN)
1099 if (txstat & VR_TXSTAT_ERRSUM) {
1101 if (txstat & VR_TXSTAT_DEFER)
1102 ifp->if_collisions++;
1103 if (txstat & VR_TXSTAT_LATECOLL)
1104 ifp->if_collisions++;
1107 ifp->if_collisions +=(txstat & VR_TXSTAT_COLLCNT) >> 3;
1110 m_freem(cur_tx->vr_mbuf);
1111 cur_tx->vr_mbuf = NULL;
1112 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1114 cur_tx = cur_tx->vr_nextdesc;
1116 sc->vr_cdata.vr_tx_cons = cur_tx;
1117 if (cur_tx->vr_mbuf == NULL)
1124 struct vr_softc *sc = xsc;
1125 struct mii_data *mii;
1129 if (sc->vr_flags & VR_F_RESTART) {
1130 if_printf(sc->vr_ifp, "restarting\n");
1134 sc->vr_flags &= ~VR_F_RESTART;
1137 mii = device_get_softc(sc->vr_miibus);
1139 callout_reset(&sc->vr_stat_callout, hz, vr_tick, sc);
1142 #ifdef DEVICE_POLLING
1143 static poll_handler_t vr_poll;
1144 static poll_handler_t vr_poll_locked;
1147 vr_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1149 struct vr_softc *sc = ifp->if_softc;
1152 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1153 vr_poll_locked(ifp, cmd, count);
1158 vr_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count)
1160 struct vr_softc *sc = ifp->if_softc;
1164 sc->rxcycles = count;
1167 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1168 vr_start_locked(ifp);
1170 if (cmd == POLL_AND_CHECK_STATUS) {
1173 /* Also check status register. */
1174 status = CSR_READ_2(sc, VR_ISR);
1176 CSR_WRITE_2(sc, VR_ISR, status);
1178 if ((status & VR_INTRS) == 0)
1181 if (status & VR_ISR_RX_DROPPED) {
1182 if_printf(ifp, "rx packet lost\n");
1186 if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) ||
1187 (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW)) {
1188 if_printf(ifp, "receive error (%04x)", status);
1189 if (status & VR_ISR_RX_NOBUF)
1190 printf(" no buffers");
1191 if (status & VR_ISR_RX_OFLOW)
1192 printf(" overflow");
1193 if (status & VR_ISR_RX_DROPPED)
1194 printf(" packet lost");
1199 if ((status & VR_ISR_BUSERR) ||
1200 (status & VR_ISR_TX_UNDERRUN)) {
1206 if ((status & VR_ISR_UDFI) ||
1207 (status & VR_ISR_TX_ABRT2) ||
1208 (status & VR_ISR_TX_ABRT)) {
1210 if (sc->vr_cdata.vr_tx_cons->vr_mbuf != NULL) {
1211 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON);
1212 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_GO);
1217 #endif /* DEVICE_POLLING */
1222 struct vr_softc *sc = arg;
1223 struct ifnet *ifp = sc->vr_ifp;
1228 if (sc->suspended) {
1230 * Forcibly disable interrupts.
1231 * XXX: Mobile VIA based platforms may need
1232 * interrupt re-enable on resume.
1234 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1238 #ifdef DEVICE_POLLING
1239 if (ifp->if_capenable & IFCAP_POLLING)
1243 /* Suppress unwanted interrupts. */
1244 if (!(ifp->if_flags & IFF_UP)) {
1249 /* Disable interrupts. */
1250 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1253 status = CSR_READ_2(sc, VR_ISR);
1255 CSR_WRITE_2(sc, VR_ISR, status);
1257 if ((status & VR_INTRS) == 0)
1260 if (status & VR_ISR_RX_OK)
1263 if (status & VR_ISR_RX_DROPPED) {
1264 if_printf(ifp, "rx packet lost\n");
1268 if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) ||
1269 (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW)) {
1270 if_printf(ifp, "receive error (%04x)", status);
1271 if (status & VR_ISR_RX_NOBUF)
1272 printf(" no buffers");
1273 if (status & VR_ISR_RX_OFLOW)
1274 printf(" overflow");
1275 if (status & VR_ISR_RX_DROPPED)
1276 printf(" packet lost");
1281 if ((status & VR_ISR_BUSERR) || (status & VR_ISR_TX_UNDERRUN)) {
1287 if ((status & VR_ISR_TX_OK) || (status & VR_ISR_TX_ABRT) ||
1288 (status & VR_ISR_TX_ABRT2) || (status & VR_ISR_UDFI)) {
1290 if ((status & VR_ISR_UDFI) ||
1291 (status & VR_ISR_TX_ABRT2) ||
1292 (status & VR_ISR_TX_ABRT)) {
1294 if (sc->vr_cdata.vr_tx_cons->vr_mbuf != NULL) {
1295 VR_SETBIT16(sc, VR_COMMAND,
1297 VR_SETBIT16(sc, VR_COMMAND,
1304 /* Re-enable interrupts. */
1305 CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
1307 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1308 vr_start_locked(ifp);
1315 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1316 * pointers to the fragment pointers.
1319 vr_encap(struct vr_softc *sc, struct vr_chain *c, struct mbuf *m_head)
1321 struct vr_desc *f = NULL;
1326 * The VIA Rhine wants packet buffers to be longword
1327 * aligned, but very often our mbufs aren't. Rather than
1328 * waste time trying to decide when to copy and when not
1329 * to copy, just do it all the time.
1331 m = m_defrag(m_head, M_DONTWAIT);
1336 * The Rhine chip doesn't auto-pad, so we have to make
1337 * sure to pad short frames out to the minimum frame length
1340 if (m->m_len < VR_MIN_FRAMELEN) {
1341 m->m_pkthdr.len += VR_MIN_FRAMELEN - m->m_len;
1342 m->m_len = m->m_pkthdr.len;
1347 f->vr_data = vtophys(mtod(m, caddr_t));
1348 f->vr_ctl = m->m_len;
1349 f->vr_ctl |= VR_TXCTL_TLINK|VR_TXCTL_FIRSTFRAG;
1351 f->vr_ctl |= VR_TXCTL_LASTFRAG|VR_TXCTL_FINT;
1352 f->vr_next = vtophys(c->vr_nextdesc->vr_ptr);
1358 * Main transmit routine. To avoid having to do mbuf copies, we put pointers
1359 * to the mbuf data regions directly in the transmit lists. We also save a
1360 * copy of the pointers since the transmit list fragment pointers are
1361 * physical addresses.
1365 vr_start(struct ifnet *ifp)
1367 struct vr_softc *sc = ifp->if_softc;
1370 vr_start_locked(ifp);
1375 vr_start_locked(struct ifnet *ifp)
1377 struct vr_softc *sc = ifp->if_softc;
1378 struct mbuf *m_head;
1379 struct vr_chain *cur_tx;
1381 if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
1384 cur_tx = sc->vr_cdata.vr_tx_prod;
1385 while (cur_tx->vr_mbuf == NULL) {
1386 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
1390 /* Pack the data into the descriptor. */
1391 if (vr_encap(sc, cur_tx, m_head)) {
1392 /* Rollback, send what we were able to encap. */
1393 IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
1397 VR_TXOWN(cur_tx) = VR_TXSTAT_OWN;
1400 * If there's a BPF listener, bounce a copy of this frame
1403 BPF_MTAP(ifp, cur_tx->vr_mbuf);
1405 cur_tx = cur_tx->vr_nextdesc;
1407 if (cur_tx != sc->vr_cdata.vr_tx_prod || cur_tx->vr_mbuf != NULL) {
1408 sc->vr_cdata.vr_tx_prod = cur_tx;
1410 /* Tell the chip to start transmitting. */
1411 VR_SETBIT16(sc, VR_COMMAND, /*VR_CMD_TX_ON|*/ VR_CMD_TX_GO);
1413 /* Set a timeout in case the chip goes out to lunch. */
1416 if (cur_tx->vr_mbuf != NULL)
1417 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1424 struct vr_softc *sc = xsc;
1432 vr_init_locked(struct vr_softc *sc)
1434 struct ifnet *ifp = sc->vr_ifp;
1435 struct mii_data *mii;
1440 mii = device_get_softc(sc->vr_miibus);
1442 /* Cancel pending I/O and free all RX/TX buffers. */
1446 /* Set our station address. */
1447 for (i = 0; i < ETHER_ADDR_LEN; i++)
1448 CSR_WRITE_1(sc, VR_PAR0 + i, IF_LLADDR(sc->vr_ifp)[i]);
1451 VR_CLRBIT(sc, VR_BCR0, VR_BCR0_DMA_LENGTH);
1452 VR_SETBIT(sc, VR_BCR0, VR_BCR0_DMA_STORENFWD);
1455 * BCR0 and BCR1 can override the RXCFG and TXCFG registers,
1456 * so we must set both.
1458 VR_CLRBIT(sc, VR_BCR0, VR_BCR0_RX_THRESH);
1459 VR_SETBIT(sc, VR_BCR0, VR_BCR0_RXTHRESH128BYTES);
1461 VR_CLRBIT(sc, VR_BCR1, VR_BCR1_TX_THRESH);
1462 VR_SETBIT(sc, VR_BCR1, VR_BCR1_TXTHRESHSTORENFWD);
1464 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_THRESH);
1465 VR_SETBIT(sc, VR_RXCFG, VR_RXTHRESH_128BYTES);
1467 VR_CLRBIT(sc, VR_TXCFG, VR_TXCFG_TX_THRESH);
1468 VR_SETBIT(sc, VR_TXCFG, VR_TXTHRESH_STORENFWD);
1470 /* Init circular RX list. */
1471 if (vr_list_rx_init(sc) == ENOBUFS) {
1473 "initialization failed: no memory for rx buffers\n");
1478 /* Init tx descriptors. */
1479 vr_list_tx_init(sc);
1481 /* If we want promiscuous mode, set the allframes bit. */
1482 if (ifp->if_flags & IFF_PROMISC)
1483 VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC);
1485 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC);
1487 /* Set capture broadcast bit to capture broadcast frames. */
1488 if (ifp->if_flags & IFF_BROADCAST)
1489 VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD);
1491 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD);
1494 * Program the multicast filter, if necessary.
1499 * Load the address of the RX list.
1501 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr));
1503 /* Enable receiver and transmitter. */
1504 CSR_WRITE_2(sc, VR_COMMAND, VR_CMD_TX_NOPOLL|VR_CMD_START|
1505 VR_CMD_TX_ON|VR_CMD_RX_ON|
1508 CSR_WRITE_4(sc, VR_TXADDR, vtophys(&sc->vr_ldata->vr_tx_list[0]));
1510 CSR_WRITE_2(sc, VR_ISR, 0xFFFF);
1511 #ifdef DEVICE_POLLING
1513 * Disable interrupts if we are polling.
1515 if (ifp->if_capenable & IFCAP_POLLING)
1516 CSR_WRITE_2(sc, VR_IMR, 0);
1520 * Enable interrupts.
1522 CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
1526 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1527 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1529 callout_reset(&sc->vr_stat_callout, hz, vr_tick, sc);
1533 * Set media options.
1536 vr_ifmedia_upd(struct ifnet *ifp)
1538 struct vr_softc *sc = ifp->if_softc;
1540 if (ifp->if_flags & IFF_UP)
1547 * Report current media status.
1550 vr_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1552 struct vr_softc *sc = ifp->if_softc;
1553 struct mii_data *mii;
1555 mii = device_get_softc(sc->vr_miibus);
1559 ifmr->ifm_active = mii->mii_media_active;
1560 ifmr->ifm_status = mii->mii_media_status;
1564 vr_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1566 struct vr_softc *sc = ifp->if_softc;
1567 struct ifreq *ifr = (struct ifreq *) data;
1568 struct mii_data *mii;
1574 if (ifp->if_flags & IFF_UP) {
1577 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1592 mii = device_get_softc(sc->vr_miibus);
1593 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1596 #ifdef DEVICE_POLLING
1597 if (ifr->ifr_reqcap & IFCAP_POLLING &&
1598 !(ifp->if_capenable & IFCAP_POLLING)) {
1599 error = ether_poll_register(vr_poll, ifp);
1603 /* Disable interrupts */
1604 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1605 ifp->if_capenable |= IFCAP_POLLING;
1610 if (!(ifr->ifr_reqcap & IFCAP_POLLING) &&
1611 ifp->if_capenable & IFCAP_POLLING) {
1612 error = ether_poll_deregister(ifp);
1613 /* Enable interrupts. */
1615 CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
1616 ifp->if_capenable &= ~IFCAP_POLLING;
1620 #endif /* DEVICE_POLLING */
1623 error = ether_ioctl(ifp, command, data);
1631 vr_watchdog(struct ifnet *ifp)
1633 struct vr_softc *sc = ifp->if_softc;
1638 if_printf(ifp, "watchdog timeout\n");
1644 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1645 vr_start_locked(ifp);
1651 * Stop the adapter and free any mbufs allocated to the
1655 vr_stop(struct vr_softc *sc)
1665 callout_stop(&sc->vr_stat_callout);
1666 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1668 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_STOP);
1669 VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_RX_ON|VR_CMD_TX_ON));
1670 CSR_WRITE_2(sc, VR_IMR, 0x0000);
1671 CSR_WRITE_4(sc, VR_TXADDR, 0x00000000);
1672 CSR_WRITE_4(sc, VR_RXADDR, 0x00000000);
1675 * Free data in the RX lists.
1677 for (i = 0; i < VR_RX_LIST_CNT; i++) {
1678 if (sc->vr_cdata.vr_rx_chain[i].vr_mbuf != NULL) {
1679 m_freem(sc->vr_cdata.vr_rx_chain[i].vr_mbuf);
1680 sc->vr_cdata.vr_rx_chain[i].vr_mbuf = NULL;
1683 bzero((char *)&sc->vr_ldata->vr_rx_list,
1684 sizeof(sc->vr_ldata->vr_rx_list));
1687 * Free the TX list buffers.
1689 for (i = 0; i < VR_TX_LIST_CNT; i++) {
1690 if (sc->vr_cdata.vr_tx_chain[i].vr_mbuf != NULL) {
1691 m_freem(sc->vr_cdata.vr_tx_chain[i].vr_mbuf);
1692 sc->vr_cdata.vr_tx_chain[i].vr_mbuf = NULL;
1695 bzero((char *)&sc->vr_ldata->vr_tx_list,
1696 sizeof(sc->vr_ldata->vr_tx_list));
1700 * Stop all chip I/O so that the kernel's probe routines don't
1701 * get confused by errant DMAs when rebooting.
1704 vr_shutdown(device_t dev)