sys/dev/vxge/vxge.c

   1 /*-
   2  * Copyright(c) 2002-2011 Exar Corp.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification are permitted provided the following conditions are met:
   7  *
   8  *    1. Redistributions of source code must retain the above copyright notice,
   9  *       this list of conditions and the following disclaimer.
  10  *
  11  *    2. Redistributions in binary form must reproduce the above copyright
  12  *       notice, this list of conditions and the following disclaimer in the
  13  *       documentation and/or other materials provided with the distribution.
  14  *
  15  *    3. Neither the name of the Exar Corporation nor the names of its
  16  *       contributors may be used to endorse or promote products derived from
  17  *       this software without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31 /*$FreeBSD$*/
  32
  33 #include <dev/vxge/vxge.h>
  34
  35 static int vxge_pci_bd_no = -1;
  36 static u32 vxge_drv_copyright = 0;
  37 static u32 vxge_dev_ref_count = 0;
  38 static u32 vxge_dev_req_reboot = 0;
  39
  40 static int vpath_selector[VXGE_HAL_MAX_VIRTUAL_PATHS] = \
  41 {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
  42
  43 /*
  44  * vxge_probe
  45  * Probes for x3100 devices
  46  */
  47 int
  48 vxge_probe(device_t ndev)
  49 {
  50         int err = ENXIO;
  51
  52         u16 pci_bd_no = 0;
  53         u16 pci_vendor_id = 0;
  54         u16 pci_device_id = 0;
  55
  56         char adapter_name[64];
  57
  58         pci_vendor_id = pci_get_vendor(ndev);
  59         if (pci_vendor_id != VXGE_PCI_VENDOR_ID)
  60                 goto _exit0;
  61
  62         pci_device_id = pci_get_device(ndev);
  63
  64         if (pci_device_id == VXGE_PCI_DEVICE_ID_TITAN_1) {
  65
  66                 pci_bd_no = (pci_get_bus(ndev) | pci_get_slot(ndev));
  67
  68                 snprintf(adapter_name, sizeof(adapter_name),
  69                     VXGE_ADAPTER_NAME, pci_get_revid(ndev));
  70                 device_set_desc_copy(ndev, adapter_name);
  71
  72                 if (!vxge_drv_copyright) {
  73                         device_printf(ndev, VXGE_COPYRIGHT);
  74                         vxge_drv_copyright = 1;
  75                 }
  76
  77                 if (vxge_dev_req_reboot == 0) {
  78                         vxge_pci_bd_no = pci_bd_no;
  79                         err = BUS_PROBE_DEFAULT;
  80                 } else {
  81                         if (pci_bd_no != vxge_pci_bd_no) {
  82                                 vxge_pci_bd_no = pci_bd_no;
  83                                 err = BUS_PROBE_DEFAULT;
  84                         }
  85                 }
  86         }
  87
  88 _exit0:
  89         return (err);
  90 }
  91
  92 /*
  93  * vxge_attach
  94  * Connects driver to the system if probe was success @ndev handle
  95  */
  96 int
  97 vxge_attach(device_t ndev)
  98 {
  99         int err = 0;
 100         vxge_dev_t *vdev;
 101         vxge_hal_device_t *hldev = NULL;
 102         vxge_hal_device_attr_t device_attr;
 103         vxge_free_resources_e error_level = VXGE_FREE_NONE;
 104
 105         vxge_hal_status_e status = VXGE_HAL_OK;
 106
 107         /* Get per-ndev buffer */
 108         vdev = (vxge_dev_t *) device_get_softc(ndev);
 109         if (!vdev)
 110                 goto _exit0;
 111
 112         bzero(vdev, sizeof(vxge_dev_t));
 113
 114         vdev->ndev = ndev;
 115         strlcpy(vdev->ndev_name, "vxge", sizeof(vdev->ndev_name));
 116
 117         err = vxge_driver_config(vdev);
 118         if (err != 0)
 119                 goto _exit0;
 120
 121         /* Initialize HAL driver */
 122         status = vxge_driver_init(vdev);
 123         if (status != VXGE_HAL_OK) {
 124                 device_printf(vdev->ndev, "Failed to initialize driver\n");
 125                 goto _exit0;
 126         }
 127         /* Enable PCI bus-master */
 128         pci_enable_busmaster(ndev);
 129
 130         /* Allocate resources */
 131         err = vxge_alloc_resources(vdev);
 132         if (err != 0) {
 133                 device_printf(vdev->ndev, "resource allocation failed\n");
 134                 goto _exit0;
 135         }
 136
 137         err = vxge_device_hw_info_get(vdev);
 138         if (err != 0) {
 139                 error_level = VXGE_FREE_BAR2;
 140                 goto _exit0;
 141         }
 142
 143         /* Get firmware default values for Device Configuration */
 144         vxge_hal_device_config_default_get(vdev->device_config);
 145
 146         /* Customize Device Configuration based on User request */
 147         vxge_vpath_config(vdev);
 148
 149         /* Allocate ISR resources */
 150         err = vxge_alloc_isr_resources(vdev);
 151         if (err != 0) {
 152                 error_level = VXGE_FREE_ISR_RESOURCE;
 153                 device_printf(vdev->ndev, "isr resource allocation failed\n");
 154                 goto _exit0;
 155         }
 156
 157         /* HAL attributes */
 158         device_attr.bar0 = (u8 *) vdev->pdev->bar_info[0];
 159         device_attr.bar1 = (u8 *) vdev->pdev->bar_info[1];
 160         device_attr.bar2 = (u8 *) vdev->pdev->bar_info[2];
 161         device_attr.regh0 = (vxge_bus_res_t *) vdev->pdev->reg_map[0];
 162         device_attr.regh1 = (vxge_bus_res_t *) vdev->pdev->reg_map[1];
 163         device_attr.regh2 = (vxge_bus_res_t *) vdev->pdev->reg_map[2];
 164         device_attr.irqh = (pci_irq_h) vdev->config.isr_info[0].irq_handle;
 165         device_attr.cfgh = vdev->pdev;
 166         device_attr.pdev = vdev->pdev;
 167
 168         /* Initialize HAL Device */
 169         status = vxge_hal_device_initialize((vxge_hal_device_h *) &hldev,
 170             &device_attr, vdev->device_config);
 171         if (status != VXGE_HAL_OK) {
 172                 error_level = VXGE_FREE_ISR_RESOURCE;
 173                 device_printf(vdev->ndev, "hal device initialization failed\n");
 174                 goto _exit0;
 175         }
 176
 177         vdev->devh = hldev;
 178         vxge_hal_device_private_set(hldev, vdev);
 179
 180         if (vdev->is_privilaged) {
 181                 err = vxge_firmware_verify(vdev);
 182                 if (err != 0) {
 183                         vxge_dev_req_reboot = 1;
 184                         error_level = VXGE_FREE_TERMINATE_DEVICE;
 185                         goto _exit0;
 186                 }
 187         }
 188
 189         /* Allocate memory for vpath */
 190         vdev->vpaths = (vxge_vpath_t *)
 191             vxge_mem_alloc(vdev->no_of_vpath * sizeof(vxge_vpath_t));
 192
 193         if (vdev->vpaths == NULL) {
 194                 error_level = VXGE_FREE_TERMINATE_DEVICE;
 195                 device_printf(vdev->ndev, "vpath memory allocation failed\n");
 196                 goto _exit0;
 197         }
 198
 199         vdev->no_of_func = 1;
 200         if (vdev->is_privilaged) {
 201
 202                 vxge_hal_func_mode_count(vdev->devh,
 203                     vdev->config.hw_info.function_mode, &vdev->no_of_func);
 204
 205                 vxge_bw_priority_config(vdev);
 206         }
 207
 208         /* Initialize mutexes */
 209         vxge_mutex_init(vdev);
 210
 211         /* Initialize Media */
 212         vxge_media_init(vdev);
 213
 214         err = vxge_ifp_setup(ndev);
 215         if (err != 0) {
 216                 error_level = VXGE_FREE_MEDIA;
 217                 device_printf(vdev->ndev, "setting up interface failed\n");
 218                 goto _exit0;
 219         }
 220
 221         err = vxge_isr_setup(vdev);
 222         if (err != 0) {
 223                 error_level = VXGE_FREE_INTERFACE;
 224                 device_printf(vdev->ndev,
 225                     "failed to associate interrupt handler with device\n");
 226                 goto _exit0;
 227         }
 228         vxge_device_hw_info_print(vdev);
 229         vdev->is_active = TRUE;
 230
 231 _exit0:
 232         if (error_level) {
 233                 vxge_free_resources(ndev, error_level);
 234                 err = ENXIO;
 235         }
 236
 237         return (err);
 238 }
 239
 240 /*
 241  * vxge_detach
 242  * Detaches driver from the Kernel subsystem
 243  */
 244 int
 245 vxge_detach(device_t ndev)
 246 {
 247         vxge_dev_t *vdev;
 248
 249         vdev = (vxge_dev_t *) device_get_softc(ndev);
 250         if (vdev->is_active) {
 251                 vdev->is_active = FALSE;
 252                 vxge_stop(vdev);
 253                 vxge_free_resources(ndev, VXGE_FREE_ALL);
 254         }
 255
 256         return (0);
 257 }
 258
 259 /*
 260  * vxge_shutdown
 261  * To shutdown device before system shutdown
 262  */
 263 int
 264 vxge_shutdown(device_t ndev)
 265 {
 266         vxge_dev_t *vdev = (vxge_dev_t *) device_get_softc(ndev);
 267         vxge_stop(vdev);
 268         return (0);
 269 }
 270
 271 /*
 272  * vxge_init
 273  * Initialize the interface
 274  */
 275 void
 276 vxge_init(void *vdev_ptr)
 277 {
 278         vxge_dev_t *vdev = (vxge_dev_t *) vdev_ptr;
 279
 280         VXGE_DRV_LOCK(vdev);
 281         vxge_init_locked(vdev);
 282         VXGE_DRV_UNLOCK(vdev);
 283 }
 284
 285 /*
 286  * vxge_init_locked
 287  * Initialize the interface
 288  */
 289 void
 290 vxge_init_locked(vxge_dev_t *vdev)
 291 {
 292         int i, err = EINVAL;
 293         vxge_hal_device_t *hldev = vdev->devh;
 294         vxge_hal_status_e status = VXGE_HAL_OK;
 295         vxge_hal_vpath_h vpath_handle;
 296
 297         ifnet_t ifp = vdev->ifp;
 298
 299         /* If device is in running state, initializing is not required */
 300         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
 301                 goto _exit0;
 302
 303         VXGE_DRV_LOCK_ASSERT(vdev);
 304
 305         /* Opening vpaths */
 306         err = vxge_vpath_open(vdev);
 307         if (err != 0)
 308                 goto _exit1;
 309
 310         if (vdev->config.rth_enable) {
 311                 status = vxge_rth_config(vdev);
 312                 if (status != VXGE_HAL_OK)
 313                         goto _exit1;
 314         }
 315
 316         for (i = 0; i < vdev->no_of_vpath; i++) {
 317                 vpath_handle = vxge_vpath_handle_get(vdev, i);
 318                 if (!vpath_handle)
 319                         continue;
 320
 321                 /* check initial mtu before enabling the device */
 322                 status = vxge_hal_device_mtu_check(vpath_handle, ifp->if_mtu);
 323                 if (status != VXGE_HAL_OK) {
 324                         device_printf(vdev->ndev,
 325                             "invalid mtu size %u specified\n", ifp->if_mtu);
 326                         goto _exit1;
 327                 }
 328
 329                 status = vxge_hal_vpath_mtu_set(vpath_handle, ifp->if_mtu);
 330                 if (status != VXGE_HAL_OK) {
 331                         device_printf(vdev->ndev,
 332                             "setting mtu in device failed\n");
 333                         goto _exit1;
 334                 }
 335         }
 336
 337         /* Enable HAL device */
 338         status = vxge_hal_device_enable(hldev);
 339         if (status != VXGE_HAL_OK) {
 340                 device_printf(vdev->ndev, "failed to enable device\n");
 341                 goto _exit1;
 342         }
 343
 344         if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX)
 345                 vxge_msix_enable(vdev);
 346
 347         /* Checksum capability */
 348         ifp->if_hwassist = 0;
 349         if (ifp->if_capenable & IFCAP_TXCSUM)
 350                 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP);
 351
 352         if (ifp->if_capenable & IFCAP_TSO4)
 353                 ifp->if_hwassist |= CSUM_TSO;
 354
 355         for (i = 0; i < vdev->no_of_vpath; i++) {
 356                 vpath_handle = vxge_vpath_handle_get(vdev, i);
 357                 if (!vpath_handle)
 358                         continue;
 359
 360                 /* Enabling mcast for all vpath */
 361                 vxge_hal_vpath_mcast_enable(vpath_handle);
 362
 363                 /* Enabling bcast for all vpath */
 364                 status = vxge_hal_vpath_bcast_enable(vpath_handle);
 365                 if (status != VXGE_HAL_OK)
 366                         device_printf(vdev->ndev,
 367                             "can't enable bcast on vpath (%d)\n", i);
 368         }
 369
 370         /* Enable interrupts */
 371         vxge_hal_device_intr_enable(vdev->devh);
 372
 373         for (i = 0; i < vdev->no_of_vpath; i++) {
 374                 vpath_handle = vxge_vpath_handle_get(vdev, i);
 375                 if (!vpath_handle)
 376                         continue;
 377
 378                 bzero(&(vdev->vpaths[i].driver_stats),
 379                     sizeof(vxge_drv_stats_t));
 380                 status = vxge_hal_vpath_enable(vpath_handle);
 381                 if (status != VXGE_HAL_OK)
 382                         goto _exit2;
 383         }
 384
 385         vxge_os_mdelay(1000);
 386
 387         /* Device is initialized */
 388         vdev->is_initialized = TRUE;
 389
 390         /* Now inform the stack we're ready */
 391         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 392         ifp->if_drv_flags |= IFF_DRV_RUNNING;
 393
 394         goto _exit0;
 395
 396 _exit2:
 397         vxge_hal_device_intr_disable(vdev->devh);
 398         vxge_hal_device_disable(hldev);
 399
 400 _exit1:
 401         vxge_vpath_close(vdev);
 402
 403 _exit0:
 404         return;
 405 }
 406
 407 /*
 408  * vxge_driver_init
 409  * Initializes HAL driver
 410  */
 411 vxge_hal_status_e
 412 vxge_driver_init(vxge_dev_t *vdev)
 413 {
 414         vxge_hal_uld_cbs_t uld_callbacks;
 415         vxge_hal_driver_config_t driver_config;
 416         vxge_hal_status_e status = VXGE_HAL_OK;
 417
 418         /* Initialize HAL driver */
 419         if (!vxge_dev_ref_count) {
 420                 bzero(&uld_callbacks, sizeof(vxge_hal_uld_cbs_t));
 421                 bzero(&driver_config, sizeof(vxge_hal_driver_config_t));
 422
 423                 uld_callbacks.link_up = vxge_link_up;
 424                 uld_callbacks.link_down = vxge_link_down;
 425                 uld_callbacks.crit_err = vxge_crit_error;
 426                 uld_callbacks.sched_timer = NULL;
 427                 uld_callbacks.xpak_alarm_log = NULL;
 428
 429                 status = vxge_hal_driver_initialize(&driver_config,
 430                     &uld_callbacks);
 431                 if (status != VXGE_HAL_OK) {
 432                         device_printf(vdev->ndev,
 433                             "failed to initialize driver\n");
 434                         goto _exit0;
 435                 }
 436         }
 437         vxge_hal_driver_debug_set(VXGE_TRACE);
 438         vxge_dev_ref_count++;
 439
 440 _exit0:
 441         return (status);
 442 }
 443
 444 /*
 445  * vxge_driver_config
 446  */
 447 int
 448 vxge_driver_config(vxge_dev_t *vdev)
 449 {
 450         int i, err = 0;
 451         char temp_buffer[30];
 452
 453         vxge_bw_info_t bw_info;
 454
 455         VXGE_GET_PARAM("hint.vxge.0.no_of_vpath", vdev->config,
 456             no_of_vpath, VXGE_DEFAULT_USER_HARDCODED);
 457
 458         if (vdev->config.no_of_vpath == VXGE_DEFAULT_USER_HARDCODED)
 459                 vdev->config.no_of_vpath = mp_ncpus;
 460
 461         if (vdev->config.no_of_vpath <= 0) {
 462                 err = EINVAL;
 463                 device_printf(vdev->ndev,
 464                     "Failed to load driver, \
 465                     invalid config : \'no_of_vpath\'\n");
 466                 goto _exit0;
 467         }
 468
 469         VXGE_GET_PARAM("hint.vxge.0.intr_coalesce", vdev->config,
 470             intr_coalesce, VXGE_DEFAULT_CONFIG_DISABLE);
 471
 472         VXGE_GET_PARAM("hint.vxge.0.rth_enable", vdev->config,
 473             rth_enable, VXGE_DEFAULT_CONFIG_ENABLE);
 474
 475         VXGE_GET_PARAM("hint.vxge.0.rth_bkt_sz", vdev->config,
 476             rth_bkt_sz, VXGE_DEFAULT_RTH_BUCKET_SIZE);
 477
 478         VXGE_GET_PARAM("hint.vxge.0.lro_enable", vdev->config,
 479             lro_enable, VXGE_DEFAULT_CONFIG_ENABLE);
 480
 481         VXGE_GET_PARAM("hint.vxge.0.tso_enable", vdev->config,
 482             tso_enable, VXGE_DEFAULT_CONFIG_ENABLE);
 483
 484         VXGE_GET_PARAM("hint.vxge.0.tx_steering", vdev->config,
 485             tx_steering, VXGE_DEFAULT_CONFIG_DISABLE);
 486
 487         VXGE_GET_PARAM("hint.vxge.0.msix_enable", vdev->config,
 488             intr_mode, VXGE_HAL_INTR_MODE_MSIX);
 489
 490         VXGE_GET_PARAM("hint.vxge.0.ifqmaxlen", vdev->config,
 491             ifq_maxlen, VXGE_DEFAULT_CONFIG_IFQ_MAXLEN);
 492
 493         VXGE_GET_PARAM("hint.vxge.0.port_mode", vdev->config,
 494             port_mode, VXGE_DEFAULT_CONFIG_VALUE);
 495
 496         if (vdev->config.port_mode == VXGE_DEFAULT_USER_HARDCODED)
 497                 vdev->config.port_mode = VXGE_DEFAULT_CONFIG_VALUE;
 498
 499         VXGE_GET_PARAM("hint.vxge.0.l2_switch", vdev->config,
 500             l2_switch, VXGE_DEFAULT_CONFIG_VALUE);
 501
 502         if (vdev->config.l2_switch == VXGE_DEFAULT_USER_HARDCODED)
 503                 vdev->config.l2_switch = VXGE_DEFAULT_CONFIG_VALUE;
 504
 505         VXGE_GET_PARAM("hint.vxge.0.fw_upgrade", vdev->config,
 506             fw_option, VXGE_FW_UPGRADE_ALL);
 507
 508         VXGE_GET_PARAM("hint.vxge.0.low_latency", vdev->config,
 509             low_latency, VXGE_DEFAULT_CONFIG_DISABLE);
 510
 511         VXGE_GET_PARAM("hint.vxge.0.func_mode", vdev->config,
 512             function_mode, VXGE_DEFAULT_CONFIG_VALUE);
 513
 514         if (vdev->config.function_mode == VXGE_DEFAULT_USER_HARDCODED)
 515                 vdev->config.function_mode = VXGE_DEFAULT_CONFIG_VALUE;
 516
 517         if (!(is_multi_func(vdev->config.function_mode) ||
 518             is_single_func(vdev->config.function_mode)))
 519                 vdev->config.function_mode = VXGE_DEFAULT_CONFIG_VALUE;
 520
 521         for (i = 0; i < VXGE_HAL_MAX_FUNCTIONS; i++) {
 522
 523                 bw_info.func_id = i;
 524
 525                 sprintf(temp_buffer, "hint.vxge.0.bandwidth_%d", i);
 526                 VXGE_GET_PARAM(temp_buffer, bw_info,
 527                     bandwidth, VXGE_DEFAULT_USER_HARDCODED);
 528
 529                 if (bw_info.bandwidth == VXGE_DEFAULT_USER_HARDCODED)
 530                         bw_info.bandwidth = VXGE_HAL_VPATH_BW_LIMIT_DEFAULT;
 531
 532                 sprintf(temp_buffer, "hint.vxge.0.priority_%d", i);
 533                 VXGE_GET_PARAM(temp_buffer, bw_info,
 534                     priority, VXGE_DEFAULT_USER_HARDCODED);
 535
 536                 if (bw_info.priority == VXGE_DEFAULT_USER_HARDCODED)
 537                         bw_info.priority = VXGE_HAL_VPATH_PRIORITY_DEFAULT;
 538
 539                 vxge_os_memcpy(&vdev->config.bw_info[i], &bw_info,
 540                     sizeof(vxge_bw_info_t));
 541         }
 542
 543 _exit0:
 544         return (err);
 545 }
 546
 547 /*
 548  * vxge_stop
 549  */
 550 void
 551 vxge_stop(vxge_dev_t *vdev)
 552 {
 553         VXGE_DRV_LOCK(vdev);
 554         vxge_stop_locked(vdev);
 555         VXGE_DRV_UNLOCK(vdev);
 556 }
 557
 558 /*
 559  * vxge_stop_locked
 560  * Common code for both stop and part of reset.
 561  * disables device, interrupts and closes vpaths handle
 562  */
 563 void
 564 vxge_stop_locked(vxge_dev_t *vdev)
 565 {
 566         u64 adapter_status = 0;
 567         vxge_hal_status_e status;
 568         vxge_hal_device_t *hldev = vdev->devh;
 569         ifnet_t ifp = vdev->ifp;
 570
 571         VXGE_DRV_LOCK_ASSERT(vdev);
 572
 573         /* If device is not in "Running" state, return */
 574         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
 575                 return;
 576
 577         /* Set appropriate flags */
 578         vdev->is_initialized = FALSE;
 579         hldev->link_state = VXGE_HAL_LINK_NONE;
 580         ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
 581         if_link_state_change(ifp, LINK_STATE_DOWN);
 582
 583         /* Disable interrupts */
 584         vxge_hal_device_intr_disable(hldev);
 585
 586         /* Disable HAL device */
 587         status = vxge_hal_device_disable(hldev);
 588         if (status != VXGE_HAL_OK) {
 589                 vxge_hal_device_status(hldev, &adapter_status);
 590                 device_printf(vdev->ndev,
 591                     "adapter status: 0x%llx\n", adapter_status);
 592         }
 593
 594         /* reset vpaths */
 595         vxge_vpath_reset(vdev);
 596
 597         vxge_os_mdelay(1000);
 598
 599         /* Close Vpaths */
 600         vxge_vpath_close(vdev);
 601 }
 602
 603 void
 604 vxge_send(ifnet_t ifp)
 605 {
 606         vxge_vpath_t *vpath;
 607         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
 608
 609         vpath = &(vdev->vpaths[0]);
 610
 611         if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
 612                 if (VXGE_TX_TRYLOCK(vpath)) {
 613                         vxge_send_locked(ifp, vpath);
 614                         VXGE_TX_UNLOCK(vpath);
 615                 }
 616         }
 617 }
 618
 619 static inline void
 620 vxge_send_locked(ifnet_t ifp, vxge_vpath_t *vpath)
 621 {
 622         mbuf_t m_head = NULL;
 623         vxge_dev_t *vdev = vpath->vdev;
 624
 625         VXGE_TX_LOCK_ASSERT(vpath);
 626
 627         if ((!vdev->is_initialized) ||
 628             ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
 629             IFF_DRV_RUNNING))
 630                 return;
 631
 632         while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
 633                 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
 634                 if (m_head == NULL)
 635                         break;
 636
 637                 if (vxge_xmit(ifp, vpath, &m_head)) {
 638                         if (m_head == NULL)
 639                                 break;
 640
 641                         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
 642                         IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
 643                         VXGE_DRV_STATS(vpath, tx_again);
 644                         break;
 645                 }
 646                 /* Send a copy of the frame to the BPF listener */
 647                 ETHER_BPF_MTAP(ifp, m_head);
 648         }
 649 }
 650
 651 #if __FreeBSD_version >= 800000
 652
 653 int
 654 vxge_mq_send(ifnet_t ifp, mbuf_t m_head)
 655 {
 656         int i = 0, err = 0;
 657
 658         vxge_vpath_t *vpath;
 659         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
 660
 661         if (vdev->config.tx_steering) {
 662                 i = vxge_vpath_get(vdev, m_head);
 663         } else if (M_HASHTYPE_GET(m_head) != M_HASHTYPE_NONE) {
 664                 i = m_head->m_pkthdr.flowid % vdev->no_of_vpath;
 665         }
 666
 667         vpath = &(vdev->vpaths[i]);
 668         if (VXGE_TX_TRYLOCK(vpath)) {
 669                 err = vxge_mq_send_locked(ifp, vpath, m_head);
 670                 VXGE_TX_UNLOCK(vpath);
 671         } else
 672                 err = drbr_enqueue(ifp, vpath->br, m_head);
 673
 674         return (err);
 675 }
 676
 677 static inline int
 678 vxge_mq_send_locked(ifnet_t ifp, vxge_vpath_t *vpath, mbuf_t m_head)
 679 {
 680         int err = 0;
 681         mbuf_t next = NULL;
 682         vxge_dev_t *vdev = vpath->vdev;
 683
 684         VXGE_TX_LOCK_ASSERT(vpath);
 685
 686         if ((!vdev->is_initialized) ||
 687             ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
 688             IFF_DRV_RUNNING)) {
 689                 err = drbr_enqueue(ifp, vpath->br, m_head);
 690                 goto _exit0;
 691         }
 692         if (m_head == NULL) {
 693                 next = drbr_dequeue(ifp, vpath->br);
 694         } else if (drbr_needs_enqueue(ifp, vpath->br)) {
 695                 if ((err = drbr_enqueue(ifp, vpath->br, m_head)) != 0)
 696                         goto _exit0;
 697                 next = drbr_dequeue(ifp, vpath->br);
 698         } else
 699                 next = m_head;
 700
 701         /* Process the queue */
 702         while (next != NULL) {
 703                 if ((err = vxge_xmit(ifp, vpath, &next)) != 0) {
 704                         if (next == NULL)
 705                                 break;
 706
 707                         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
 708                         err = drbr_enqueue(ifp, vpath->br, next);
 709                         VXGE_DRV_STATS(vpath, tx_again);
 710                         break;
 711                 }
 712                 if_inc_counter(ifp, IFCOUNTER_OBYTES, next->m_pkthdr.len);
 713                 if (next->m_flags & M_MCAST)
 714                         if_inc_counter(ifp, IFCOUNTER_OMCASTS, 1);
 715
 716                 /* Send a copy of the frame to the BPF listener */
 717                 ETHER_BPF_MTAP(ifp, next);
 718                 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
 719                         break;
 720
 721                 next = drbr_dequeue(ifp, vpath->br);
 722         }
 723
 724 _exit0:
 725         return (err);
 726 }
 727
 728 void
 729 vxge_mq_qflush(ifnet_t ifp)
 730 {
 731         int i;
 732         mbuf_t m_head;
 733         vxge_vpath_t *vpath;
 734
 735         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
 736
 737         for (i = 0; i < vdev->no_of_vpath; i++) {
 738                 vpath = &(vdev->vpaths[i]);
 739                 if (!vpath->handle)
 740                         continue;
 741
 742                 VXGE_TX_LOCK(vpath);
 743                 while ((m_head = buf_ring_dequeue_sc(vpath->br)) != NULL)
 744                         vxge_free_packet(m_head);
 745
 746                 VXGE_TX_UNLOCK(vpath);
 747         }
 748         if_qflush(ifp);
 749 }
 750 #endif
 751
 752 static inline int
 753 vxge_xmit(ifnet_t ifp, vxge_vpath_t *vpath, mbuf_t *m_headp)
 754 {
 755         int err, num_segs = 0;
 756         u32 txdl_avail, dma_index, tagged = 0;
 757
 758         dma_addr_t dma_addr;
 759         bus_size_t dma_sizes;
 760
 761         void *dtr_priv;
 762         vxge_txdl_priv_t *txdl_priv;
 763         vxge_hal_txdl_h txdlh;
 764         vxge_hal_status_e status;
 765         vxge_dev_t *vdev = vpath->vdev;
 766
 767         VXGE_DRV_STATS(vpath, tx_xmit);
 768
 769         txdl_avail = vxge_hal_fifo_free_txdl_count_get(vpath->handle);
 770         if (txdl_avail < VXGE_TX_LOW_THRESHOLD) {
 771
 772                 VXGE_DRV_STATS(vpath, tx_low_dtr_cnt);
 773                 err = ENOBUFS;
 774                 goto _exit0;
 775         }
 776
 777         /* Reserve descriptors */
 778         status = vxge_hal_fifo_txdl_reserve(vpath->handle, &txdlh, &dtr_priv);
 779         if (status != VXGE_HAL_OK) {
 780                 VXGE_DRV_STATS(vpath, tx_reserve_failed);
 781                 err = ENOBUFS;
 782                 goto _exit0;
 783         }
 784
 785         /* Update Tx private structure for this descriptor */
 786         txdl_priv = (vxge_txdl_priv_t *) dtr_priv;
 787
 788         /*
 789          * Map the packet for DMA.
 790          * Returns number of segments through num_segs.
 791          */
 792         err = vxge_dma_mbuf_coalesce(vpath->dma_tag_tx, txdl_priv->dma_map,
 793             m_headp, txdl_priv->dma_buffers, &num_segs);
 794
 795         if (vpath->driver_stats.tx_max_frags < num_segs)
 796                 vpath->driver_stats.tx_max_frags = num_segs;
 797
 798         if (err == ENOMEM) {
 799                 VXGE_DRV_STATS(vpath, tx_no_dma_setup);
 800                 vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
 801                 goto _exit0;
 802         } else if (err != 0) {
 803                 vxge_free_packet(*m_headp);
 804                 VXGE_DRV_STATS(vpath, tx_no_dma_setup);
 805                 vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
 806                 goto _exit0;
 807         }
 808
 809         txdl_priv->mbuf_pkt = *m_headp;
 810
 811         /* Set VLAN tag in descriptor only if this packet has it */
 812         if ((*m_headp)->m_flags & M_VLANTAG)
 813                 vxge_hal_fifo_txdl_vlan_set(txdlh,
 814                     (*m_headp)->m_pkthdr.ether_vtag);
 815
 816         /* Set descriptor buffer for header and each fragment/segment */
 817         for (dma_index = 0; dma_index < num_segs; dma_index++) {
 818
 819                 dma_sizes = txdl_priv->dma_buffers[dma_index].ds_len;
 820                 dma_addr = htole64(txdl_priv->dma_buffers[dma_index].ds_addr);
 821
 822                 vxge_hal_fifo_txdl_buffer_set(vpath->handle, txdlh, dma_index,
 823                     dma_addr, dma_sizes);
 824         }
 825
 826         /* Pre-write Sync of mapping */
 827         bus_dmamap_sync(vpath->dma_tag_tx, txdl_priv->dma_map,
 828             BUS_DMASYNC_PREWRITE);
 829
 830         if ((*m_headp)->m_pkthdr.csum_flags & CSUM_TSO) {
 831                 if ((*m_headp)->m_pkthdr.tso_segsz) {
 832                         VXGE_DRV_STATS(vpath, tx_tso);
 833                         vxge_hal_fifo_txdl_lso_set(txdlh,
 834                             VXGE_HAL_FIFO_LSO_FRM_ENCAP_AUTO,
 835                             (*m_headp)->m_pkthdr.tso_segsz);
 836                 }
 837         }
 838
 839         /* Checksum */
 840         if (ifp->if_hwassist > 0) {
 841                 vxge_hal_fifo_txdl_cksum_set_bits(txdlh,
 842                     VXGE_HAL_FIFO_TXD_TX_CKO_IPV4_EN |
 843                     VXGE_HAL_FIFO_TXD_TX_CKO_TCP_EN |
 844                     VXGE_HAL_FIFO_TXD_TX_CKO_UDP_EN);
 845         }
 846
 847         if ((vxge_hal_device_check_id(vdev->devh) == VXGE_HAL_CARD_TITAN_1A) &&
 848             (vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 0)))
 849                 tagged = 1;
 850
 851         vxge_hal_fifo_txdl_post(vpath->handle, txdlh, tagged);
 852         VXGE_DRV_STATS(vpath, tx_posted);
 853
 854 _exit0:
 855         return (err);
 856 }
 857
 858 /*
 859  * vxge_tx_replenish
 860  * Allocate buffers and set them into descriptors for later use
 861  */
 862 /* ARGSUSED */
 863 vxge_hal_status_e
 864 vxge_tx_replenish(vxge_hal_vpath_h vpath_handle, vxge_hal_txdl_h txdlh,
 865     void *dtr_priv, u32 dtr_index, void *userdata, vxge_hal_reopen_e reopen)
 866 {
 867         int err = 0;
 868
 869         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
 870         vxge_txdl_priv_t *txdl_priv = (vxge_txdl_priv_t *) dtr_priv;
 871
 872         err = bus_dmamap_create(vpath->dma_tag_tx, BUS_DMA_NOWAIT,
 873             &txdl_priv->dma_map);
 874
 875         return ((err == 0) ? VXGE_HAL_OK : VXGE_HAL_FAIL);
 876 }
 877
 878 /*
 879  * vxge_tx_compl
 880  * If the interrupt is due to Tx completion, free the sent buffer
 881  */
 882 vxge_hal_status_e
 883 vxge_tx_compl(vxge_hal_vpath_h vpath_handle, vxge_hal_txdl_h txdlh,
 884     void *dtr_priv, vxge_hal_fifo_tcode_e t_code, void *userdata)
 885 {
 886         vxge_hal_status_e status = VXGE_HAL_OK;
 887
 888         vxge_txdl_priv_t *txdl_priv;
 889         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
 890         vxge_dev_t *vdev = vpath->vdev;
 891
 892         ifnet_t ifp = vdev->ifp;
 893
 894         VXGE_TX_LOCK(vpath);
 895
 896         /*
 897          * For each completed descriptor
 898          * Get private structure, free buffer, do unmapping, and free descriptor
 899          */
 900
 901         do {
 902                 VXGE_DRV_STATS(vpath, tx_compl);
 903                 if (t_code != VXGE_HAL_FIFO_T_CODE_OK) {
 904                         device_printf(vdev->ndev, "tx transfer code %d\n",
 905                             t_code);
 906
 907                         if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
 908                         VXGE_DRV_STATS(vpath, tx_tcode);
 909                         vxge_hal_fifo_handle_tcode(vpath_handle, txdlh, t_code);
 910                 }
 911                 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
 912                 txdl_priv = (vxge_txdl_priv_t *) dtr_priv;
 913
 914                 bus_dmamap_unload(vpath->dma_tag_tx, txdl_priv->dma_map);
 915
 916                 vxge_free_packet(txdl_priv->mbuf_pkt);
 917                 vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
 918
 919         } while (vxge_hal_fifo_txdl_next_completed(vpath_handle, &txdlh,
 920             &dtr_priv, &t_code) == VXGE_HAL_OK);
 921
 922
 923         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 924         VXGE_TX_UNLOCK(vpath);
 925
 926         return (status);
 927 }
 928
 929 /* ARGSUSED */
 930 void
 931 vxge_tx_term(vxge_hal_vpath_h vpath_handle, vxge_hal_txdl_h txdlh,
 932     void *dtr_priv, vxge_hal_txdl_state_e state,
 933     void *userdata, vxge_hal_reopen_e reopen)
 934 {
 935         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
 936         vxge_txdl_priv_t *txdl_priv = (vxge_txdl_priv_t *) dtr_priv;
 937
 938         if (state != VXGE_HAL_TXDL_STATE_POSTED)
 939                 return;
 940
 941         if (txdl_priv != NULL) {
 942                 bus_dmamap_sync(vpath->dma_tag_tx, txdl_priv->dma_map,
 943                     BUS_DMASYNC_POSTWRITE);
 944
 945                 bus_dmamap_unload(vpath->dma_tag_tx, txdl_priv->dma_map);
 946                 bus_dmamap_destroy(vpath->dma_tag_tx, txdl_priv->dma_map);
 947                 vxge_free_packet(txdl_priv->mbuf_pkt);
 948         }
 949
 950         /* Free the descriptor */
 951         vxge_hal_fifo_txdl_free(vpath->handle, txdlh);
 952 }
 953
 954 /*
 955  * vxge_rx_replenish
 956  * Allocate buffers and set them into descriptors for later use
 957  */
 958 /* ARGSUSED */
 959 vxge_hal_status_e
 960 vxge_rx_replenish(vxge_hal_vpath_h vpath_handle, vxge_hal_rxd_h rxdh,
 961     void *dtr_priv, u32 dtr_index, void *userdata, vxge_hal_reopen_e reopen)
 962 {
 963         int err = 0;
 964         vxge_hal_status_e status = VXGE_HAL_OK;
 965
 966         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
 967         vxge_rxd_priv_t *rxd_priv = (vxge_rxd_priv_t *) dtr_priv;
 968
 969         /* Create DMA map for these descriptors */
 970         err = bus_dmamap_create(vpath->dma_tag_rx, BUS_DMA_NOWAIT,
 971             &rxd_priv->dma_map);
 972         if (err == 0) {
 973                 if (vxge_rx_rxd_1b_set(vpath, rxdh, dtr_priv)) {
 974                         bus_dmamap_destroy(vpath->dma_tag_rx,
 975                             rxd_priv->dma_map);
 976                         status = VXGE_HAL_FAIL;
 977                 }
 978         }
 979
 980         return (status);
 981 }
 982
 983 /*
 984  * vxge_rx_compl
 985  */
 986 vxge_hal_status_e
 987 vxge_rx_compl(vxge_hal_vpath_h vpath_handle, vxge_hal_rxd_h rxdh,
 988     void *dtr_priv, u8 t_code, void *userdata)
 989 {
 990         mbuf_t mbuf_up;
 991
 992         vxge_rxd_priv_t *rxd_priv;
 993         vxge_hal_ring_rxd_info_t ext_info;
 994         vxge_hal_status_e status = VXGE_HAL_OK;
 995
 996         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
 997         vxge_dev_t *vdev = vpath->vdev;
 998
 999         struct lro_ctrl *lro = &vpath->lro;
1000
1001         /* get the interface pointer */
1002         ifnet_t ifp = vdev->ifp;
1003
1004         do {
1005                 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1006                         vxge_hal_ring_rxd_post(vpath_handle, rxdh);
1007                         status = VXGE_HAL_FAIL;
1008                         break;
1009                 }
1010
1011                 VXGE_DRV_STATS(vpath, rx_compl);
1012                 rxd_priv = (vxge_rxd_priv_t *) dtr_priv;
1013
1014                 /* Gets details of mbuf i.e., packet length */
1015                 vxge_rx_rxd_1b_get(vpath, rxdh, dtr_priv);
1016
1017                 /*
1018                  * Prepare one buffer to send it to upper layer Since upper
1019                  * layer frees the buffer do not use rxd_priv->mbuf_pkt.
1020                  * Meanwhile prepare a new buffer, do mapping, use with the
1021                  * current descriptor and post descriptor back to ring vpath
1022                  */
1023                 mbuf_up = rxd_priv->mbuf_pkt;
1024                 if (t_code != VXGE_HAL_RING_RXD_T_CODE_OK) {
1025
1026                         if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1027                         VXGE_DRV_STATS(vpath, rx_tcode);
1028                         status = vxge_hal_ring_handle_tcode(vpath_handle,
1029                             rxdh, t_code);
1030
1031                         /*
1032                          * If transfer code is not for unknown protocols and
1033                          * vxge_hal_device_handle_tcode is NOT returned
1034                          * VXGE_HAL_OK
1035                          * drop this packet and increment rx_tcode stats
1036                          */
1037                         if ((status != VXGE_HAL_OK) &&
1038                             (t_code != VXGE_HAL_RING_T_CODE_L3_PKT_ERR)) {
1039
1040                                 vxge_free_packet(mbuf_up);
1041                                 vxge_hal_ring_rxd_post(vpath_handle, rxdh);
1042                                 continue;
1043                         }
1044                 }
1045
1046                 if (vxge_rx_rxd_1b_set(vpath, rxdh, dtr_priv)) {
1047                         /*
1048                          * If unable to allocate buffer, post descriptor back
1049                          * to vpath for future processing of same packet.
1050                          */
1051                         vxge_hal_ring_rxd_post(vpath_handle, rxdh);
1052                         continue;
1053                 }
1054
1055                 /* Get the extended information */
1056                 vxge_hal_ring_rxd_1b_info_get(vpath_handle, rxdh, &ext_info);
1057
1058                 /* post descriptor with newly allocated mbuf back to vpath */
1059                 vxge_hal_ring_rxd_post(vpath_handle, rxdh);
1060                 vpath->rxd_posted++;
1061
1062                 if (vpath->rxd_posted % VXGE_RXD_REPLENISH_COUNT == 0)
1063                         vxge_hal_ring_rxd_post_post_db(vpath_handle);
1064
1065                 /*
1066                  * Set successfully computed checksums in the mbuf.
1067                  * Leave the rest to the stack to be reverified.
1068                  */
1069                 vxge_rx_checksum(ext_info, mbuf_up);
1070
1071 #if __FreeBSD_version >= 800000
1072                 M_HASHTYPE_SET(mbuf_up, M_HASHTYPE_OPAQUE);
1073                 mbuf_up->m_pkthdr.flowid = vpath->vp_index;
1074 #endif
1075                 /* Post-Read sync for buffers */
1076                 bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1077                     BUS_DMASYNC_POSTREAD);
1078
1079                 vxge_rx_input(ifp, mbuf_up, vpath);
1080
1081         } while (vxge_hal_ring_rxd_next_completed(vpath_handle, &rxdh,
1082             &dtr_priv, &t_code) == VXGE_HAL_OK);
1083
1084         /* Flush any outstanding LRO work */
1085         if (vpath->lro_enable && vpath->lro.lro_cnt)
1086                 tcp_lro_flush_all(lro);
1087
1088         return (status);
1089 }
1090
1091 static inline void
1092 vxge_rx_input(ifnet_t ifp, mbuf_t mbuf_up, vxge_vpath_t *vpath)
1093 {
1094         if (vpath->lro_enable && vpath->lro.lro_cnt) {
1095                 if (tcp_lro_rx(&vpath->lro, mbuf_up, 0) == 0)
1096                         return;
1097         }
1098         (*ifp->if_input) (ifp, mbuf_up);
1099 }
1100
1101 static inline void
1102 vxge_rx_checksum(vxge_hal_ring_rxd_info_t ext_info, mbuf_t mbuf_up)
1103 {
1104
1105         if (!(ext_info.proto & VXGE_HAL_FRAME_PROTO_IP_FRAG) &&
1106             (ext_info.proto & VXGE_HAL_FRAME_PROTO_TCP_OR_UDP) &&
1107             ext_info.l3_cksum_valid && ext_info.l4_cksum_valid) {
1108
1109                 mbuf_up->m_pkthdr.csum_data = htons(0xffff);
1110
1111                 mbuf_up->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
1112                 mbuf_up->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1113                 mbuf_up->m_pkthdr.csum_flags |=
1114                     (CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
1115
1116         } else {
1117
1118                 if (ext_info.vlan) {
1119                         mbuf_up->m_pkthdr.ether_vtag = ext_info.vlan;
1120                         mbuf_up->m_flags |= M_VLANTAG;
1121                 }
1122         }
1123 }
1124
1125 /*
1126  * vxge_rx_term During unload terminate and free all descriptors
1127  * @vpath_handle Rx vpath Handle @rxdh Rx Descriptor Handle @state Descriptor
1128  * State @userdata Per-adapter Data @reopen vpath open/reopen option
1129  */
1130 /* ARGSUSED */
1131 void
1132 vxge_rx_term(vxge_hal_vpath_h vpath_handle, vxge_hal_rxd_h rxdh,
1133     void *dtr_priv, vxge_hal_rxd_state_e state, void *userdata,
1134     vxge_hal_reopen_e reopen)
1135 {
1136         vxge_vpath_t *vpath = (vxge_vpath_t *) userdata;
1137         vxge_rxd_priv_t *rxd_priv = (vxge_rxd_priv_t *) dtr_priv;
1138
1139         if (state != VXGE_HAL_RXD_STATE_POSTED)
1140                 return;
1141
1142         if (rxd_priv != NULL) {
1143                 bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1144                     BUS_DMASYNC_POSTREAD);
1145                 bus_dmamap_unload(vpath->dma_tag_rx, rxd_priv->dma_map);
1146                 bus_dmamap_destroy(vpath->dma_tag_rx, rxd_priv->dma_map);
1147
1148                 vxge_free_packet(rxd_priv->mbuf_pkt);
1149         }
1150         /* Free the descriptor */
1151         vxge_hal_ring_rxd_free(vpath_handle, rxdh);
1152 }
1153
1154 /*
1155  * vxge_rx_rxd_1b_get
1156  * Get descriptors of packet to send up
1157  */
1158 void
1159 vxge_rx_rxd_1b_get(vxge_vpath_t *vpath, vxge_hal_rxd_h rxdh, void *dtr_priv)
1160 {
1161         vxge_rxd_priv_t *rxd_priv = (vxge_rxd_priv_t *) dtr_priv;
1162         mbuf_t mbuf_up = rxd_priv->mbuf_pkt;
1163
1164         /* Retrieve data from completed descriptor */
1165         vxge_hal_ring_rxd_1b_get(vpath->handle, rxdh, &rxd_priv->dma_addr[0],
1166             (u32 *) &rxd_priv->dma_sizes[0]);
1167
1168         /* Update newly created buffer to be sent up with packet length */
1169         mbuf_up->m_len = rxd_priv->dma_sizes[0];
1170         mbuf_up->m_pkthdr.len = rxd_priv->dma_sizes[0];
1171         mbuf_up->m_next = NULL;
1172 }
1173
1174 /*
1175  * vxge_rx_rxd_1b_set
1176  * Allocates new mbufs to be placed into descriptors
1177  */
1178 int
1179 vxge_rx_rxd_1b_set(vxge_vpath_t *vpath, vxge_hal_rxd_h rxdh, void *dtr_priv)
1180 {
1181         int num_segs, err = 0;
1182
1183         mbuf_t mbuf_pkt;
1184         bus_dmamap_t dma_map;
1185         bus_dma_segment_t dma_buffers[1];
1186         vxge_rxd_priv_t *rxd_priv = (vxge_rxd_priv_t *) dtr_priv;
1187
1188         vxge_dev_t *vdev = vpath->vdev;
1189
1190         mbuf_pkt = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, vdev->rx_mbuf_sz);
1191         if (!mbuf_pkt) {
1192                 err = ENOBUFS;
1193                 VXGE_DRV_STATS(vpath, rx_no_buf);
1194                 device_printf(vdev->ndev, "out of memory to allocate mbuf\n");
1195                 goto _exit0;
1196         }
1197
1198         /* Update mbuf's length, packet length and receive interface */
1199         mbuf_pkt->m_len = vdev->rx_mbuf_sz;
1200         mbuf_pkt->m_pkthdr.len = vdev->rx_mbuf_sz;
1201         mbuf_pkt->m_pkthdr.rcvif = vdev->ifp;
1202
1203         /* Load DMA map */
1204         err = vxge_dma_mbuf_coalesce(vpath->dma_tag_rx, vpath->extra_dma_map,
1205             &mbuf_pkt, dma_buffers, &num_segs);
1206         if (err != 0) {
1207                 VXGE_DRV_STATS(vpath, rx_map_fail);
1208                 vxge_free_packet(mbuf_pkt);
1209                 goto _exit0;
1210         }
1211
1212         /* Unload DMA map of mbuf in current descriptor */
1213         bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1214             BUS_DMASYNC_POSTREAD);
1215         bus_dmamap_unload(vpath->dma_tag_rx, rxd_priv->dma_map);
1216
1217         /* Update descriptor private data */
1218         dma_map = rxd_priv->dma_map;
1219         rxd_priv->mbuf_pkt = mbuf_pkt;
1220         rxd_priv->dma_addr[0] = htole64(dma_buffers->ds_addr);
1221         rxd_priv->dma_map = vpath->extra_dma_map;
1222         vpath->extra_dma_map = dma_map;
1223
1224         /* Pre-Read/Write sync */
1225         bus_dmamap_sync(vpath->dma_tag_rx, rxd_priv->dma_map,
1226             BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1227
1228         /* Set descriptor buffer */
1229         vxge_hal_ring_rxd_1b_set(rxdh, rxd_priv->dma_addr[0], vdev->rx_mbuf_sz);
1230
1231 _exit0:
1232         return (err);
1233 }
1234
1235 /*
1236  * vxge_link_up
1237  * Callback for Link-up indication from HAL
1238  */
1239 /* ARGSUSED */
1240 void
1241 vxge_link_up(vxge_hal_device_h devh, void *userdata)
1242 {
1243         int i;
1244         vxge_vpath_t *vpath;
1245         vxge_hal_device_hw_info_t *hw_info;
1246
1247         vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1248         hw_info = &vdev->config.hw_info;
1249
1250         ifnet_t ifp = vdev->ifp;
1251
1252         if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1253                 for (i = 0; i < vdev->no_of_vpath; i++) {
1254                         vpath = &(vdev->vpaths[i]);
1255                         vxge_hal_vpath_tti_ci_set(vpath->handle);
1256                         vxge_hal_vpath_rti_ci_set(vpath->handle);
1257                 }
1258         }
1259
1260         if (vdev->is_privilaged && (hw_info->ports > 1)) {
1261                 vxge_active_port_update(vdev);
1262                 device_printf(vdev->ndev,
1263                     "Active Port : %lld\n", vdev->active_port);
1264         }
1265
1266         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1267         if_link_state_change(ifp, LINK_STATE_UP);
1268 }
1269
1270 /*
1271  * vxge_link_down
1272  * Callback for Link-down indication from HAL
1273  */
1274 /* ARGSUSED */
1275 void
1276 vxge_link_down(vxge_hal_device_h devh, void *userdata)
1277 {
1278         int i;
1279         vxge_vpath_t *vpath;
1280         vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1281
1282         ifnet_t ifp = vdev->ifp;
1283
1284         if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1285                 for (i = 0; i < vdev->no_of_vpath; i++) {
1286                         vpath = &(vdev->vpaths[i]);
1287                         vxge_hal_vpath_tti_ci_reset(vpath->handle);
1288                         vxge_hal_vpath_rti_ci_reset(vpath->handle);
1289                 }
1290         }
1291
1292         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1293         if_link_state_change(ifp, LINK_STATE_DOWN);
1294 }
1295
1296 /*
1297  * vxge_reset
1298  */
1299 void
1300 vxge_reset(vxge_dev_t *vdev)
1301 {
1302         if (!vdev->is_initialized)
1303                 return;
1304
1305         VXGE_DRV_LOCK(vdev);
1306         vxge_stop_locked(vdev);
1307         vxge_init_locked(vdev);
1308         VXGE_DRV_UNLOCK(vdev);
1309 }
1310
1311 /*
1312  * vxge_crit_error
1313  * Callback for Critical error indication from HAL
1314  */
1315 /* ARGSUSED */
1316 void
1317 vxge_crit_error(vxge_hal_device_h devh, void *userdata,
1318     vxge_hal_event_e type, u64 serr_data)
1319 {
1320         vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1321         ifnet_t ifp = vdev->ifp;
1322
1323         switch (type) {
1324         case VXGE_HAL_EVENT_SERR:
1325         case VXGE_HAL_EVENT_KDFCCTL:
1326         case VXGE_HAL_EVENT_CRITICAL:
1327                 vxge_hal_device_intr_disable(vdev->devh);
1328                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1329                 if_link_state_change(ifp, LINK_STATE_DOWN);
1330                 break;
1331         default:
1332                 break;
1333         }
1334 }
1335
1336 /*
1337  * vxge_ifp_setup
1338  */
1339 int
1340 vxge_ifp_setup(device_t ndev)
1341 {
1342         ifnet_t ifp;
1343         int i, j, err = 0;
1344
1345         vxge_dev_t *vdev = (vxge_dev_t *) device_get_softc(ndev);
1346
1347         for (i = 0, j = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1348                 if (!bVAL1(vdev->config.hw_info.vpath_mask, i))
1349                         continue;
1350
1351                 if (j >= vdev->no_of_vpath)
1352                         break;
1353
1354                 vdev->vpaths[j].vp_id = i;
1355                 vdev->vpaths[j].vp_index = j;
1356                 vdev->vpaths[j].vdev = vdev;
1357                 vdev->vpaths[j].is_configured = TRUE;
1358
1359                 vxge_os_memcpy((u8 *) vdev->vpaths[j].mac_addr,
1360                     (u8 *) (vdev->config.hw_info.mac_addrs[i]),
1361                     (size_t) ETHER_ADDR_LEN);
1362                 j++;
1363         }
1364
1365         /* Get interface ifnet structure for this Ether device */
1366         ifp = if_alloc(IFT_ETHER);
1367         if (ifp == NULL) {
1368                 device_printf(vdev->ndev,
1369                     "memory allocation for ifnet failed\n");
1370                 err = ENXIO;
1371                 goto _exit0;
1372         }
1373         vdev->ifp = ifp;
1374
1375         /* Initialize interface ifnet structure */
1376         if_initname(ifp, device_get_name(ndev), device_get_unit(ndev));
1377
1378         ifp->if_baudrate = VXGE_BAUDRATE;
1379         ifp->if_init = vxge_init;
1380         ifp->if_softc = vdev;
1381         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1382         ifp->if_ioctl = vxge_ioctl;
1383         ifp->if_start = vxge_send;
1384
1385 #if __FreeBSD_version >= 800000
1386         ifp->if_transmit = vxge_mq_send;
1387         ifp->if_qflush = vxge_mq_qflush;
1388 #endif
1389         ifp->if_snd.ifq_drv_maxlen = max(vdev->config.ifq_maxlen, ifqmaxlen);
1390         IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
1391         /* IFQ_SET_READY(&ifp->if_snd); */
1392
1393         ifp->if_hdrlen = sizeof(struct ether_vlan_header);
1394
1395         ifp->if_capabilities |= IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM;
1396         ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
1397         ifp->if_capabilities |= IFCAP_JUMBO_MTU;
1398
1399         if (vdev->config.tso_enable)
1400                 vxge_tso_config(vdev);
1401
1402         if (vdev->config.lro_enable)
1403                 ifp->if_capabilities |= IFCAP_LRO;
1404
1405         ifp->if_capenable = ifp->if_capabilities;
1406
1407         strlcpy(vdev->ndev_name, device_get_nameunit(ndev),
1408             sizeof(vdev->ndev_name));
1409
1410         /* Attach the interface */
1411         ether_ifattach(ifp, vdev->vpaths[0].mac_addr);
1412
1413 _exit0:
1414         return (err);
1415 }
1416
1417 /*
1418  * vxge_isr_setup
1419  * Register isr functions
1420  */
1421 int
1422 vxge_isr_setup(vxge_dev_t *vdev)
1423 {
1424         int i, irq_rid, err = 0;
1425         vxge_vpath_t *vpath;
1426
1427         void *isr_func_arg;
1428         void (*isr_func_ptr) (void *);
1429
1430         switch (vdev->config.intr_mode) {
1431         case VXGE_HAL_INTR_MODE_IRQLINE:
1432                 err = bus_setup_intr(vdev->ndev,
1433                     vdev->config.isr_info[0].irq_res,
1434                     (INTR_TYPE_NET | INTR_MPSAFE),
1435                     vxge_isr_filter, vxge_isr_line, vdev,
1436                     &vdev->config.isr_info[0].irq_handle);
1437                 break;
1438
1439         case VXGE_HAL_INTR_MODE_MSIX:
1440                 for (i = 0; i < vdev->intr_count; i++) {
1441
1442                         irq_rid = vdev->config.isr_info[i].irq_rid;
1443                         vpath = &vdev->vpaths[irq_rid / 4];
1444
1445                         if ((irq_rid % 4) == 2) {
1446                                 isr_func_ptr = vxge_isr_msix;
1447                                 isr_func_arg = (void *) vpath;
1448                         } else if ((irq_rid % 4) == 3) {
1449                                 isr_func_ptr = vxge_isr_msix_alarm;
1450                                 isr_func_arg = (void *) vpath;
1451                         } else
1452                                 break;
1453
1454                         err = bus_setup_intr(vdev->ndev,
1455                             vdev->config.isr_info[i].irq_res,
1456                             (INTR_TYPE_NET | INTR_MPSAFE), NULL,
1457                             (void *) isr_func_ptr, (void *) isr_func_arg,
1458                             &vdev->config.isr_info[i].irq_handle);
1459                         if (err != 0)
1460                                 break;
1461                 }
1462
1463                 if (err != 0) {
1464                         /* Teardown interrupt handler */
1465                         while (--i > 0)
1466                                 bus_teardown_intr(vdev->ndev,
1467                                     vdev->config.isr_info[i].irq_res,
1468                                     vdev->config.isr_info[i].irq_handle);
1469                 }
1470                 break;
1471         }
1472
1473         return (err);
1474 }
1475
1476 /*
1477  * vxge_isr_filter
1478  * ISR filter function - filter interrupts from other shared devices
1479  */
1480 int
1481 vxge_isr_filter(void *handle)
1482 {
1483         u64 val64 = 0;
1484         vxge_dev_t *vdev = (vxge_dev_t *) handle;
1485         __hal_device_t *hldev = (__hal_device_t *) vdev->devh;
1486
1487         vxge_hal_common_reg_t *common_reg =
1488         (vxge_hal_common_reg_t *) (hldev->common_reg);
1489
1490         val64 = vxge_os_pio_mem_read64(vdev->pdev, (vdev->devh)->regh0,
1491             &common_reg->titan_general_int_status);
1492
1493         return ((val64) ? FILTER_SCHEDULE_THREAD : FILTER_STRAY);
1494 }
1495
1496 /*
1497  * vxge_isr_line
1498  * Interrupt service routine for Line interrupts
1499  */
1500 void
1501 vxge_isr_line(void *vdev_ptr)
1502 {
1503         vxge_dev_t *vdev = (vxge_dev_t *) vdev_ptr;
1504
1505         vxge_hal_device_handle_irq(vdev->devh, 0);
1506 }
1507
1508 void
1509 vxge_isr_msix(void *vpath_ptr)
1510 {
1511         u32 got_rx = 0;
1512         u32 got_tx = 0;
1513
1514         __hal_virtualpath_t *hal_vpath;
1515         vxge_vpath_t *vpath = (vxge_vpath_t *) vpath_ptr;
1516         vxge_dev_t *vdev = vpath->vdev;
1517         hal_vpath = ((__hal_vpath_handle_t *) vpath->handle)->vpath;
1518
1519         VXGE_DRV_STATS(vpath, isr_msix);
1520         VXGE_HAL_DEVICE_STATS_SW_INFO_TRAFFIC_INTR(vdev->devh);
1521
1522         vxge_hal_vpath_mf_msix_mask(vpath->handle, vpath->msix_vec);
1523
1524         /* processing rx */
1525         vxge_hal_vpath_poll_rx(vpath->handle, &got_rx);
1526
1527         /* processing tx */
1528         if (hal_vpath->vp_config->fifo.enable) {
1529                 vxge_intr_coalesce_tx(vpath);
1530                 vxge_hal_vpath_poll_tx(vpath->handle, &got_tx);
1531         }
1532
1533         vxge_hal_vpath_mf_msix_unmask(vpath->handle, vpath->msix_vec);
1534 }
1535
1536 void
1537 vxge_isr_msix_alarm(void *vpath_ptr)
1538 {
1539         int i;
1540         vxge_hal_status_e status = VXGE_HAL_OK;
1541
1542         vxge_vpath_t *vpath = (vxge_vpath_t *) vpath_ptr;
1543         vxge_dev_t *vdev = vpath->vdev;
1544
1545         VXGE_HAL_DEVICE_STATS_SW_INFO_NOT_TRAFFIC_INTR(vdev->devh);
1546
1547         /* Process alarms in each vpath */
1548         for (i = 0; i < vdev->no_of_vpath; i++) {
1549
1550                 vpath = &(vdev->vpaths[i]);
1551                 vxge_hal_vpath_mf_msix_mask(vpath->handle,
1552                     vpath->msix_vec_alarm);
1553                 status = vxge_hal_vpath_alarm_process(vpath->handle, 0);
1554                 if ((status == VXGE_HAL_ERR_EVENT_SLOT_FREEZE) ||
1555                     (status == VXGE_HAL_ERR_EVENT_SERR)) {
1556                         device_printf(vdev->ndev,
1557                             "processing alarms urecoverable error %x\n",
1558                             status);
1559
1560                         /* Stop the driver */
1561                         vdev->is_initialized = FALSE;
1562                         break;
1563                 }
1564                 vxge_hal_vpath_mf_msix_unmask(vpath->handle,
1565                     vpath->msix_vec_alarm);
1566         }
1567 }
1568
1569 /*
1570  * vxge_msix_enable
1571  */
1572 vxge_hal_status_e
1573 vxge_msix_enable(vxge_dev_t *vdev)
1574 {
1575         int i, first_vp_id, msix_id;
1576
1577         vxge_vpath_t *vpath;
1578         vxge_hal_status_e status = VXGE_HAL_OK;
1579
1580         /*
1581          * Unmasking and Setting MSIX vectors before enabling interrupts
1582          * tim[] : 0 - Tx ## 1 - Rx ## 2 - UMQ-DMQ ## 0 - BITMAP
1583          */
1584         int tim[4] = {0, 1, 0, 0};
1585
1586         for (i = 0; i < vdev->no_of_vpath; i++) {
1587
1588                 vpath = vdev->vpaths + i;
1589                 first_vp_id = vdev->vpaths[0].vp_id;
1590
1591                 msix_id = vpath->vp_id * VXGE_HAL_VPATH_MSIX_ACTIVE;
1592                 tim[1] = vpath->msix_vec = msix_id + 1;
1593
1594                 vpath->msix_vec_alarm = first_vp_id *
1595                     VXGE_HAL_VPATH_MSIX_ACTIVE + VXGE_HAL_VPATH_MSIX_ALARM_ID;
1596
1597                 status = vxge_hal_vpath_mf_msix_set(vpath->handle,
1598                     tim, VXGE_HAL_VPATH_MSIX_ALARM_ID);
1599
1600                 if (status != VXGE_HAL_OK) {
1601                         device_printf(vdev->ndev,
1602                             "failed to set msix vectors to vpath\n");
1603                         break;
1604                 }
1605
1606                 vxge_hal_vpath_mf_msix_unmask(vpath->handle, vpath->msix_vec);
1607                 vxge_hal_vpath_mf_msix_unmask(vpath->handle,
1608                     vpath->msix_vec_alarm);
1609         }
1610
1611         return (status);
1612 }
1613
1614 /*
1615  * vxge_media_init
1616  * Initializes, adds and sets media
1617  */
1618 void
1619 vxge_media_init(vxge_dev_t *vdev)
1620 {
1621         ifmedia_init(&vdev->media,
1622             IFM_IMASK, vxge_media_change, vxge_media_status);
1623
1624         /* Add supported media */
1625         ifmedia_add(&vdev->media,
1626             IFM_ETHER | vdev->ifm_optics | IFM_FDX,
1627             0, NULL);
1628
1629         /* Set media */
1630         ifmedia_add(&vdev->media, IFM_ETHER | IFM_AUTO, 0, NULL);
1631         ifmedia_set(&vdev->media, IFM_ETHER | IFM_AUTO);
1632 }
1633
1634 /*
1635  * vxge_media_status
1636  * Callback  for interface media settings
1637  */
1638 void
1639 vxge_media_status(ifnet_t ifp, struct ifmediareq *ifmr)
1640 {
1641         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
1642         vxge_hal_device_t *hldev = vdev->devh;
1643
1644         ifmr->ifm_status = IFM_AVALID;
1645         ifmr->ifm_active = IFM_ETHER;
1646
1647         /* set link state */
1648         if (vxge_hal_device_link_state_get(hldev) == VXGE_HAL_LINK_UP) {
1649                 ifmr->ifm_status |= IFM_ACTIVE;
1650                 ifmr->ifm_active |= vdev->ifm_optics | IFM_FDX;
1651                 if_link_state_change(ifp, LINK_STATE_UP);
1652         }
1653 }
1654
1655 /*
1656  * vxge_media_change
1657  * Media change driver callback
1658  */
1659 int
1660 vxge_media_change(ifnet_t ifp)
1661 {
1662         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
1663         struct ifmedia *ifmediap = &vdev->media;
1664
1665         return (IFM_TYPE(ifmediap->ifm_media) != IFM_ETHER ? EINVAL : 0);
1666 }
1667
1668 /*
1669  * Allocate PCI resources
1670  */
1671 int
1672 vxge_alloc_resources(vxge_dev_t *vdev)
1673 {
1674         int err = 0;
1675         vxge_pci_info_t *pci_info = NULL;
1676         vxge_free_resources_e error_level = VXGE_FREE_NONE;
1677
1678         device_t ndev = vdev->ndev;
1679
1680         /* Allocate Buffer for HAL Device Configuration */
1681         vdev->device_config = (vxge_hal_device_config_t *)
1682             vxge_mem_alloc(sizeof(vxge_hal_device_config_t));
1683
1684         if (!vdev->device_config) {
1685                 err = ENOMEM;
1686                 error_level = VXGE_DISABLE_PCI_BUSMASTER;
1687                 device_printf(vdev->ndev,
1688                     "failed to allocate memory for device config\n");
1689                 goto _exit0;
1690         }
1691
1692
1693         pci_info = (vxge_pci_info_t *) vxge_mem_alloc(sizeof(vxge_pci_info_t));
1694         if (!pci_info) {
1695                 error_level = VXGE_FREE_DEVICE_CONFIG;
1696                 err = ENOMEM;
1697                 device_printf(vdev->ndev,
1698                     "failed to allocate memory for pci info\n");
1699                 goto _exit0;
1700         }
1701         pci_info->ndev = ndev;
1702         vdev->pdev = pci_info;
1703
1704         err = vxge_alloc_bar_resources(vdev, 0);
1705         if (err != 0) {
1706                 error_level = VXGE_FREE_BAR0;
1707                 goto _exit0;
1708         }
1709
1710         err = vxge_alloc_bar_resources(vdev, 1);
1711         if (err != 0) {
1712                 error_level = VXGE_FREE_BAR1;
1713                 goto _exit0;
1714         }
1715
1716         err = vxge_alloc_bar_resources(vdev, 2);
1717         if (err != 0)
1718                 error_level = VXGE_FREE_BAR2;
1719
1720 _exit0:
1721         if (error_level)
1722                 vxge_free_resources(ndev, error_level);
1723
1724         return (err);
1725 }
1726
1727 /*
1728  * vxge_alloc_bar_resources
1729  * Allocates BAR resources
1730  */
1731 int
1732 vxge_alloc_bar_resources(vxge_dev_t *vdev, int i)
1733 {
1734         int err = 0;
1735         int res_id = 0;
1736         vxge_pci_info_t *pci_info = vdev->pdev;
1737
1738         res_id = PCIR_BAR((i == 0) ? 0 : (i * 2));
1739
1740         pci_info->bar_info[i] =
1741             bus_alloc_resource_any(vdev->ndev,
1742             SYS_RES_MEMORY, &res_id, RF_ACTIVE);
1743
1744         if (pci_info->bar_info[i] == NULL) {
1745                 device_printf(vdev->ndev,
1746                     "failed to allocate memory for bus resources\n");
1747                 err = ENOMEM;
1748                 goto _exit0;
1749         }
1750
1751         pci_info->reg_map[i] =
1752             (vxge_bus_res_t *) vxge_mem_alloc(sizeof(vxge_bus_res_t));
1753
1754         if (pci_info->reg_map[i] == NULL) {
1755                 device_printf(vdev->ndev,
1756                     "failed to allocate memory bar resources\n");
1757                 err = ENOMEM;
1758                 goto _exit0;
1759         }
1760
1761         ((vxge_bus_res_t *) (pci_info->reg_map[i]))->bus_space_tag =
1762             rman_get_bustag(pci_info->bar_info[i]);
1763
1764         ((vxge_bus_res_t *) (pci_info->reg_map[i]))->bus_space_handle =
1765             rman_get_bushandle(pci_info->bar_info[i]);
1766
1767         ((vxge_bus_res_t *) (pci_info->reg_map[i]))->bar_start_addr =
1768             pci_info->bar_info[i];
1769
1770         ((vxge_bus_res_t *) (pci_info->reg_map[i]))->bus_res_len =
1771             rman_get_size(pci_info->bar_info[i]);
1772
1773 _exit0:
1774         return (err);
1775 }
1776
1777 /*
1778  * vxge_alloc_isr_resources
1779  */
1780 int
1781 vxge_alloc_isr_resources(vxge_dev_t *vdev)
1782 {
1783         int i, err = 0, irq_rid;
1784         int msix_vec_reqd, intr_count, msix_count;
1785
1786         int intr_mode = VXGE_HAL_INTR_MODE_IRQLINE;
1787
1788         if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1789                 /* MSI-X messages supported by device */
1790                 intr_count = pci_msix_count(vdev->ndev);
1791                 if (intr_count) {
1792
1793                         msix_vec_reqd = 4 * vdev->no_of_vpath;
1794                         if (intr_count >= msix_vec_reqd) {
1795                                 intr_count = msix_vec_reqd;
1796
1797                                 err = pci_alloc_msix(vdev->ndev, &intr_count);
1798                                 if (err == 0)
1799                                         intr_mode = VXGE_HAL_INTR_MODE_MSIX;
1800                         }
1801
1802                         if ((err != 0) || (intr_count < msix_vec_reqd)) {
1803                                 device_printf(vdev->ndev, "Unable to allocate "
1804                                     "msi/x vectors switching to INTA mode\n");
1805                         }
1806                 }
1807         }
1808
1809         err = 0;
1810         vdev->intr_count = 0;
1811         vdev->config.intr_mode = intr_mode;
1812
1813         switch (vdev->config.intr_mode) {
1814         case VXGE_HAL_INTR_MODE_IRQLINE:
1815                 vdev->config.isr_info[0].irq_rid = 0;
1816                 vdev->config.isr_info[0].irq_res =
1817                     bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1818                     &vdev->config.isr_info[0].irq_rid,
1819                     (RF_SHAREABLE | RF_ACTIVE));
1820
1821                 if (vdev->config.isr_info[0].irq_res == NULL) {
1822                         device_printf(vdev->ndev,
1823                             "failed to allocate line interrupt resource\n");
1824                         err = ENOMEM;
1825                         goto _exit0;
1826                 }
1827                 vdev->intr_count++;
1828                 break;
1829
1830         case VXGE_HAL_INTR_MODE_MSIX:
1831                 msix_count = 0;
1832                 for (i = 0; i < vdev->no_of_vpath; i++) {
1833                         irq_rid = i * 4;
1834
1835                         vdev->config.isr_info[msix_count].irq_rid = irq_rid + 2;
1836                         vdev->config.isr_info[msix_count].irq_res =
1837                             bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1838                             &vdev->config.isr_info[msix_count].irq_rid,
1839                             (RF_SHAREABLE | RF_ACTIVE));
1840
1841                         if (vdev->config.isr_info[msix_count].irq_res == NULL) {
1842                                 device_printf(vdev->ndev,
1843                                     "allocating bus resource (rid %d) failed\n",
1844                                     vdev->config.isr_info[msix_count].irq_rid);
1845                                 err = ENOMEM;
1846                                 goto _exit0;
1847                         }
1848
1849                         vdev->intr_count++;
1850                         err = bus_bind_intr(vdev->ndev,
1851                             vdev->config.isr_info[msix_count].irq_res,
1852                             (i % mp_ncpus));
1853                         if (err != 0)
1854                                 break;
1855
1856                         msix_count++;
1857                 }
1858
1859                 vdev->config.isr_info[msix_count].irq_rid = 3;
1860                 vdev->config.isr_info[msix_count].irq_res =
1861                     bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1862                     &vdev->config.isr_info[msix_count].irq_rid,
1863                     (RF_SHAREABLE | RF_ACTIVE));
1864
1865                 if (vdev->config.isr_info[msix_count].irq_res == NULL) {
1866                         device_printf(vdev->ndev,
1867                             "allocating bus resource (rid %d) failed\n",
1868                             vdev->config.isr_info[msix_count].irq_rid);
1869                         err = ENOMEM;
1870                         goto _exit0;
1871                 }
1872
1873                 vdev->intr_count++;
1874                 err = bus_bind_intr(vdev->ndev,
1875                     vdev->config.isr_info[msix_count].irq_res, (i % mp_ncpus));
1876
1877                 break;
1878         }
1879
1880         vdev->device_config->intr_mode = vdev->config.intr_mode;
1881
1882 _exit0:
1883         return (err);
1884 }
1885
1886 /*
1887  * vxge_free_resources
1888  * Undo what-all we did during load/attach
1889  */
1890 void
1891 vxge_free_resources(device_t ndev, vxge_free_resources_e vxge_free_resource)
1892 {
1893         int i;
1894         vxge_dev_t *vdev;
1895
1896         vdev = (vxge_dev_t *) device_get_softc(ndev);
1897
1898         switch (vxge_free_resource) {
1899         case VXGE_FREE_ALL:
1900                 for (i = 0; i < vdev->intr_count; i++) {
1901                         bus_teardown_intr(ndev,
1902                             vdev->config.isr_info[i].irq_res,
1903                             vdev->config.isr_info[i].irq_handle);
1904                 }
1905                 /* FALLTHROUGH */
1906
1907         case VXGE_FREE_INTERFACE:
1908                 ether_ifdetach(vdev->ifp);
1909                 bus_generic_detach(ndev);
1910                 if_free(vdev->ifp);
1911                 /* FALLTHROUGH */
1912
1913         case VXGE_FREE_MEDIA:
1914                 ifmedia_removeall(&vdev->media);
1915                 /* FALLTHROUGH */
1916
1917         case VXGE_FREE_MUTEX:
1918                 vxge_mutex_destroy(vdev);
1919                 /* FALLTHROUGH */
1920
1921         case VXGE_FREE_VPATH:
1922                 vxge_mem_free(vdev->vpaths,
1923                     vdev->no_of_vpath * sizeof(vxge_vpath_t));
1924                 /* FALLTHROUGH */
1925
1926         case VXGE_FREE_TERMINATE_DEVICE:
1927                 if (vdev->devh != NULL) {
1928                         vxge_hal_device_private_set(vdev->devh, 0);
1929                         vxge_hal_device_terminate(vdev->devh);
1930                 }
1931                 /* FALLTHROUGH */
1932
1933         case VXGE_FREE_ISR_RESOURCE:
1934                 vxge_free_isr_resources(vdev);
1935                 /* FALLTHROUGH */
1936
1937         case VXGE_FREE_BAR2:
1938                 vxge_free_bar_resources(vdev, 2);
1939                 /* FALLTHROUGH */
1940
1941         case VXGE_FREE_BAR1:
1942                 vxge_free_bar_resources(vdev, 1);
1943                 /* FALLTHROUGH */
1944
1945         case VXGE_FREE_BAR0:
1946                 vxge_free_bar_resources(vdev, 0);
1947                 /* FALLTHROUGH */
1948
1949         case VXGE_FREE_PCI_INFO:
1950                 vxge_mem_free(vdev->pdev, sizeof(vxge_pci_info_t));
1951                 /* FALLTHROUGH */
1952
1953         case VXGE_FREE_DEVICE_CONFIG:
1954                 vxge_mem_free(vdev->device_config,
1955                     sizeof(vxge_hal_device_config_t));
1956                 /* FALLTHROUGH */
1957
1958         case VXGE_DISABLE_PCI_BUSMASTER:
1959                 pci_disable_busmaster(ndev);
1960                 /* FALLTHROUGH */
1961
1962         case VXGE_FREE_TERMINATE_DRIVER:
1963                 if (vxge_dev_ref_count) {
1964                         --vxge_dev_ref_count;
1965                         if (0 == vxge_dev_ref_count)
1966                                 vxge_hal_driver_terminate();
1967                 }
1968                 /* FALLTHROUGH */
1969
1970         default:
1971         case VXGE_FREE_NONE:
1972                 break;
1973                 /* NOTREACHED */
1974         }
1975 }
1976
1977 void
1978 vxge_free_isr_resources(vxge_dev_t *vdev)
1979 {
1980         int i;
1981
1982         switch (vdev->config.intr_mode) {
1983         case VXGE_HAL_INTR_MODE_IRQLINE:
1984                 if (vdev->config.isr_info[0].irq_res) {
1985                         bus_release_resource(vdev->ndev, SYS_RES_IRQ,
1986                             vdev->config.isr_info[0].irq_rid,
1987                             vdev->config.isr_info[0].irq_res);
1988
1989                         vdev->config.isr_info[0].irq_res = NULL;
1990                 }
1991                 break;
1992
1993         case VXGE_HAL_INTR_MODE_MSIX:
1994                 for (i = 0; i < vdev->intr_count; i++) {
1995                         if (vdev->config.isr_info[i].irq_res) {
1996                                 bus_release_resource(vdev->ndev, SYS_RES_IRQ,
1997                                     vdev->config.isr_info[i].irq_rid,
1998                                     vdev->config.isr_info[i].irq_res);
1999
2000                                 vdev->config.isr_info[i].irq_res = NULL;
2001                         }
2002                 }
2003
2004                 if (vdev->intr_count)
2005                         pci_release_msi(vdev->ndev);
2006
2007                 break;
2008         }
2009 }
2010
2011 void
2012 vxge_free_bar_resources(vxge_dev_t *vdev, int i)
2013 {
2014         int res_id = 0;
2015         vxge_pci_info_t *pci_info = vdev->pdev;
2016
2017         res_id = PCIR_BAR((i == 0) ? 0 : (i * 2));
2018
2019         if (pci_info->bar_info[i])
2020                 bus_release_resource(vdev->ndev, SYS_RES_MEMORY,
2021                     res_id, pci_info->bar_info[i]);
2022
2023         vxge_mem_free(pci_info->reg_map[i], sizeof(vxge_bus_res_t));
2024 }
2025
2026 /*
2027  * vxge_init_mutex
2028  * Initializes mutexes used in driver
2029  */
2030 void
2031 vxge_mutex_init(vxge_dev_t *vdev)
2032 {
2033         int i;
2034
2035         snprintf(vdev->mtx_drv_name, sizeof(vdev->mtx_drv_name),
2036             "%s_drv", vdev->ndev_name);
2037
2038         mtx_init(&vdev->mtx_drv, vdev->mtx_drv_name,
2039             MTX_NETWORK_LOCK, MTX_DEF);
2040
2041         for (i = 0; i < vdev->no_of_vpath; i++) {
2042                 snprintf(vdev->vpaths[i].mtx_tx_name,
2043                     sizeof(vdev->vpaths[i].mtx_tx_name), "%s_tx_%d",
2044                     vdev->ndev_name, i);
2045
2046                 mtx_init(&vdev->vpaths[i].mtx_tx,
2047                     vdev->vpaths[i].mtx_tx_name, NULL, MTX_DEF);
2048         }
2049 }
2050
2051 /*
2052  * vxge_mutex_destroy
2053  * Destroys mutexes used in driver
2054  */
2055 void
2056 vxge_mutex_destroy(vxge_dev_t *vdev)
2057 {
2058         int i;
2059
2060         for (i = 0; i < vdev->no_of_vpath; i++)
2061                 VXGE_TX_LOCK_DESTROY(&(vdev->vpaths[i]));
2062
2063         VXGE_DRV_LOCK_DESTROY(vdev);
2064 }
2065
2066 /*
2067  * vxge_rth_config
2068  */
2069 vxge_hal_status_e
2070 vxge_rth_config(vxge_dev_t *vdev)
2071 {
2072         int i;
2073         vxge_hal_vpath_h vpath_handle;
2074         vxge_hal_rth_hash_types_t hash_types;
2075         vxge_hal_status_e status = VXGE_HAL_OK;
2076         u8 mtable[256] = {0};
2077
2078         /* Filling matable with bucket-to-vpath mapping */
2079         vdev->config.rth_bkt_sz = VXGE_DEFAULT_RTH_BUCKET_SIZE;
2080
2081         for (i = 0; i < (1 << vdev->config.rth_bkt_sz); i++)
2082                 mtable[i] = i % vdev->no_of_vpath;
2083
2084         /* Fill RTH hash types */
2085         hash_types.hash_type_tcpipv4_en = VXGE_HAL_RING_HASH_TYPE_TCP_IPV4;
2086         hash_types.hash_type_tcpipv6_en = VXGE_HAL_RING_HASH_TYPE_TCP_IPV6;
2087         hash_types.hash_type_tcpipv6ex_en = VXGE_HAL_RING_HASH_TYPE_TCP_IPV6_EX;
2088         hash_types.hash_type_ipv4_en = VXGE_HAL_RING_HASH_TYPE_IPV4;
2089         hash_types.hash_type_ipv6_en = VXGE_HAL_RING_HASH_TYPE_IPV6;
2090         hash_types.hash_type_ipv6ex_en = VXGE_HAL_RING_HASH_TYPE_IPV6_EX;
2091
2092         /* set indirection table, bucket-to-vpath mapping */
2093         status = vxge_hal_vpath_rts_rth_itable_set(vdev->vpath_handles,
2094             vdev->no_of_vpath, mtable,
2095             ((u32) (1 << vdev->config.rth_bkt_sz)));
2096
2097         if (status != VXGE_HAL_OK) {
2098                 device_printf(vdev->ndev, "rth configuration failed\n");
2099                 goto _exit0;
2100         }
2101         for (i = 0; i < vdev->no_of_vpath; i++) {
2102                 vpath_handle = vxge_vpath_handle_get(vdev, i);
2103                 if (!vpath_handle)
2104                         continue;
2105
2106                 status = vxge_hal_vpath_rts_rth_set(vpath_handle,
2107                     RTH_ALG_JENKINS,
2108                     &hash_types, vdev->config.rth_bkt_sz, TRUE);
2109                 if (status != VXGE_HAL_OK) {
2110                         device_printf(vdev->ndev,
2111                             "rth configuration failed for vpath (%d)\n",
2112                             vdev->vpaths[i].vp_id);
2113                         break;
2114                 }
2115         }
2116
2117 _exit0:
2118         return (status);
2119 }
2120
2121 /*
2122  * vxge_vpath_config
2123  * Sets HAL parameter values from kenv
2124  */
2125 void
2126 vxge_vpath_config(vxge_dev_t *vdev)
2127 {
2128         int i;
2129         u32 no_of_vpath = 0;
2130         vxge_hal_vp_config_t *vp_config;
2131         vxge_hal_device_config_t *device_config = vdev->device_config;
2132
2133         device_config->debug_level = VXGE_TRACE;
2134         device_config->debug_mask = VXGE_COMPONENT_ALL;
2135         device_config->device_poll_millis = VXGE_DEFAULT_DEVICE_POLL_MILLIS;
2136
2137         vdev->config.no_of_vpath =
2138             min(vdev->config.no_of_vpath, vdev->max_supported_vpath);
2139
2140         for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
2141                 vp_config = &(device_config->vp_config[i]);
2142                 vp_config->fifo.enable = VXGE_HAL_FIFO_DISABLE;
2143                 vp_config->ring.enable = VXGE_HAL_RING_DISABLE;
2144         }
2145
2146         for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
2147                 if (no_of_vpath >= vdev->config.no_of_vpath)
2148                         break;
2149
2150                 if (!bVAL1(vdev->config.hw_info.vpath_mask, i))
2151                         continue;
2152
2153                 no_of_vpath++;
2154                 vp_config = &(device_config->vp_config[i]);
2155                 vp_config->mtu = VXGE_HAL_DEFAULT_MTU;
2156                 vp_config->ring.enable = VXGE_HAL_RING_ENABLE;
2157                 vp_config->ring.post_mode = VXGE_HAL_RING_POST_MODE_DOORBELL;
2158                 vp_config->ring.buffer_mode = VXGE_HAL_RING_RXD_BUFFER_MODE_1;
2159                 vp_config->ring.ring_length =
2160                     vxge_ring_length_get(VXGE_HAL_RING_RXD_BUFFER_MODE_1);
2161                 vp_config->ring.scatter_mode = VXGE_HAL_RING_SCATTER_MODE_A;
2162                 vp_config->rpa_all_vid_en = VXGE_DEFAULT_ALL_VID_ENABLE;
2163                 vp_config->rpa_strip_vlan_tag = VXGE_DEFAULT_STRIP_VLAN_TAG;
2164                 vp_config->rpa_ucast_all_addr_en =
2165                     VXGE_HAL_VPATH_RPA_UCAST_ALL_ADDR_DISABLE;
2166
2167                 vp_config->rti.intr_enable = VXGE_HAL_TIM_INTR_ENABLE;
2168                 vp_config->rti.txfrm_cnt_en = VXGE_HAL_TXFRM_CNT_EN_ENABLE;
2169                 vp_config->rti.util_sel =
2170                     VXGE_HAL_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
2171
2172                 vp_config->rti.uec_a = VXGE_DEFAULT_RTI_RX_UFC_A;
2173                 vp_config->rti.uec_b = VXGE_DEFAULT_RTI_RX_UFC_B;
2174                 vp_config->rti.uec_c = VXGE_DEFAULT_RTI_RX_UFC_C;
2175                 vp_config->rti.uec_d = VXGE_DEFAULT_RTI_RX_UFC_D;
2176
2177                 vp_config->rti.urange_a = VXGE_DEFAULT_RTI_RX_URANGE_A;
2178                 vp_config->rti.urange_b = VXGE_DEFAULT_RTI_RX_URANGE_B;
2179                 vp_config->rti.urange_c = VXGE_DEFAULT_RTI_RX_URANGE_C;
2180
2181                 vp_config->rti.timer_ac_en = VXGE_HAL_TIM_TIMER_AC_ENABLE;
2182                 vp_config->rti.timer_ci_en = VXGE_HAL_TIM_TIMER_CI_ENABLE;
2183
2184                 vp_config->rti.btimer_val =
2185                     (VXGE_DEFAULT_RTI_BTIMER_VAL * 1000) / 272;
2186                 vp_config->rti.rtimer_val =
2187                     (VXGE_DEFAULT_RTI_RTIMER_VAL * 1000) / 272;
2188                 vp_config->rti.ltimer_val =
2189                     (VXGE_DEFAULT_RTI_LTIMER_VAL * 1000) / 272;
2190
2191                 if ((no_of_vpath > 1) && (VXGE_DEFAULT_CONFIG_MQ_ENABLE == 0))
2192                         continue;
2193
2194                 vp_config->fifo.enable = VXGE_HAL_FIFO_ENABLE;
2195                 vp_config->fifo.max_aligned_frags =
2196                     VXGE_DEFAULT_FIFO_ALIGNED_FRAGS;
2197
2198                 vp_config->tti.intr_enable = VXGE_HAL_TIM_INTR_ENABLE;
2199                 vp_config->tti.txfrm_cnt_en = VXGE_HAL_TXFRM_CNT_EN_ENABLE;
2200                 vp_config->tti.util_sel =
2201                     VXGE_HAL_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
2202
2203                 vp_config->tti.uec_a = VXGE_DEFAULT_TTI_TX_UFC_A;
2204                 vp_config->tti.uec_b = VXGE_DEFAULT_TTI_TX_UFC_B;
2205                 vp_config->tti.uec_c = VXGE_DEFAULT_TTI_TX_UFC_C;
2206                 vp_config->tti.uec_d = VXGE_DEFAULT_TTI_TX_UFC_D;
2207
2208                 vp_config->tti.urange_a = VXGE_DEFAULT_TTI_TX_URANGE_A;
2209                 vp_config->tti.urange_b = VXGE_DEFAULT_TTI_TX_URANGE_B;
2210                 vp_config->tti.urange_c = VXGE_DEFAULT_TTI_TX_URANGE_C;
2211
2212                 vp_config->tti.timer_ac_en = VXGE_HAL_TIM_TIMER_AC_ENABLE;
2213                 vp_config->tti.timer_ci_en = VXGE_HAL_TIM_TIMER_CI_ENABLE;
2214
2215                 vp_config->tti.btimer_val =
2216                     (VXGE_DEFAULT_TTI_BTIMER_VAL * 1000) / 272;
2217                 vp_config->tti.rtimer_val =
2218                     (VXGE_DEFAULT_TTI_RTIMER_VAL * 1000) / 272;
2219                 vp_config->tti.ltimer_val =
2220                     (VXGE_DEFAULT_TTI_LTIMER_VAL * 1000) / 272;
2221         }
2222
2223         vdev->no_of_vpath = no_of_vpath;
2224
2225         if (vdev->no_of_vpath == 1)
2226                 vdev->config.tx_steering = 0;
2227
2228         if (vdev->config.rth_enable && (vdev->no_of_vpath > 1)) {
2229                 device_config->rth_en = VXGE_HAL_RTH_ENABLE;
2230                 device_config->rth_it_type = VXGE_HAL_RTH_IT_TYPE_MULTI_IT;
2231         }
2232
2233         vdev->config.rth_enable = device_config->rth_en;
2234 }
2235
2236 /*
2237  * vxge_vpath_cb_fn
2238  * Virtual path Callback function
2239  */
2240 /* ARGSUSED */
2241 static vxge_hal_status_e
2242 vxge_vpath_cb_fn(vxge_hal_client_h client_handle, vxge_hal_up_msg_h msgh,
2243     vxge_hal_message_type_e msg_type, vxge_hal_obj_id_t obj_id,
2244     vxge_hal_result_e result, vxge_hal_opaque_handle_t *opaque_handle)
2245 {
2246         return (VXGE_HAL_OK);
2247 }
2248
2249 /*
2250  * vxge_vpath_open
2251  */
2252 int
2253 vxge_vpath_open(vxge_dev_t *vdev)
2254 {
2255         int i, err = EINVAL;
2256         u64 func_id;
2257
2258         vxge_vpath_t *vpath;
2259         vxge_hal_vpath_attr_t vpath_attr;
2260         vxge_hal_status_e status = VXGE_HAL_OK;
2261         struct lro_ctrl *lro = NULL;
2262
2263         bzero(&vpath_attr, sizeof(vxge_hal_vpath_attr_t));
2264
2265         for (i = 0; i < vdev->no_of_vpath; i++) {
2266
2267                 vpath = &(vdev->vpaths[i]);
2268                 lro = &vpath->lro;
2269
2270                 /* Vpath vpath_attr: FIFO */
2271                 vpath_attr.vp_id = vpath->vp_id;
2272                 vpath_attr.fifo_attr.callback = vxge_tx_compl;
2273                 vpath_attr.fifo_attr.txdl_init = vxge_tx_replenish;
2274                 vpath_attr.fifo_attr.txdl_term = vxge_tx_term;
2275                 vpath_attr.fifo_attr.userdata = vpath;
2276                 vpath_attr.fifo_attr.per_txdl_space = sizeof(vxge_txdl_priv_t);
2277
2278                 /* Vpath vpath_attr: Ring */
2279                 vpath_attr.ring_attr.callback = vxge_rx_compl;
2280                 vpath_attr.ring_attr.rxd_init = vxge_rx_replenish;
2281                 vpath_attr.ring_attr.rxd_term = vxge_rx_term;
2282                 vpath_attr.ring_attr.userdata = vpath;
2283                 vpath_attr.ring_attr.per_rxd_space = sizeof(vxge_rxd_priv_t);
2284
2285                 err = vxge_dma_tags_create(vpath);
2286                 if (err != 0) {
2287                         device_printf(vdev->ndev,
2288                             "failed to create dma tags\n");
2289                         break;
2290                 }
2291 #if __FreeBSD_version >= 800000
2292                 vpath->br = buf_ring_alloc(VXGE_DEFAULT_BR_SIZE, M_DEVBUF,
2293                     M_WAITOK, &vpath->mtx_tx);
2294                 if (vpath->br == NULL) {
2295                         err = ENOMEM;
2296                         break;
2297                 }
2298 #endif
2299                 status = vxge_hal_vpath_open(vdev->devh, &vpath_attr,
2300                     (vxge_hal_vpath_callback_f) vxge_vpath_cb_fn,
2301                     NULL, &vpath->handle);
2302                 if (status != VXGE_HAL_OK) {
2303                         device_printf(vdev->ndev,
2304                             "failed to open vpath (%d)\n", vpath->vp_id);
2305                         err = EPERM;
2306                         break;
2307                 }
2308                 vpath->is_open = TRUE;
2309                 vdev->vpath_handles[i] = vpath->handle;
2310
2311                 vpath->tx_ticks = ticks;
2312                 vpath->rx_ticks = ticks;
2313
2314                 vpath->tti_rtimer_val = VXGE_DEFAULT_TTI_RTIMER_VAL;
2315                 vpath->rti_rtimer_val = VXGE_DEFAULT_RTI_RTIMER_VAL;
2316
2317                 vpath->tx_intr_coalesce = vdev->config.intr_coalesce;
2318                 vpath->rx_intr_coalesce = vdev->config.intr_coalesce;
2319
2320                 func_id = vdev->config.hw_info.func_id;
2321
2322                 if (vdev->config.low_latency &&
2323                     (vdev->config.bw_info[func_id].priority ==
2324                         VXGE_DEFAULT_VPATH_PRIORITY_HIGH)) {
2325                         vpath->tx_intr_coalesce = 0;
2326                 }
2327
2328                 if (vdev->ifp->if_capenable & IFCAP_LRO) {
2329                         err = tcp_lro_init(lro);
2330                         if (err != 0) {
2331                                 device_printf(vdev->ndev,
2332                                     "LRO Initialization failed!\n");
2333                                 break;
2334                         }
2335                         vpath->lro_enable = TRUE;
2336                         lro->ifp = vdev->ifp;
2337                 }
2338         }
2339
2340         return (err);
2341 }
2342
2343 void
2344 vxge_tso_config(vxge_dev_t *vdev)
2345 {
2346         u32 func_id, priority;
2347         vxge_hal_status_e status = VXGE_HAL_OK;
2348
2349         vdev->ifp->if_capabilities |= IFCAP_TSO4;
2350
2351         status = vxge_bw_priority_get(vdev, NULL);
2352         if (status == VXGE_HAL_OK) {
2353
2354                 func_id = vdev->config.hw_info.func_id;
2355                 priority = vdev->config.bw_info[func_id].priority;
2356
2357                 if (priority != VXGE_DEFAULT_VPATH_PRIORITY_HIGH)
2358                         vdev->ifp->if_capabilities &= ~IFCAP_TSO4;
2359         }
2360
2361 #if __FreeBSD_version >= 800000
2362         if (vdev->ifp->if_capabilities & IFCAP_TSO4)
2363                 vdev->ifp->if_capabilities |= IFCAP_VLAN_HWTSO;
2364 #endif
2365
2366 }
2367
2368 vxge_hal_status_e
2369 vxge_bw_priority_get(vxge_dev_t *vdev, vxge_bw_info_t *bw_info)
2370 {
2371         u32 priority, bandwidth;
2372         u32 vpath_count;
2373
2374         u64 func_id, func_mode, vpath_list[VXGE_HAL_MAX_VIRTUAL_PATHS];
2375         vxge_hal_status_e status = VXGE_HAL_OK;
2376
2377         func_id = vdev->config.hw_info.func_id;
2378         if (bw_info) {
2379                 func_id = bw_info->func_id;
2380                 func_mode = vdev->config.hw_info.function_mode;
2381                 if ((is_single_func(func_mode)) && (func_id > 0))
2382                         return (VXGE_HAL_FAIL);
2383         }
2384
2385         if (vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 0)) {
2386
2387                 status = vxge_hal_vf_rx_bw_get(vdev->devh,
2388                     func_id, &bandwidth, &priority);
2389
2390         } else {
2391
2392                 status = vxge_hal_get_vpath_list(vdev->devh,
2393                     func_id, vpath_list, &vpath_count);
2394
2395                 if (status == VXGE_HAL_OK) {
2396                         status = vxge_hal_bw_priority_get(vdev->devh,
2397                             vpath_list[0], &bandwidth, &priority);
2398                 }
2399         }
2400
2401         if (status == VXGE_HAL_OK) {
2402                 if (bw_info) {
2403                         bw_info->priority = priority;
2404                         bw_info->bandwidth = bandwidth;
2405                 } else {
2406                         vdev->config.bw_info[func_id].priority = priority;
2407                         vdev->config.bw_info[func_id].bandwidth = bandwidth;
2408                 }
2409         }
2410
2411         return (status);
2412 }
2413
2414 /*
2415  * close vpaths
2416  */
2417 void
2418 vxge_vpath_close(vxge_dev_t *vdev)
2419 {
2420         int i;
2421         vxge_vpath_t *vpath;
2422
2423         for (i = 0; i < vdev->no_of_vpath; i++) {
2424
2425                 vpath = &(vdev->vpaths[i]);
2426                 if (vpath->handle)
2427                         vxge_hal_vpath_close(vpath->handle);
2428
2429 #if __FreeBSD_version >= 800000
2430                 if (vpath->br != NULL)
2431                         buf_ring_free(vpath->br, M_DEVBUF);
2432 #endif
2433                 /* Free LRO memory */
2434                 if (vpath->lro_enable)
2435                         tcp_lro_free(&vpath->lro);
2436
2437                 if (vpath->dma_tag_rx) {
2438                         bus_dmamap_destroy(vpath->dma_tag_rx,
2439                             vpath->extra_dma_map);
2440                         bus_dma_tag_destroy(vpath->dma_tag_rx);
2441                 }
2442
2443                 if (vpath->dma_tag_tx)
2444                         bus_dma_tag_destroy(vpath->dma_tag_tx);
2445
2446                 vpath->handle = NULL;
2447                 vpath->is_open = FALSE;
2448         }
2449 }
2450
2451 /*
2452  * reset vpaths
2453  */
2454 void
2455 vxge_vpath_reset(vxge_dev_t *vdev)
2456 {
2457         int i;
2458         vxge_hal_vpath_h vpath_handle;
2459         vxge_hal_status_e status = VXGE_HAL_OK;
2460
2461         for (i = 0; i < vdev->no_of_vpath; i++) {
2462                 vpath_handle = vxge_vpath_handle_get(vdev, i);
2463                 if (!vpath_handle)
2464                         continue;
2465
2466                 status = vxge_hal_vpath_reset(vpath_handle);
2467                 if (status != VXGE_HAL_OK)
2468                         device_printf(vdev->ndev,
2469                             "failed to reset vpath :%d\n", i);
2470         }
2471 }
2472
2473 static inline int
2474 vxge_vpath_get(vxge_dev_t *vdev, mbuf_t mhead)
2475 {
2476         struct tcphdr *th = NULL;
2477         struct udphdr *uh = NULL;
2478         struct ip *ip = NULL;
2479         struct ip6_hdr *ip6 = NULL;
2480         struct ether_vlan_header *eth = NULL;
2481         void *ulp = NULL;
2482
2483         int ehdrlen, iphlen = 0;
2484         u8 ipproto = 0;
2485         u16 etype, src_port, dst_port;
2486         u16 queue_len, counter = 0;
2487
2488         src_port = dst_port = 0;
2489         queue_len = vdev->no_of_vpath;
2490
2491         eth = mtod(mhead, struct ether_vlan_header *);
2492         if (eth->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
2493                 etype = ntohs(eth->evl_proto);
2494                 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
2495         } else {
2496                 etype = ntohs(eth->evl_encap_proto);
2497                 ehdrlen = ETHER_HDR_LEN;
2498         }
2499
2500         switch (etype) {
2501         case ETHERTYPE_IP:
2502                 ip = (struct ip *) (mhead->m_data + ehdrlen);
2503                 iphlen = ip->ip_hl << 2;
2504                 ipproto = ip->ip_p;
2505                 th = (struct tcphdr *) ((caddr_t)ip + iphlen);
2506                 uh = (struct udphdr *) ((caddr_t)ip + iphlen);
2507                 break;
2508
2509         case ETHERTYPE_IPV6:
2510                 ip6 = (struct ip6_hdr *) (mhead->m_data + ehdrlen);
2511                 iphlen = sizeof(struct ip6_hdr);
2512                 ipproto = ip6->ip6_nxt;
2513
2514                 ulp = mtod(mhead, char *) + iphlen;
2515                 th = ((struct tcphdr *) (ulp));
2516                 uh = ((struct udphdr *) (ulp));
2517                 break;
2518
2519         default:
2520                 break;
2521         }
2522
2523         switch (ipproto) {
2524         case IPPROTO_TCP:
2525                 src_port = th->th_sport;
2526                 dst_port = th->th_dport;
2527                 break;
2528
2529         case IPPROTO_UDP:
2530                 src_port = uh->uh_sport;
2531                 dst_port = uh->uh_dport;
2532                 break;
2533
2534         default:
2535                 break;
2536         }
2537
2538         counter = (ntohs(src_port) + ntohs(dst_port)) &
2539             vpath_selector[queue_len - 1];
2540
2541         if (counter >= queue_len)
2542                 counter = queue_len - 1;
2543
2544         return (counter);
2545 }
2546
2547 static inline vxge_hal_vpath_h
2548 vxge_vpath_handle_get(vxge_dev_t *vdev, int i)
2549 {
2550         return (vdev->vpaths[i].is_open ? vdev->vpaths[i].handle : NULL);
2551 }
2552
2553 int
2554 vxge_firmware_verify(vxge_dev_t *vdev)
2555 {
2556         int err = 0;
2557         u64 active_config;
2558         vxge_hal_status_e status = VXGE_HAL_FAIL;
2559
2560         if (vdev->fw_upgrade) {
2561                 status = vxge_firmware_upgrade(vdev);
2562                 if (status == VXGE_HAL_OK) {
2563                         err = ENXIO;
2564                         goto _exit0;
2565                 }
2566         }
2567
2568         if ((vdev->config.function_mode != VXGE_DEFAULT_CONFIG_VALUE) &&
2569             (vdev->config.hw_info.function_mode !=
2570             (u64) vdev->config.function_mode)) {
2571
2572                 status = vxge_func_mode_set(vdev);
2573                 if (status == VXGE_HAL_OK)
2574                         err = ENXIO;
2575         }
2576
2577         /* l2_switch configuration */
2578         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2579         status = vxge_hal_get_active_config(vdev->devh,
2580             VXGE_HAL_XMAC_NWIF_ActConfig_L2SwitchEnabled,
2581             &active_config);
2582
2583         if (status == VXGE_HAL_OK) {
2584                 vdev->l2_switch = active_config;
2585                 if (vdev->config.l2_switch != VXGE_DEFAULT_CONFIG_VALUE) {
2586                         if (vdev->config.l2_switch != active_config) {
2587                                 status = vxge_l2switch_mode_set(vdev);
2588                                 if (status == VXGE_HAL_OK)
2589                                         err = ENXIO;
2590                         }
2591                 }
2592         }
2593
2594         if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
2595                 if (vxge_port_mode_update(vdev) == ENXIO)
2596                         err = ENXIO;
2597         }
2598
2599 _exit0:
2600         if (err == ENXIO)
2601                 device_printf(vdev->ndev, "PLEASE POWER CYCLE THE SYSTEM\n");
2602
2603         return (err);
2604 }
2605
2606 vxge_hal_status_e
2607 vxge_firmware_upgrade(vxge_dev_t *vdev)
2608 {
2609         u8 *fw_buffer;
2610         u32 fw_size;
2611         vxge_hal_device_hw_info_t *hw_info;
2612         vxge_hal_status_e status = VXGE_HAL_OK;
2613
2614         hw_info = &vdev->config.hw_info;
2615
2616         fw_size = sizeof(VXGE_FW_ARRAY_NAME);
2617         fw_buffer = (u8 *) VXGE_FW_ARRAY_NAME;
2618
2619         device_printf(vdev->ndev, "Current firmware version : %s (%s)\n",
2620             hw_info->fw_version.version, hw_info->fw_date.date);
2621
2622         device_printf(vdev->ndev, "Upgrading firmware to %d.%d.%d\n",
2623             VXGE_MIN_FW_MAJOR_VERSION, VXGE_MIN_FW_MINOR_VERSION,
2624             VXGE_MIN_FW_BUILD_NUMBER);
2625
2626         /* Call HAL API to upgrade firmware */
2627         status = vxge_hal_mrpcim_fw_upgrade(vdev->pdev,
2628             (pci_reg_h) vdev->pdev->reg_map[0],
2629             (u8 *) vdev->pdev->bar_info[0],
2630             fw_buffer, fw_size);
2631
2632         device_printf(vdev->ndev, "firmware upgrade %s\n",
2633             (status == VXGE_HAL_OK) ? "successful" : "failed");
2634
2635         return (status);
2636 }
2637
2638 vxge_hal_status_e
2639 vxge_func_mode_set(vxge_dev_t *vdev)
2640 {
2641         u64 active_config;
2642         vxge_hal_status_e status = VXGE_HAL_FAIL;
2643
2644         status = vxge_hal_mrpcim_pcie_func_mode_set(vdev->devh,
2645             vdev->config.function_mode);
2646         device_printf(vdev->ndev,
2647             "function mode change %s\n",
2648             (status == VXGE_HAL_OK) ? "successful" : "failed");
2649
2650         if (status == VXGE_HAL_OK) {
2651                 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2652                     VXGE_HAL_API_FUNC_MODE_COMMIT,
2653                     0, 0ULL, 0ULL);
2654
2655                 vxge_hal_get_active_config(vdev->devh,
2656                     VXGE_HAL_XMAC_NWIF_ActConfig_NWPortMode,
2657                     &active_config);
2658
2659                 /*
2660                  * If in MF + DP mode
2661                  * if user changes to SF, change port_mode to single port mode
2662                  */
2663                 if (((is_multi_func(vdev->config.hw_info.function_mode)) &&
2664                     is_single_func(vdev->config.function_mode)) &&
2665                     (active_config == VXGE_HAL_DP_NP_MODE_DUAL_PORT)) {
2666                         vdev->config.port_mode =
2667                             VXGE_HAL_DP_NP_MODE_SINGLE_PORT;
2668
2669                         status = vxge_port_mode_set(vdev);
2670                 }
2671         }
2672         return (status);
2673 }
2674
2675 vxge_hal_status_e
2676 vxge_port_mode_set(vxge_dev_t *vdev)
2677 {
2678         vxge_hal_status_e status = VXGE_HAL_FAIL;
2679
2680         status = vxge_hal_set_port_mode(vdev->devh, vdev->config.port_mode);
2681         device_printf(vdev->ndev,
2682             "port mode change %s\n",
2683             (status == VXGE_HAL_OK) ? "successful" : "failed");
2684
2685         if (status == VXGE_HAL_OK) {
2686                 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2687                     VXGE_HAL_API_FUNC_MODE_COMMIT,
2688                     0, 0ULL, 0ULL);
2689
2690                 /* Configure vpath_mapping for active-active mode only */
2691                 if (vdev->config.port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT) {
2692
2693                         status = vxge_hal_config_vpath_map(vdev->devh,
2694                             VXGE_DUAL_PORT_MAP);
2695
2696                         device_printf(vdev->ndev, "dual port map change %s\n",
2697                             (status == VXGE_HAL_OK) ? "successful" : "failed");
2698                 }
2699         }
2700         return (status);
2701 }
2702
2703 int
2704 vxge_port_mode_update(vxge_dev_t *vdev)
2705 {
2706         int err = 0;
2707         u64 active_config;
2708         vxge_hal_status_e status = VXGE_HAL_FAIL;
2709
2710         if ((vdev->config.port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT) &&
2711             is_single_func(vdev->config.hw_info.function_mode)) {
2712
2713                 device_printf(vdev->ndev,
2714                     "Adapter in SF mode, dual port mode is not allowed\n");
2715                 err = EPERM;
2716                 goto _exit0;
2717         }
2718
2719         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2720         status = vxge_hal_get_active_config(vdev->devh,
2721             VXGE_HAL_XMAC_NWIF_ActConfig_NWPortMode,
2722             &active_config);
2723         if (status != VXGE_HAL_OK) {
2724                 err = EINVAL;
2725                 goto _exit0;
2726         }
2727
2728         vdev->port_mode = active_config;
2729         if (vdev->config.port_mode != VXGE_DEFAULT_CONFIG_VALUE) {
2730                 if (vdev->config.port_mode != vdev->port_mode) {
2731                         status = vxge_port_mode_set(vdev);
2732                         if (status != VXGE_HAL_OK) {
2733                                 err = EINVAL;
2734                                 goto _exit0;
2735                         }
2736                         err = ENXIO;
2737                         vdev->port_mode  = vdev->config.port_mode;
2738                 }
2739         }
2740
2741         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2742         status = vxge_hal_get_active_config(vdev->devh,
2743             VXGE_HAL_XMAC_NWIF_ActConfig_BehaviourOnFail,
2744             &active_config);
2745         if (status != VXGE_HAL_OK) {
2746                 err = EINVAL;
2747                 goto _exit0;
2748         }
2749
2750         vdev->port_failure = active_config;
2751
2752         /*
2753          * active/active mode : set to NoMove
2754          * active/passive mode: set to Failover-Failback
2755          */
2756         if (vdev->port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT)
2757                 vdev->config.port_failure =
2758                     VXGE_HAL_XMAC_NWIF_OnFailure_NoMove;
2759
2760         else if (vdev->port_mode == VXGE_HAL_DP_NP_MODE_ACTIVE_PASSIVE)
2761                 vdev->config.port_failure =
2762                     VXGE_HAL_XMAC_NWIF_OnFailure_OtherPortBackOnRestore;
2763
2764         if ((vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT) &&
2765             (vdev->config.port_failure != vdev->port_failure)) {
2766                 status = vxge_port_behavior_on_failure_set(vdev);
2767                 if (status == VXGE_HAL_OK)
2768                         err = ENXIO;
2769         }
2770
2771 _exit0:
2772         return (err);
2773 }
2774
2775 vxge_hal_status_e
2776 vxge_port_mode_get(vxge_dev_t *vdev, vxge_port_info_t *port_info)
2777 {
2778         int err = 0;
2779         u64 active_config;
2780         vxge_hal_status_e status = VXGE_HAL_FAIL;
2781
2782         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2783         status = vxge_hal_get_active_config(vdev->devh,
2784             VXGE_HAL_XMAC_NWIF_ActConfig_NWPortMode,
2785             &active_config);
2786
2787         if (status != VXGE_HAL_OK) {
2788                 err = ENXIO;
2789                 goto _exit0;
2790         }
2791
2792         port_info->port_mode = active_config;
2793
2794         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2795         status = vxge_hal_get_active_config(vdev->devh,
2796             VXGE_HAL_XMAC_NWIF_ActConfig_BehaviourOnFail,
2797             &active_config);
2798         if (status != VXGE_HAL_OK) {
2799                 err = ENXIO;
2800                 goto _exit0;
2801         }
2802
2803         port_info->port_failure = active_config;
2804
2805 _exit0:
2806         return (err);
2807 }
2808
2809 vxge_hal_status_e
2810 vxge_port_behavior_on_failure_set(vxge_dev_t *vdev)
2811 {
2812         vxge_hal_status_e status = VXGE_HAL_FAIL;
2813
2814         status = vxge_hal_set_behavior_on_failure(vdev->devh,
2815             vdev->config.port_failure);
2816
2817         device_printf(vdev->ndev,
2818             "port behaviour on failure change %s\n",
2819             (status == VXGE_HAL_OK) ? "successful" : "failed");
2820
2821         if (status == VXGE_HAL_OK)
2822                 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2823                     VXGE_HAL_API_FUNC_MODE_COMMIT,
2824                     0, 0ULL, 0ULL);
2825
2826         return (status);
2827 }
2828
2829 void
2830 vxge_active_port_update(vxge_dev_t *vdev)
2831 {
2832         u64 active_config;
2833         vxge_hal_status_e status = VXGE_HAL_FAIL;
2834
2835         active_config = VXGE_DEFAULT_CONFIG_VALUE;
2836         status = vxge_hal_get_active_config(vdev->devh,
2837             VXGE_HAL_XMAC_NWIF_ActConfig_ActivePort,
2838             &active_config);
2839
2840         if (status == VXGE_HAL_OK)
2841                 vdev->active_port = active_config;
2842 }
2843
2844 vxge_hal_status_e
2845 vxge_l2switch_mode_set(vxge_dev_t *vdev)
2846 {
2847         vxge_hal_status_e status = VXGE_HAL_FAIL;
2848
2849         status = vxge_hal_set_l2switch_mode(vdev->devh,
2850             vdev->config.l2_switch);
2851
2852         device_printf(vdev->ndev, "L2 switch %s\n",
2853             (status == VXGE_HAL_OK) ?
2854             (vdev->config.l2_switch) ? "enable" : "disable" :
2855             "change failed");
2856
2857         if (status == VXGE_HAL_OK)
2858                 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2859                     VXGE_HAL_API_FUNC_MODE_COMMIT,
2860                     0, 0ULL, 0ULL);
2861
2862         return (status);
2863 }
2864
2865 /*
2866  * vxge_promisc_set
2867  * Enable Promiscuous Mode
2868  */
2869 void
2870 vxge_promisc_set(vxge_dev_t *vdev)
2871 {
2872         int i;
2873         ifnet_t ifp;
2874         vxge_hal_vpath_h vpath_handle;
2875
2876         if (!vdev->is_initialized)
2877                 return;
2878
2879         ifp = vdev->ifp;
2880
2881         for (i = 0; i < vdev->no_of_vpath; i++) {
2882                 vpath_handle = vxge_vpath_handle_get(vdev, i);
2883                 if (!vpath_handle)
2884                         continue;
2885
2886                 if (ifp->if_flags & IFF_PROMISC)
2887                         vxge_hal_vpath_promisc_enable(vpath_handle);
2888                 else
2889                         vxge_hal_vpath_promisc_disable(vpath_handle);
2890         }
2891 }
2892
2893 /*
2894  * vxge_change_mtu
2895  * Change interface MTU to a requested valid size
2896  */
2897 int
2898 vxge_change_mtu(vxge_dev_t *vdev, unsigned long new_mtu)
2899 {
2900         int err = EINVAL;
2901
2902         if ((new_mtu < VXGE_HAL_MIN_MTU) || (new_mtu > VXGE_HAL_MAX_MTU))
2903                 goto _exit0;
2904
2905         (vdev->ifp)->if_mtu = new_mtu;
2906         device_printf(vdev->ndev, "MTU changed to %u\n", (vdev->ifp)->if_mtu);
2907
2908         if (vdev->is_initialized) {
2909                 if_down(vdev->ifp);
2910                 vxge_reset(vdev);
2911                 if_up(vdev->ifp);
2912         }
2913         err = 0;
2914
2915 _exit0:
2916         return (err);
2917 }
2918
2919 /*
2920  * Creates DMA tags for both Tx and Rx
2921  */
2922 int
2923 vxge_dma_tags_create(vxge_vpath_t *vpath)
2924 {
2925         int err = 0;
2926         bus_size_t max_size, boundary;
2927         vxge_dev_t *vdev = vpath->vdev;
2928         ifnet_t ifp = vdev->ifp;
2929
2930         max_size = ifp->if_mtu +
2931             VXGE_HAL_MAC_HEADER_MAX_SIZE +
2932             VXGE_HAL_HEADER_ETHERNET_II_802_3_ALIGN;
2933
2934         VXGE_BUFFER_ALIGN(max_size, 128)
2935         if (max_size <= MCLBYTES)
2936                 vdev->rx_mbuf_sz = MCLBYTES;
2937         else
2938                 vdev->rx_mbuf_sz =
2939                     (max_size > MJUMPAGESIZE) ? MJUM9BYTES : MJUMPAGESIZE;
2940
2941         boundary = (max_size > PAGE_SIZE) ? 0 : PAGE_SIZE;
2942
2943         /* DMA tag for Tx */
2944         err = bus_dma_tag_create(
2945             bus_get_dma_tag(vdev->ndev),
2946             1,
2947             PAGE_SIZE,
2948             BUS_SPACE_MAXADDR,
2949             BUS_SPACE_MAXADDR,
2950             NULL,
2951             NULL,
2952             VXGE_TSO_SIZE,
2953             VXGE_MAX_SEGS,
2954             PAGE_SIZE,
2955             BUS_DMA_ALLOCNOW,
2956             NULL,
2957             NULL,
2958             &(vpath->dma_tag_tx));
2959         if (err != 0)
2960                 goto _exit0;
2961
2962         /* DMA tag for Rx */
2963         err = bus_dma_tag_create(
2964             bus_get_dma_tag(vdev->ndev),
2965             1,
2966             boundary,
2967             BUS_SPACE_MAXADDR,
2968             BUS_SPACE_MAXADDR,
2969             NULL,
2970             NULL,
2971             vdev->rx_mbuf_sz,
2972             1,
2973             vdev->rx_mbuf_sz,
2974             BUS_DMA_ALLOCNOW,
2975             NULL,
2976             NULL,
2977             &(vpath->dma_tag_rx));
2978         if (err != 0)
2979                 goto _exit1;
2980
2981         /* Create DMA map for this descriptor */
2982         err = bus_dmamap_create(vpath->dma_tag_rx, BUS_DMA_NOWAIT,
2983             &vpath->extra_dma_map);
2984         if (err == 0)
2985                 goto _exit0;
2986
2987         bus_dma_tag_destroy(vpath->dma_tag_rx);
2988
2989 _exit1:
2990         bus_dma_tag_destroy(vpath->dma_tag_tx);
2991
2992 _exit0:
2993         return (err);
2994 }
2995
2996 static inline int
2997 vxge_dma_mbuf_coalesce(bus_dma_tag_t dma_tag_tx, bus_dmamap_t dma_map,
2998     mbuf_t * m_headp, bus_dma_segment_t * dma_buffers,
2999     int *num_segs)
3000 {
3001         int err = 0;
3002         mbuf_t mbuf_pkt = NULL;
3003
3004 retry:
3005         err = bus_dmamap_load_mbuf_sg(dma_tag_tx, dma_map, *m_headp,
3006             dma_buffers, num_segs, BUS_DMA_NOWAIT);
3007         if (err == EFBIG) {
3008                 /* try to defrag, too many segments */
3009                 mbuf_pkt = m_defrag(*m_headp, M_NOWAIT);
3010                 if (mbuf_pkt == NULL) {
3011                         err = ENOBUFS;
3012                         goto _exit0;
3013                 }
3014                 *m_headp = mbuf_pkt;
3015                 goto retry;
3016         }
3017
3018 _exit0:
3019         return (err);
3020 }
3021
3022 int
3023 vxge_device_hw_info_get(vxge_dev_t *vdev)
3024 {
3025         int i, err = ENXIO;
3026         u64 vpath_mask = 0;
3027         u32 max_supported_vpath = 0;
3028         u32 fw_ver_maj_min;
3029         vxge_firmware_upgrade_e fw_option;
3030
3031         vxge_hal_status_e status = VXGE_HAL_OK;
3032         vxge_hal_device_hw_info_t *hw_info;
3033
3034         status = vxge_hal_device_hw_info_get(vdev->pdev,
3035             (pci_reg_h) vdev->pdev->reg_map[0],
3036             (u8 *) vdev->pdev->bar_info[0],
3037             &vdev->config.hw_info);
3038
3039         if (status != VXGE_HAL_OK)
3040                 goto _exit0;
3041
3042         hw_info = &vdev->config.hw_info;
3043
3044         vpath_mask = hw_info->vpath_mask;
3045         if (vpath_mask == 0) {
3046                 device_printf(vdev->ndev, "No vpaths available in device\n");
3047                 goto _exit0;
3048         }
3049
3050         fw_option = vdev->config.fw_option;
3051
3052         /* Check how many vpaths are available */
3053         for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
3054                 if (!((vpath_mask) & mBIT(i)))
3055                         continue;
3056                 max_supported_vpath++;
3057         }
3058
3059         vdev->max_supported_vpath = max_supported_vpath;
3060         status = vxge_hal_device_is_privileged(hw_info->host_type,
3061             hw_info->func_id);
3062         vdev->is_privilaged = (status == VXGE_HAL_OK) ? TRUE : FALSE;
3063
3064         vdev->hw_fw_version = VXGE_FW_VERSION(
3065             hw_info->fw_version.major,
3066             hw_info->fw_version.minor,
3067             hw_info->fw_version.build);
3068
3069         fw_ver_maj_min =
3070             VXGE_FW_MAJ_MIN_VERSION(hw_info->fw_version.major,
3071             hw_info->fw_version.minor);
3072
3073         if ((fw_option >= VXGE_FW_UPGRADE_FORCE) ||
3074             (vdev->hw_fw_version != VXGE_DRV_FW_VERSION)) {
3075
3076                 /* For fw_ver 1.8.1 and above ignore build number. */
3077                 if ((fw_option == VXGE_FW_UPGRADE_ALL) &&
3078                     ((vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 1)) &&
3079                     (fw_ver_maj_min == VXGE_DRV_FW_MAJ_MIN_VERSION))) {
3080                         goto _exit1;
3081                 }
3082
3083                 if (vdev->hw_fw_version < VXGE_BASE_FW_VERSION) {
3084                         device_printf(vdev->ndev,
3085                             "Upgrade driver through vxge_update, "
3086                             "Unable to load the driver.\n");
3087                         goto _exit0;
3088                 }
3089                 vdev->fw_upgrade = TRUE;
3090         }
3091
3092 _exit1:
3093         err = 0;
3094
3095 _exit0:
3096         return (err);
3097 }
3098
3099 /*
3100  * vxge_device_hw_info_print
3101  * Print device and driver information
3102  */
3103 void
3104 vxge_device_hw_info_print(vxge_dev_t *vdev)
3105 {
3106         u32 i;
3107         device_t ndev;
3108         struct sysctl_ctx_list *ctx;
3109         struct sysctl_oid_list *children;
3110         char pmd_type[2][VXGE_PMD_INFO_LEN];
3111
3112         vxge_hal_device_t *hldev;
3113         vxge_hal_device_hw_info_t *hw_info;
3114         vxge_hal_device_pmd_info_t *pmd_port;
3115
3116         hldev = vdev->devh;
3117         ndev = vdev->ndev;
3118
3119         ctx = device_get_sysctl_ctx(ndev);
3120         children = SYSCTL_CHILDREN(device_get_sysctl_tree(ndev));
3121
3122         hw_info = &(vdev->config.hw_info);
3123
3124         snprintf(vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION],
3125             sizeof(vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION]),
3126             "%d.%d.%d.%d", XGELL_VERSION_MAJOR, XGELL_VERSION_MINOR,
3127             XGELL_VERSION_FIX, XGELL_VERSION_BUILD);
3128
3129         /* Print PCI-e bus type/speed/width info */
3130         snprintf(vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO],
3131             sizeof(vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO]),
3132             "x%d", hldev->link_width);
3133
3134         if (hldev->link_width <= VXGE_HAL_PCI_E_LINK_WIDTH_X4)
3135                 device_printf(ndev, "For optimal performance a x8 "
3136                     "PCI-Express slot is required.\n");
3137
3138         vxge_null_terminate((char *) hw_info->serial_number,
3139             sizeof(hw_info->serial_number));
3140
3141         vxge_null_terminate((char *) hw_info->part_number,
3142             sizeof(hw_info->part_number));
3143
3144         snprintf(vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO],
3145             sizeof(vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO]),
3146             "%s", hw_info->serial_number);
3147
3148         snprintf(vdev->config.nic_attr[VXGE_PRINT_PART_NO],
3149             sizeof(vdev->config.nic_attr[VXGE_PRINT_PART_NO]),
3150             "%s", hw_info->part_number);
3151
3152         snprintf(vdev->config.nic_attr[VXGE_PRINT_FW_VERSION],
3153             sizeof(vdev->config.nic_attr[VXGE_PRINT_FW_VERSION]),
3154             "%s", hw_info->fw_version.version);
3155
3156         snprintf(vdev->config.nic_attr[VXGE_PRINT_FW_DATE],
3157             sizeof(vdev->config.nic_attr[VXGE_PRINT_FW_DATE]),
3158             "%s", hw_info->fw_date.date);
3159
3160         pmd_port = &(hw_info->pmd_port0);
3161         for (i = 0; i < hw_info->ports; i++) {
3162
3163                 vxge_pmd_port_type_get(vdev, pmd_port->type,
3164                     pmd_type[i], sizeof(pmd_type[i]));
3165
3166                 strncpy(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i],
3167                     "vendor=??, sn=??, pn=??, type=??",
3168                     sizeof(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i]));
3169
3170                 vxge_null_terminate(pmd_port->vendor, sizeof(pmd_port->vendor));
3171                 if (strlen(pmd_port->vendor) == 0) {
3172                         pmd_port = &(hw_info->pmd_port1);
3173                         continue;
3174                 }
3175
3176                 vxge_null_terminate(pmd_port->ser_num,
3177                     sizeof(pmd_port->ser_num));
3178
3179                 vxge_null_terminate(pmd_port->part_num,
3180                     sizeof(pmd_port->part_num));
3181
3182                 snprintf(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i],
3183                     sizeof(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i]),
3184                     "vendor=%s, sn=%s, pn=%s, type=%s",
3185                     pmd_port->vendor, pmd_port->ser_num,
3186                     pmd_port->part_num, pmd_type[i]);
3187
3188                 pmd_port = &(hw_info->pmd_port1);
3189         }
3190
3191         switch (hw_info->function_mode) {
3192         case VXGE_HAL_PCIE_FUNC_MODE_SF1_VP17:
3193                 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3194                     sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3195                     "%s %d %s", "Single Function - 1 function(s)",
3196                     vdev->max_supported_vpath, "VPath(s)/function");
3197                 break;
3198
3199         case VXGE_HAL_PCIE_FUNC_MODE_MF2_VP8:
3200                 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3201                     sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3202                     "%s %d %s", "Multi Function - 2 function(s)",
3203                     vdev->max_supported_vpath, "VPath(s)/function");
3204                 break;
3205
3206         case VXGE_HAL_PCIE_FUNC_MODE_MF4_VP4:
3207                 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3208                     sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3209                     "%s %d %s", "Multi Function - 4 function(s)",
3210                     vdev->max_supported_vpath, "VPath(s)/function");
3211                 break;
3212
3213         case VXGE_HAL_PCIE_FUNC_MODE_MF8_VP2:
3214                 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3215                     sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3216                     "%s %d %s", "Multi Function - 8 function(s)",
3217                     vdev->max_supported_vpath, "VPath(s)/function");
3218                 break;
3219
3220         case VXGE_HAL_PCIE_FUNC_MODE_MF8P_VP2:
3221                 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3222                     sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3223                     "%s %d %s", "Multi Function (DirectIO) - 8 function(s)",
3224                     vdev->max_supported_vpath, "VPath(s)/function");
3225                 break;
3226         }
3227
3228         snprintf(vdev->config.nic_attr[VXGE_PRINT_INTR_MODE],
3229             sizeof(vdev->config.nic_attr[VXGE_PRINT_INTR_MODE]),
3230             "%s", ((vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) ?
3231             "MSI-X" : "INTA"));
3232
3233         snprintf(vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT],
3234             sizeof(vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT]),
3235             "%d", vdev->no_of_vpath);
3236
3237         snprintf(vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE],
3238             sizeof(vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE]),
3239             "%u", vdev->ifp->if_mtu);
3240
3241         snprintf(vdev->config.nic_attr[VXGE_PRINT_LRO_MODE],
3242             sizeof(vdev->config.nic_attr[VXGE_PRINT_LRO_MODE]),
3243             "%s", ((vdev->config.lro_enable) ? "Enabled" : "Disabled"));
3244
3245         snprintf(vdev->config.nic_attr[VXGE_PRINT_RTH_MODE],
3246             sizeof(vdev->config.nic_attr[VXGE_PRINT_RTH_MODE]),
3247             "%s", ((vdev->config.rth_enable) ? "Enabled" : "Disabled"));
3248
3249         snprintf(vdev->config.nic_attr[VXGE_PRINT_TSO_MODE],
3250             sizeof(vdev->config.nic_attr[VXGE_PRINT_TSO_MODE]),
3251             "%s", ((vdev->ifp->if_capenable & IFCAP_TSO4) ?
3252             "Enabled" : "Disabled"));
3253
3254         snprintf(vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE],
3255             sizeof(vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE]),
3256             "%s", ((hw_info->ports == 1) ? "Single Port" : "Dual Port"));
3257
3258         if (vdev->is_privilaged) {
3259
3260                 if (hw_info->ports > 1) {
3261
3262                         snprintf(vdev->config.nic_attr[VXGE_PRINT_PORT_MODE],
3263                             sizeof(vdev->config.nic_attr[VXGE_PRINT_PORT_MODE]),
3264                             "%s", vxge_port_mode[vdev->port_mode]);
3265
3266                         if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3267                                 snprintf(vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE],
3268                                     sizeof(vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE]),
3269                                     "%s", vxge_port_failure[vdev->port_failure]);
3270
3271                         vxge_active_port_update(vdev);
3272                         snprintf(vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT],
3273                             sizeof(vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT]),
3274                             "%lld", vdev->active_port);
3275                 }
3276
3277                 if (!is_single_func(hw_info->function_mode)) {
3278                         snprintf(vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE],
3279                             sizeof(vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE]),
3280                             "%s", ((vdev->l2_switch) ? "Enabled" : "Disabled"));
3281                 }
3282         }
3283
3284         device_printf(ndev, "Driver version\t: %s\n",
3285             vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION]);
3286
3287         device_printf(ndev, "Serial number\t: %s\n",
3288             vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO]);
3289
3290         device_printf(ndev, "Part number\t: %s\n",
3291             vdev->config.nic_attr[VXGE_PRINT_PART_NO]);
3292
3293         device_printf(ndev, "Firmware version\t: %s\n",
3294             vdev->config.nic_attr[VXGE_PRINT_FW_VERSION]);
3295
3296         device_printf(ndev, "Firmware date\t: %s\n",
3297             vdev->config.nic_attr[VXGE_PRINT_FW_DATE]);
3298
3299         device_printf(ndev, "Link width\t: %s\n",
3300             vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO]);
3301
3302         if (vdev->is_privilaged) {
3303                 device_printf(ndev, "Function mode\t: %s\n",
3304                     vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]);
3305         }
3306
3307         device_printf(ndev, "Interrupt type\t: %s\n",
3308             vdev->config.nic_attr[VXGE_PRINT_INTR_MODE]);
3309
3310         device_printf(ndev, "VPath(s) opened\t: %s\n",
3311             vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT]);
3312
3313         device_printf(ndev, "Adapter Type\t: %s\n",
3314             vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE]);
3315
3316         device_printf(ndev, "PMD Port 0\t: %s\n",
3317             vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0]);
3318
3319         if (hw_info->ports > 1) {
3320                 device_printf(ndev, "PMD Port 1\t: %s\n",
3321                     vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_1]);
3322
3323                 if (vdev->is_privilaged) {
3324                         device_printf(ndev, "Port Mode\t: %s\n",
3325                             vdev->config.nic_attr[VXGE_PRINT_PORT_MODE]);
3326
3327                         if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3328                                 device_printf(ndev, "Port Failure\t: %s\n",
3329                                     vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE]);
3330
3331                         device_printf(vdev->ndev, "Active Port\t: %s\n",
3332                             vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT]);
3333                 }
3334         }
3335
3336         if (vdev->is_privilaged && !is_single_func(hw_info->function_mode)) {
3337                 device_printf(vdev->ndev, "L2 Switch\t: %s\n",
3338                     vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE]);
3339         }
3340
3341         device_printf(ndev, "MTU is %s\n",
3342             vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE]);
3343
3344         device_printf(ndev, "LRO %s\n",
3345             vdev->config.nic_attr[VXGE_PRINT_LRO_MODE]);
3346
3347         device_printf(ndev, "RTH %s\n",
3348             vdev->config.nic_attr[VXGE_PRINT_RTH_MODE]);
3349
3350         device_printf(ndev, "TSO %s\n",
3351             vdev->config.nic_attr[VXGE_PRINT_TSO_MODE]);
3352
3353         SYSCTL_ADD_STRING(ctx, children,
3354             OID_AUTO, "Driver version", CTLFLAG_RD,
3355             vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION],
3356             0, "Driver version");
3357
3358         SYSCTL_ADD_STRING(ctx, children,
3359             OID_AUTO, "Serial number", CTLFLAG_RD,
3360             vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO],
3361             0, "Serial number");
3362
3363         SYSCTL_ADD_STRING(ctx, children,
3364             OID_AUTO, "Part number", CTLFLAG_RD,
3365             vdev->config.nic_attr[VXGE_PRINT_PART_NO],
3366             0, "Part number");
3367
3368         SYSCTL_ADD_STRING(ctx, children,
3369             OID_AUTO, "Firmware version", CTLFLAG_RD,
3370             vdev->config.nic_attr[VXGE_PRINT_FW_VERSION],
3371             0, "Firmware version");
3372
3373         SYSCTL_ADD_STRING(ctx, children,
3374             OID_AUTO, "Firmware date", CTLFLAG_RD,
3375             vdev->config.nic_attr[VXGE_PRINT_FW_DATE],
3376             0, "Firmware date");
3377
3378         SYSCTL_ADD_STRING(ctx, children,
3379             OID_AUTO, "Link width", CTLFLAG_RD,
3380             vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO],
3381             0, "Link width");
3382
3383         if (vdev->is_privilaged) {
3384                 SYSCTL_ADD_STRING(ctx, children,
3385                     OID_AUTO, "Function mode", CTLFLAG_RD,
3386                     vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3387                     0, "Function mode");
3388         }
3389
3390         SYSCTL_ADD_STRING(ctx, children,
3391             OID_AUTO, "Interrupt type", CTLFLAG_RD,
3392             vdev->config.nic_attr[VXGE_PRINT_INTR_MODE],
3393             0, "Interrupt type");
3394
3395         SYSCTL_ADD_STRING(ctx, children,
3396             OID_AUTO, "VPath(s) opened", CTLFLAG_RD,
3397             vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT],
3398             0, "VPath(s) opened");
3399
3400         SYSCTL_ADD_STRING(ctx, children,
3401             OID_AUTO, "Adapter Type", CTLFLAG_RD,
3402             vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE],
3403             0, "Adapter Type");
3404
3405         SYSCTL_ADD_STRING(ctx, children,
3406             OID_AUTO, "pmd port 0", CTLFLAG_RD,
3407             vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0],
3408             0, "pmd port");
3409
3410         if (hw_info->ports > 1) {
3411
3412                 SYSCTL_ADD_STRING(ctx, children,
3413                     OID_AUTO, "pmd port 1", CTLFLAG_RD,
3414                     vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_1],
3415                     0, "pmd port");
3416
3417                 if (vdev->is_privilaged) {
3418                         SYSCTL_ADD_STRING(ctx, children,
3419                             OID_AUTO, "Port Mode", CTLFLAG_RD,
3420                             vdev->config.nic_attr[VXGE_PRINT_PORT_MODE],
3421                             0, "Port Mode");
3422
3423                         if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3424                                 SYSCTL_ADD_STRING(ctx, children,
3425                                     OID_AUTO, "Port Failure", CTLFLAG_RD,
3426                                     vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE],
3427                                     0, "Port Failure");
3428
3429                         SYSCTL_ADD_STRING(ctx, children,
3430                             OID_AUTO, "L2 Switch", CTLFLAG_RD,
3431                             vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE],
3432                             0, "L2 Switch");
3433                 }
3434         }
3435
3436         SYSCTL_ADD_STRING(ctx, children,
3437             OID_AUTO, "LRO mode", CTLFLAG_RD,
3438             vdev->config.nic_attr[VXGE_PRINT_LRO_MODE],
3439             0, "LRO mode");
3440
3441         SYSCTL_ADD_STRING(ctx, children,
3442             OID_AUTO, "RTH mode", CTLFLAG_RD,
3443             vdev->config.nic_attr[VXGE_PRINT_RTH_MODE],
3444             0, "RTH mode");
3445
3446         SYSCTL_ADD_STRING(ctx, children,
3447             OID_AUTO, "TSO mode", CTLFLAG_RD,
3448             vdev->config.nic_attr[VXGE_PRINT_TSO_MODE],
3449             0, "TSO mode");
3450 }
3451
3452 void
3453 vxge_pmd_port_type_get(vxge_dev_t *vdev, u32 port_type,
3454     char *ifm_name, u8 ifm_len)
3455 {
3456
3457         vdev->ifm_optics = IFM_UNKNOWN;
3458
3459         switch (port_type) {
3460         case VXGE_HAL_DEVICE_PMD_TYPE_10G_SR:
3461                 vdev->ifm_optics = IFM_10G_SR;
3462                 strlcpy(ifm_name, "10GbE SR", ifm_len);
3463                 break;
3464
3465         case VXGE_HAL_DEVICE_PMD_TYPE_10G_LR:
3466                 vdev->ifm_optics = IFM_10G_LR;
3467                 strlcpy(ifm_name, "10GbE LR", ifm_len);
3468                 break;
3469
3470         case VXGE_HAL_DEVICE_PMD_TYPE_10G_LRM:
3471                 vdev->ifm_optics = IFM_10G_LRM;
3472                 strlcpy(ifm_name, "10GbE LRM", ifm_len);
3473                 break;
3474
3475         case VXGE_HAL_DEVICE_PMD_TYPE_10G_DIRECT:
3476                 vdev->ifm_optics = IFM_10G_TWINAX;
3477                 strlcpy(ifm_name, "10GbE DA (Direct Attached)", ifm_len);
3478                 break;
3479
3480         case VXGE_HAL_DEVICE_PMD_TYPE_10G_CX4:
3481                 vdev->ifm_optics = IFM_10G_CX4;
3482                 strlcpy(ifm_name, "10GbE CX4", ifm_len);
3483                 break;
3484
3485         case VXGE_HAL_DEVICE_PMD_TYPE_10G_BASE_T:
3486 #if __FreeBSD_version >= 800000
3487                 vdev->ifm_optics = IFM_10G_T;
3488 #endif
3489                 strlcpy(ifm_name, "10GbE baseT", ifm_len);
3490                 break;
3491
3492         case VXGE_HAL_DEVICE_PMD_TYPE_10G_OTHER:
3493                 strlcpy(ifm_name, "10GbE Other", ifm_len);
3494                 break;
3495
3496         case VXGE_HAL_DEVICE_PMD_TYPE_1G_SX:
3497                 vdev->ifm_optics = IFM_1000_SX;
3498                 strlcpy(ifm_name, "1GbE SX", ifm_len);
3499                 break;
3500
3501         case VXGE_HAL_DEVICE_PMD_TYPE_1G_LX:
3502                 vdev->ifm_optics = IFM_1000_LX;
3503                 strlcpy(ifm_name, "1GbE LX", ifm_len);
3504                 break;
3505
3506         case VXGE_HAL_DEVICE_PMD_TYPE_1G_CX:
3507                 vdev->ifm_optics = IFM_1000_CX;
3508                 strlcpy(ifm_name, "1GbE CX", ifm_len);
3509                 break;
3510
3511         case VXGE_HAL_DEVICE_PMD_TYPE_1G_BASE_T:
3512                 vdev->ifm_optics = IFM_1000_T;
3513                 strlcpy(ifm_name, "1GbE baseT", ifm_len);
3514                 break;
3515
3516         case VXGE_HAL_DEVICE_PMD_TYPE_1G_DIRECT:
3517                 strlcpy(ifm_name, "1GbE DA (Direct Attached)",
3518                     ifm_len);
3519                 break;
3520
3521         case VXGE_HAL_DEVICE_PMD_TYPE_1G_CX4:
3522                 strlcpy(ifm_name, "1GbE CX4", ifm_len);
3523                 break;
3524
3525         case VXGE_HAL_DEVICE_PMD_TYPE_1G_OTHER:
3526                 strlcpy(ifm_name, "1GbE Other", ifm_len);
3527                 break;
3528
3529         default:
3530         case VXGE_HAL_DEVICE_PMD_TYPE_UNKNOWN:
3531                 strlcpy(ifm_name, "UNSUP", ifm_len);
3532                 break;
3533         }
3534 }
3535
3536 u32
3537 vxge_ring_length_get(u32 buffer_mode)
3538 {
3539         return (VXGE_DEFAULT_RING_BLOCK *
3540             vxge_hal_ring_rxds_per_block_get(buffer_mode));
3541 }
3542
3543 /*
3544  * Removes trailing spaces padded
3545  * and NULL terminates strings
3546  */
3547 static inline void
3548 vxge_null_terminate(char *str, size_t len)
3549 {
3550         len--;
3551         while (*str && (*str != ' ') && (len != 0))
3552                 ++str;
3553
3554         --len;
3555         if (*str)
3556                 *str = '\0';
3557 }
3558
3559 /*
3560  * vxge_ioctl
3561  * Callback to control the device
3562  */
3563 int
3564 vxge_ioctl(ifnet_t ifp, u_long command, caddr_t data)
3565 {
3566         int mask, err = 0;
3567         vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
3568         struct ifreq *ifr = (struct ifreq *) data;
3569
3570         if (!vdev->is_active)
3571                 return (EBUSY);
3572
3573         switch (command) {
3574                 /* Set/Get ifnet address */
3575         case SIOCSIFADDR:
3576         case SIOCGIFADDR:
3577                 ether_ioctl(ifp, command, data);
3578                 break;
3579
3580                 /* Set Interface MTU */
3581         case SIOCSIFMTU:
3582                 err = vxge_change_mtu(vdev, (unsigned long)ifr->ifr_mtu);
3583                 break;
3584
3585                 /* Set Interface Flags */
3586         case SIOCSIFFLAGS:
3587                 VXGE_DRV_LOCK(vdev);
3588                 if (ifp->if_flags & IFF_UP) {
3589                         if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) {
3590                                 if ((ifp->if_flags ^ vdev->if_flags) &
3591                                     (IFF_PROMISC | IFF_ALLMULTI))
3592                                         vxge_promisc_set(vdev);
3593                         } else {
3594                                 vxge_init_locked(vdev);
3595                         }
3596                 } else {
3597                         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
3598                                 vxge_stop_locked(vdev);
3599                 }
3600                 vdev->if_flags = ifp->if_flags;
3601                 VXGE_DRV_UNLOCK(vdev);
3602                 break;
3603
3604                 /* Add/delete multicast address */
3605         case SIOCADDMULTI:
3606         case SIOCDELMULTI:
3607                 break;
3608
3609                 /* Get/Set Interface Media */
3610         case SIOCSIFMEDIA:
3611         case SIOCGIFMEDIA:
3612                 err = ifmedia_ioctl(ifp, ifr, &vdev->media, command);
3613                 break;
3614
3615                 /* Set Capabilities */
3616         case SIOCSIFCAP:
3617                 VXGE_DRV_LOCK(vdev);
3618                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
3619
3620                 if (mask & IFCAP_TXCSUM) {
3621                         ifp->if_capenable ^= IFCAP_TXCSUM;
3622                         ifp->if_hwassist ^= (CSUM_TCP | CSUM_UDP | CSUM_IP);
3623
3624                         if ((ifp->if_capenable & IFCAP_TSO) &&
3625                             !(ifp->if_capenable & IFCAP_TXCSUM)) {
3626
3627                                 ifp->if_capenable &= ~IFCAP_TSO;
3628                                 ifp->if_hwassist &= ~CSUM_TSO;
3629                                 if_printf(ifp, "TSO Disabled\n");
3630                         }
3631                 }
3632                 if (mask & IFCAP_RXCSUM)
3633                         ifp->if_capenable ^= IFCAP_RXCSUM;
3634
3635                 if (mask & IFCAP_TSO4) {
3636                         ifp->if_capenable ^= IFCAP_TSO4;
3637
3638                         if (ifp->if_capenable & IFCAP_TSO) {
3639                                 if (ifp->if_capenable & IFCAP_TXCSUM) {
3640                                         ifp->if_hwassist |= CSUM_TSO;
3641                                         if_printf(ifp, "TSO Enabled\n");
3642                                 } else {
3643                                         ifp->if_capenable &= ~IFCAP_TSO;
3644                                         ifp->if_hwassist &= ~CSUM_TSO;
3645                                         if_printf(ifp,
3646                                             "Enable tx checksum offload \
3647                                              first.\n");
3648                                         err = EAGAIN;
3649                                 }
3650                         } else {
3651                                 ifp->if_hwassist &= ~CSUM_TSO;
3652                                 if_printf(ifp, "TSO Disabled\n");
3653                         }
3654                 }
3655                 if (mask & IFCAP_LRO)
3656                         ifp->if_capenable ^= IFCAP_LRO;
3657
3658                 if (mask & IFCAP_VLAN_HWTAGGING)
3659                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
3660
3661                 if (mask & IFCAP_VLAN_MTU)
3662                         ifp->if_capenable ^= IFCAP_VLAN_MTU;
3663
3664                 if (mask & IFCAP_VLAN_HWCSUM)
3665                         ifp->if_capenable ^= IFCAP_VLAN_HWCSUM;
3666
3667 #if __FreeBSD_version >= 800000
3668                 if (mask & IFCAP_VLAN_HWTSO)
3669                         ifp->if_capenable ^= IFCAP_VLAN_HWTSO;
3670 #endif
3671
3672 #if defined(VLAN_CAPABILITIES)
3673                 VLAN_CAPABILITIES(ifp);
3674 #endif
3675
3676                 VXGE_DRV_UNLOCK(vdev);
3677                 break;
3678
3679         case SIOCGPRIVATE_0:
3680                 VXGE_DRV_LOCK(vdev);
3681                 err = vxge_ioctl_stats(vdev, ifr);
3682                 VXGE_DRV_UNLOCK(vdev);
3683                 break;
3684
3685         case SIOCGPRIVATE_1:
3686                 VXGE_DRV_LOCK(vdev);
3687                 err = vxge_ioctl_regs(vdev, ifr);
3688                 VXGE_DRV_UNLOCK(vdev);
3689                 break;
3690
3691         default:
3692                 err = ether_ioctl(ifp, command, data);
3693                 break;
3694         }
3695
3696         return (err);
3697 }
3698
3699 /*
3700  * vxge_ioctl_regs
3701  * IOCTL to get registers
3702  */
3703 int
3704 vxge_ioctl_regs(vxge_dev_t *vdev, struct ifreq *ifr)
3705 {
3706         u64 value = 0x0;
3707         u32 vp_id = 0;
3708         u32 offset, reqd_size = 0;
3709         int i, err = EINVAL;
3710
3711         char *command = (char *) ifr->ifr_data;
3712         void *reg_info = (void *) ifr->ifr_data;
3713
3714         vxge_vpath_t *vpath;
3715         vxge_hal_status_e status = VXGE_HAL_OK;
3716         vxge_hal_mgmt_reg_type_e regs_type;
3717
3718         switch (*command) {
3719         case vxge_hal_mgmt_reg_type_pcicfgmgmt:
3720                 if (vdev->is_privilaged) {
3721                         reqd_size = sizeof(vxge_hal_pcicfgmgmt_reg_t);
3722                         regs_type = vxge_hal_mgmt_reg_type_pcicfgmgmt;
3723                 }
3724                 break;
3725
3726         case vxge_hal_mgmt_reg_type_mrpcim:
3727                 if (vdev->is_privilaged) {
3728                         reqd_size = sizeof(vxge_hal_mrpcim_reg_t);
3729                         regs_type = vxge_hal_mgmt_reg_type_mrpcim;
3730                 }
3731                 break;
3732
3733         case vxge_hal_mgmt_reg_type_srpcim:
3734                 if (vdev->is_privilaged) {
3735                         reqd_size = sizeof(vxge_hal_srpcim_reg_t);
3736                         regs_type = vxge_hal_mgmt_reg_type_srpcim;
3737                 }
3738                 break;
3739
3740         case vxge_hal_mgmt_reg_type_memrepair:
3741                 if (vdev->is_privilaged) {
3742                         /* reqd_size = sizeof(vxge_hal_memrepair_reg_t); */
3743                         regs_type = vxge_hal_mgmt_reg_type_memrepair;
3744                 }
3745                 break;
3746
3747         case vxge_hal_mgmt_reg_type_legacy:
3748                 reqd_size = sizeof(vxge_hal_legacy_reg_t);
3749                 regs_type = vxge_hal_mgmt_reg_type_legacy;
3750                 break;
3751
3752         case vxge_hal_mgmt_reg_type_toc:
3753                 reqd_size = sizeof(vxge_hal_toc_reg_t);
3754                 regs_type = vxge_hal_mgmt_reg_type_toc;
3755                 break;
3756
3757         case vxge_hal_mgmt_reg_type_common:
3758                 reqd_size = sizeof(vxge_hal_common_reg_t);
3759                 regs_type = vxge_hal_mgmt_reg_type_common;
3760                 break;
3761
3762         case vxge_hal_mgmt_reg_type_vpmgmt:
3763                 reqd_size = sizeof(vxge_hal_vpmgmt_reg_t);
3764                 regs_type = vxge_hal_mgmt_reg_type_vpmgmt;
3765                 vpath = &(vdev->vpaths[*((u32 *) reg_info + 1)]);
3766                 vp_id = vpath->vp_id;
3767                 break;
3768
3769         case vxge_hal_mgmt_reg_type_vpath:
3770                 reqd_size = sizeof(vxge_hal_vpath_reg_t);
3771                 regs_type = vxge_hal_mgmt_reg_type_vpath;
3772                 vpath = &(vdev->vpaths[*((u32 *) reg_info + 1)]);
3773                 vp_id = vpath->vp_id;
3774                 break;
3775
3776         case VXGE_GET_VPATH_COUNT:
3777                 *((u32 *) reg_info) = vdev->no_of_vpath;
3778                 err = 0;
3779                 break;
3780
3781         default:
3782                 reqd_size = 0;
3783                 break;
3784         }
3785
3786         if (reqd_size) {
3787                 for (i = 0, offset = 0; offset < reqd_size;
3788                     i++, offset += 0x0008) {
3789                         value = 0x0;
3790                         status = vxge_hal_mgmt_reg_read(vdev->devh, regs_type,
3791                             vp_id, offset, &value);
3792
3793                         err = (status != VXGE_HAL_OK) ? EINVAL : 0;
3794                         if (err == EINVAL)
3795                                 break;
3796
3797                         *((u64 *) ((u64 *) reg_info + i)) = value;
3798                 }
3799         }
3800         return (err);
3801 }
3802
3803 /*
3804  * vxge_ioctl_stats
3805  * IOCTL to get statistics
3806  */
3807 int
3808 vxge_ioctl_stats(vxge_dev_t *vdev, struct ifreq *ifr)
3809 {
3810         int i, retsize, err = EINVAL;
3811         u32 bufsize;
3812
3813         vxge_vpath_t *vpath;
3814         vxge_bw_info_t *bw_info;
3815         vxge_port_info_t *port_info;
3816         vxge_drv_stats_t *drv_stat;
3817
3818         char *buffer = NULL;
3819         char *command = (char *) ifr->ifr_data;
3820         vxge_hal_status_e status = VXGE_HAL_OK;
3821
3822         switch (*command) {
3823         case VXGE_GET_PCI_CONF:
3824                 bufsize = VXGE_STATS_BUFFER_SIZE;
3825                 buffer = (char *) vxge_mem_alloc(bufsize);
3826                 if (buffer != NULL) {
3827                         status = vxge_hal_aux_pci_config_read(vdev->devh,
3828                             bufsize, buffer, &retsize);
3829                         if (status == VXGE_HAL_OK)
3830                                 err = copyout(buffer, ifr->ifr_data, retsize);
3831                         else
3832                                 device_printf(vdev->ndev,
3833                                     "failed pciconfig statistics query\n");
3834
3835                         vxge_mem_free(buffer, bufsize);
3836                 }
3837                 break;
3838
3839         case VXGE_GET_MRPCIM_STATS:
3840                 if (!vdev->is_privilaged)
3841                         break;
3842
3843                 bufsize = VXGE_STATS_BUFFER_SIZE;
3844                 buffer = (char *) vxge_mem_alloc(bufsize);
3845                 if (buffer != NULL) {
3846                         status = vxge_hal_aux_stats_mrpcim_read(vdev->devh,
3847                             bufsize, buffer, &retsize);
3848                         if (status == VXGE_HAL_OK)
3849                                 err = copyout(buffer, ifr->ifr_data, retsize);
3850                         else
3851                                 device_printf(vdev->ndev,
3852                                     "failed mrpcim statistics query\n");
3853
3854                         vxge_mem_free(buffer, bufsize);
3855                 }
3856                 break;
3857
3858         case VXGE_GET_DEVICE_STATS:
3859                 bufsize = VXGE_STATS_BUFFER_SIZE;
3860                 buffer = (char *) vxge_mem_alloc(bufsize);
3861                 if (buffer != NULL) {
3862                         status = vxge_hal_aux_stats_device_read(vdev->devh,
3863                             bufsize, buffer, &retsize);
3864                         if (status == VXGE_HAL_OK)
3865                                 err = copyout(buffer, ifr->ifr_data, retsize);
3866                         else
3867                                 device_printf(vdev->ndev,
3868                                     "failed device statistics query\n");
3869
3870                         vxge_mem_free(buffer, bufsize);
3871                 }
3872                 break;
3873
3874         case VXGE_GET_DEVICE_HWINFO:
3875                 bufsize = sizeof(vxge_device_hw_info_t);
3876                 buffer = (char *) vxge_mem_alloc(bufsize);
3877                 if (buffer != NULL) {
3878                         vxge_os_memcpy(
3879                             &(((vxge_device_hw_info_t *) buffer)->hw_info),
3880                             &vdev->config.hw_info,
3881                             sizeof(vxge_hal_device_hw_info_t));
3882
3883                         ((vxge_device_hw_info_t *) buffer)->port_mode =
3884                             vdev->port_mode;
3885
3886                         ((vxge_device_hw_info_t *) buffer)->port_failure =
3887                             vdev->port_failure;
3888
3889                         err = copyout(buffer, ifr->ifr_data, bufsize);
3890                         if (err != 0)
3891                                 device_printf(vdev->ndev,
3892                                     "failed device hardware info query\n");
3893
3894                         vxge_mem_free(buffer, bufsize);
3895                 }
3896                 break;
3897
3898         case VXGE_GET_DRIVER_STATS:
3899                 bufsize = sizeof(vxge_drv_stats_t) * vdev->no_of_vpath;
3900                 drv_stat = (vxge_drv_stats_t *) vxge_mem_alloc(bufsize);
3901                 if (drv_stat != NULL) {
3902                         for (i = 0; i < vdev->no_of_vpath; i++) {
3903                                 vpath = &(vdev->vpaths[i]);
3904
3905                                 vpath->driver_stats.rx_lro_queued +=
3906                                     vpath->lro.lro_queued;
3907
3908                                 vpath->driver_stats.rx_lro_flushed +=
3909                                     vpath->lro.lro_flushed;
3910
3911                                 vxge_os_memcpy(&drv_stat[i],
3912                                     &(vpath->driver_stats),
3913                                     sizeof(vxge_drv_stats_t));
3914                         }
3915
3916                         err = copyout(drv_stat, ifr->ifr_data, bufsize);
3917                         if (err != 0)
3918                                 device_printf(vdev->ndev,
3919                                     "failed driver statistics query\n");
3920
3921                         vxge_mem_free(drv_stat, bufsize);
3922                 }
3923                 break;
3924
3925         case VXGE_GET_BANDWIDTH:
3926                 bw_info = (vxge_bw_info_t *) ifr->ifr_data;
3927
3928                 if ((vdev->config.hw_info.func_id != 0) &&
3929                     (vdev->hw_fw_version < VXGE_FW_VERSION(1, 8, 0)))
3930                         break;
3931
3932                 if (vdev->config.hw_info.func_id != 0)
3933                         bw_info->func_id = vdev->config.hw_info.func_id;
3934
3935                 status = vxge_bw_priority_get(vdev, bw_info);
3936                 if (status != VXGE_HAL_OK)
3937                         break;
3938
3939                 err = copyout(bw_info, ifr->ifr_data, sizeof(vxge_bw_info_t));
3940                 break;
3941
3942         case VXGE_SET_BANDWIDTH:
3943                 if (vdev->is_privilaged)
3944                         err = vxge_bw_priority_set(vdev, ifr);
3945                 break;
3946
3947         case VXGE_SET_PORT_MODE:
3948                 if (vdev->is_privilaged) {
3949                         if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
3950                                 port_info = (vxge_port_info_t *) ifr->ifr_data;
3951                                 vdev->config.port_mode = port_info->port_mode;
3952                                 err = vxge_port_mode_update(vdev);
3953                                 if (err != ENXIO)
3954                                         err = VXGE_HAL_FAIL;
3955                                 else {
3956                                         err = VXGE_HAL_OK;
3957                                         device_printf(vdev->ndev,
3958                                             "PLEASE POWER CYCLE THE SYSTEM\n");
3959                                 }
3960                         }
3961                 }
3962                 break;
3963
3964         case VXGE_GET_PORT_MODE:
3965                 if (vdev->is_privilaged) {
3966                         if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
3967                                 port_info = (vxge_port_info_t *) ifr->ifr_data;
3968                                 err = vxge_port_mode_get(vdev, port_info);
3969                                 if (err == VXGE_HAL_OK) {
3970                                         err = copyout(port_info, ifr->ifr_data,
3971                                             sizeof(vxge_port_info_t));
3972                                 }
3973                         }
3974                 }
3975                 break;
3976
3977         default:
3978                 break;
3979         }
3980
3981         return (err);
3982 }
3983
3984 int
3985 vxge_bw_priority_config(vxge_dev_t *vdev)
3986 {
3987         u32 i;
3988         int err = EINVAL;
3989
3990         for (i = 0; i < vdev->no_of_func; i++) {
3991                 err = vxge_bw_priority_update(vdev, i, TRUE);
3992                 if (err != 0)
3993                         break;
3994         }
3995
3996         return (err);
3997 }
3998
3999 int
4000 vxge_bw_priority_set(vxge_dev_t *vdev, struct ifreq *ifr)
4001 {
4002         int err;
4003         u32 func_id;
4004         vxge_bw_info_t *bw_info;
4005
4006         bw_info = (vxge_bw_info_t *) ifr->ifr_data;
4007         func_id = bw_info->func_id;
4008
4009         vdev->config.bw_info[func_id].priority = bw_info->priority;
4010         vdev->config.bw_info[func_id].bandwidth = bw_info->bandwidth;
4011
4012         err = vxge_bw_priority_update(vdev, func_id, FALSE);
4013
4014         return (err);
4015 }
4016
4017 int
4018 vxge_bw_priority_update(vxge_dev_t *vdev, u32 func_id, bool binit)
4019 {
4020         u32 i, set = 0;
4021         u32 bandwidth, priority, vpath_count;
4022         u64 vpath_list[VXGE_HAL_MAX_VIRTUAL_PATHS];
4023
4024         vxge_hal_device_t *hldev;
4025         vxge_hal_vp_config_t *vp_config;
4026         vxge_hal_status_e status = VXGE_HAL_OK;
4027
4028         hldev = vdev->devh;
4029
4030         status = vxge_hal_get_vpath_list(vdev->devh, func_id,
4031             vpath_list, &vpath_count);
4032
4033         if (status != VXGE_HAL_OK)
4034                 return (status);
4035
4036         for (i = 0; i < vpath_count; i++) {
4037                 vp_config = &(hldev->config.vp_config[vpath_list[i]]);
4038
4039                 /* Configure Bandwidth */
4040                 if (vdev->config.bw_info[func_id].bandwidth !=
4041                     VXGE_HAL_VPATH_BW_LIMIT_DEFAULT) {
4042
4043                         set = 1;
4044                         bandwidth = vdev->config.bw_info[func_id].bandwidth;
4045                         if (bandwidth < VXGE_HAL_VPATH_BW_LIMIT_MIN ||
4046                             bandwidth > VXGE_HAL_VPATH_BW_LIMIT_MAX) {
4047
4048                                 bandwidth = VXGE_HAL_VPATH_BW_LIMIT_DEFAULT;
4049                         }
4050                         vp_config->bandwidth = bandwidth;
4051                 }
4052
4053                 /*
4054                  * If b/w limiting is enabled on any of the
4055                  * VFs, then for remaining VFs set the priority to 3
4056                  * and b/w limiting to max i.e 10 Gb)
4057                  */
4058                 if (vp_config->bandwidth == VXGE_HAL_VPATH_BW_LIMIT_DEFAULT)
4059                         vp_config->bandwidth = VXGE_HAL_VPATH_BW_LIMIT_MAX;
4060
4061                 if (binit && vdev->config.low_latency) {
4062                         if (func_id == 0)
4063                                 vdev->config.bw_info[func_id].priority =
4064                                     VXGE_DEFAULT_VPATH_PRIORITY_HIGH;
4065                 }
4066
4067                 /* Configure Priority */
4068                 if (vdev->config.bw_info[func_id].priority !=
4069                     VXGE_HAL_VPATH_PRIORITY_DEFAULT) {
4070
4071                         set = 1;
4072                         priority = vdev->config.bw_info[func_id].priority;
4073                         if (priority < VXGE_HAL_VPATH_PRIORITY_MIN ||
4074                             priority > VXGE_HAL_VPATH_PRIORITY_MAX) {
4075
4076                                 priority = VXGE_HAL_VPATH_PRIORITY_DEFAULT;
4077                         }
4078                         vp_config->priority = priority;
4079
4080                 } else if (vdev->config.low_latency) {
4081                         set = 1;
4082                         vp_config->priority = VXGE_DEFAULT_VPATH_PRIORITY_LOW;
4083                 }
4084
4085                 if (set == 1) {
4086                         status = vxge_hal_rx_bw_priority_set(vdev->devh,
4087                             vpath_list[i]);
4088                         if (status != VXGE_HAL_OK)
4089                                 break;
4090
4091                         if (vpath_list[i] < VXGE_HAL_TX_BW_VPATH_LIMIT) {
4092                                 status = vxge_hal_tx_bw_priority_set(
4093                                     vdev->devh, vpath_list[i]);
4094                                 if (status != VXGE_HAL_OK)
4095                                         break;
4096                         }
4097                 }
4098         }
4099
4100         return ((status  == VXGE_HAL_OK) ? 0 : EINVAL);
4101 }
4102
4103 /*
4104  * vxge_intr_coalesce_tx
4105  * Changes interrupt coalescing if the interrupts are not within a range
4106  * Return Value: Nothing
4107  */
4108 void
4109 vxge_intr_coalesce_tx(vxge_vpath_t *vpath)
4110 {
4111         u32 timer;
4112
4113         if (!vpath->tx_intr_coalesce)
4114                 return;
4115
4116         vpath->tx_interrupts++;
4117         if (ticks > vpath->tx_ticks + hz/100) {
4118
4119                 vpath->tx_ticks = ticks;
4120                 timer = vpath->tti_rtimer_val;
4121                 if (vpath->tx_interrupts > VXGE_MAX_TX_INTERRUPT_COUNT) {
4122                         if (timer != VXGE_TTI_RTIMER_ADAPT_VAL) {
4123                                 vpath->tti_rtimer_val =
4124                                     VXGE_TTI_RTIMER_ADAPT_VAL;
4125
4126                                 vxge_hal_vpath_dynamic_tti_rtimer_set(
4127                                     vpath->handle, vpath->tti_rtimer_val);
4128                         }
4129                 } else {
4130                         if (timer != 0) {
4131                                 vpath->tti_rtimer_val = 0;
4132                                 vxge_hal_vpath_dynamic_tti_rtimer_set(
4133                                     vpath->handle, vpath->tti_rtimer_val);
4134                         }
4135                 }
4136                 vpath->tx_interrupts = 0;
4137         }
4138 }
4139
4140 /*
4141  * vxge_intr_coalesce_rx
4142  * Changes interrupt coalescing if the interrupts are not within a range
4143  * Return Value: Nothing
4144  */
4145 void
4146 vxge_intr_coalesce_rx(vxge_vpath_t *vpath)
4147 {
4148         u32 timer;
4149
4150         if (!vpath->rx_intr_coalesce)
4151                 return;
4152
4153         vpath->rx_interrupts++;
4154         if (ticks > vpath->rx_ticks + hz/100) {
4155
4156                 vpath->rx_ticks = ticks;
4157                 timer = vpath->rti_rtimer_val;
4158
4159                 if (vpath->rx_interrupts > VXGE_MAX_RX_INTERRUPT_COUNT) {
4160                         if (timer != VXGE_RTI_RTIMER_ADAPT_VAL) {
4161                                 vpath->rti_rtimer_val =
4162                                     VXGE_RTI_RTIMER_ADAPT_VAL;
4163
4164                                 vxge_hal_vpath_dynamic_rti_rtimer_set(
4165                                     vpath->handle, vpath->rti_rtimer_val);
4166                         }
4167                 } else {
4168                         if (timer != 0) {
4169                                 vpath->rti_rtimer_val = 0;
4170                                 vxge_hal_vpath_dynamic_rti_rtimer_set(
4171                                     vpath->handle, vpath->rti_rtimer_val);
4172                         }
4173                 }
4174                 vpath->rx_interrupts = 0;
4175         }
4176 }
4177
4178 /*
4179  * vxge_methods FreeBSD device interface entry points
4180  */
4181 static device_method_t vxge_methods[] = {
4182         DEVMETHOD(device_probe, vxge_probe),
4183         DEVMETHOD(device_attach, vxge_attach),
4184         DEVMETHOD(device_detach, vxge_detach),
4185         DEVMETHOD(device_shutdown, vxge_shutdown),
4186
4187         DEVMETHOD_END
4188 };
4189
4190 static driver_t vxge_driver = {
4191         "vxge", vxge_methods, sizeof(vxge_dev_t),
4192 };
4193
4194 static devclass_t vxge_devclass;
4195
4196 DRIVER_MODULE(vxge, pci, vxge_driver, vxge_devclass, 0, 0);