2 * Copyright(c) 2002-2011 Exar Corp.
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33 #include <dev/vxge/vxgehal/vxgehal.h>
36 * vxge_hal_pio_mem_write32_upper
38 * Endiann-aware implementation of vxge_os_pio_mem_write32().
39 * Since X3100 has 64bit registers, we differintiate uppper and lower
43 vxge_hal_pio_mem_write32_upper(pci_dev_h pdev, pci_reg_h regh, u32 val, void *addr)
45 #if defined(VXGE_OS_HOST_BIG_ENDIAN) && !defined(VXGE_OS_PIO_LITTLE_ENDIAN)
46 vxge_os_pio_mem_write32(pdev, regh, val, addr);
48 vxge_os_pio_mem_write32(pdev, regh, val, (void *) ((char *) addr + 4));
53 * vxge_hal_pio_mem_write32_lower
55 * Endiann-aware implementation of vxge_os_pio_mem_write32().
56 * Since X3100 has 64bit registers, we differintiate uppper and lower
60 vxge_hal_pio_mem_write32_lower(pci_dev_h pdev, pci_reg_h regh, u32 val,
63 #if defined(VXGE_OS_HOST_BIG_ENDIAN) && !defined(VXGE_OS_PIO_LITTLE_ENDIAN)
64 vxge_os_pio_mem_write32(pdev, regh, val,
65 (void *) ((char *) addr + 4));
67 vxge_os_pio_mem_write32(pdev, regh, val, addr);
72 * vxge_hal_device_pciconfig_get - Read the content of given address
73 * in pci config space.
74 * @devh: Device handle.
75 * @offset: Configuration address(offset)to read from
76 * @length: Length of the data (1, 2 or 4 bytes)
77 * @val: Pointer to a buffer to return the content of the address
79 * Read from the pci config space.
83 vxge_hal_device_pciconfig_get(
84 vxge_hal_device_h devh,
90 vxge_hal_status_e status = VXGE_HAL_OK;
91 __hal_device_t *hldev = (__hal_device_t *) devh;
93 vxge_assert((devh != NULL) && (val != NULL));
95 vxge_hal_trace_log_device("==> %s:%s:%d",
96 __FILE__, __func__, __LINE__);
98 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
101 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
103 if (!(hldev->vpath_assignments & mBIT(i)))
106 status = __hal_vpath_pci_read(hldev, i,
107 offset, length, val);
109 if (status == VXGE_HAL_OK)
114 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
115 __FILE__, __func__, __LINE__, status);
121 * __hal_device_pci_caps_list_process
122 * @hldev: HAL device handle.
124 * Process PCI capabilities and initialize the offsets
127 __hal_device_pci_caps_list_process(__hal_device_t *hldev)
133 vxge_hal_pci_config_t *pci_config = &hldev->pci_config_space_bios;
135 vxge_assert(hldev != NULL);
137 vxge_hal_trace_log_device("==> %s:%s:%d",
138 __FILE__, __func__, __LINE__);
140 vxge_hal_trace_log_device("hldev = 0x"VXGE_OS_STXFMT,
143 next_ptr = pci_config->capabilities_pointer;
145 while (next_ptr != 0) {
147 cap_id = VXGE_HAL_PCI_CAP_ID((((u8 *) pci_config) + next_ptr));
151 case VXGE_HAL_PCI_CAP_ID_PM:
152 hldev->pci_caps.pm_cap_offset = next_ptr;
154 case VXGE_HAL_PCI_CAP_ID_VPD:
155 hldev->pci_caps.vpd_cap_offset = next_ptr;
157 case VXGE_HAL_PCI_CAP_ID_SLOTID:
158 hldev->pci_caps.sid_cap_offset = next_ptr;
160 case VXGE_HAL_PCI_CAP_ID_MSI:
161 hldev->pci_caps.msi_cap_offset = next_ptr;
163 case VXGE_HAL_PCI_CAP_ID_VS:
164 hldev->pci_caps.vs_cap_offset = next_ptr;
166 case VXGE_HAL_PCI_CAP_ID_SHPC:
167 hldev->pci_caps.shpc_cap_offset = next_ptr;
169 case VXGE_HAL_PCI_CAP_ID_PCIE:
170 hldev->pci_e_caps = next_ptr;
172 case VXGE_HAL_PCI_CAP_ID_MSIX:
173 hldev->pci_caps.msix_cap_offset = next_ptr;
175 case VXGE_HAL_PCI_CAP_ID_AGP:
176 case VXGE_HAL_PCI_CAP_ID_CHSWP:
177 case VXGE_HAL_PCI_CAP_ID_PCIX:
178 case VXGE_HAL_PCI_CAP_ID_HT:
179 case VXGE_HAL_PCI_CAP_ID_DBGPORT:
180 case VXGE_HAL_PCI_CAP_ID_CPCICSR:
181 case VXGE_HAL_PCI_CAP_ID_PCIBSVID:
182 case VXGE_HAL_PCI_CAP_ID_AGP8X:
183 case VXGE_HAL_PCI_CAP_ID_SECDEV:
184 vxge_hal_info_log_device("Unexpected Capability = %d",
188 vxge_hal_info_log_device("Unknown capability = %d",
194 VXGE_HAL_PCI_CAP_NEXT((((u8 *) pci_config) + next_ptr));
199 if (VXGE_HAL_PCI_CONFIG_SPACE_SIZE <= 0x100) {
200 vxge_hal_trace_log_device("<== %s:%s:%d Result = 0",
201 __FILE__, __func__, __LINE__);
206 while (next_ptr != 0) {
208 ptr_32 = (u32 *) ((void *) (((u8 *) pci_config) + next_ptr));
209 ext_cap_id = (u16) (VXGE_HAL_PCI_EXT_CAP_ID(*ptr_32));
211 switch (ext_cap_id) {
213 case VXGE_HAL_PCI_EXT_CAP_ID_ERR:
214 hldev->pci_e_ext_caps.err_cap_offset = next_ptr;
216 case VXGE_HAL_PCI_EXT_CAP_ID_VC:
217 hldev->pci_e_ext_caps.vc_cap_offset = next_ptr;
219 case VXGE_HAL_PCI_EXT_CAP_ID_DSN:
220 hldev->pci_e_ext_caps.dsn_cap_offset = next_ptr;
222 case VXGE_HAL_PCI_EXT_CAP_ID_PWR:
223 hldev->pci_e_ext_caps.pwr_budget_cap_offset = next_ptr;
227 vxge_hal_info_log_device("Unknown capability = %d",
232 next_ptr = (u16) VXGE_HAL_PCI_EXT_CAP_NEXT(*ptr_32);
235 vxge_hal_trace_log_device("<== %s:%s:%d Result = 0",
236 __FILE__, __func__, __LINE__);
240 * __hal_device_pci_e_init
241 * @hldev: HAL device handle.
243 * Initialize certain PCI/PCI-X configuration registers
244 * with recommended values. Save config space for future hw resets.
247 __hal_device_pci_e_init(__hal_device_t *hldev)
253 vxge_assert(hldev != NULL);
255 vxge_hal_trace_log_device("==> %s:%s:%d",
256 __FILE__, __func__, __LINE__);
258 vxge_hal_trace_log_device("hldev = 0x"VXGE_OS_STXFMT,
261 /* save original PCI config space to restore it on device_terminate() */
262 ptr_32 = (u32 *) ((void *) &hldev->pci_config_space_bios);
263 for (i = 0; i < VXGE_HAL_PCI_CONFIG_SPACE_SIZE / 4; i++) {
264 (void) __hal_vpath_pci_read(hldev,
271 __hal_device_pci_caps_list_process(hldev);
273 /* Set the PErr Repconse bit and SERR in PCI command register. */
274 (void) __hal_vpath_pci_read(hldev,
276 vxge_offsetof(vxge_hal_pci_config_le_t, command),
280 vxge_os_pci_write16(hldev->header.pdev, hldev->header.cfgh,
281 vxge_offsetof(vxge_hal_pci_config_le_t, command), cmd);
283 /* save PCI config space for future resets */
284 ptr_32 = (u32 *) ((void *) &hldev->pci_config_space);
285 for (i = 0; i < VXGE_HAL_PCI_CONFIG_SPACE_SIZE / 4; i++) {
286 (void) __hal_vpath_pci_read(hldev,
293 vxge_hal_trace_log_device("<== %s:%s:%d Result = 0",
294 __FILE__, __func__, __LINE__);
298 * __hal_device_bus_master_enable
299 * @hldev: HAL device handle.
301 * Enable bus mastership.
304 __hal_device_bus_master_enable(__hal_device_t *hldev)
309 vxge_assert(hldev != NULL);
311 vxge_hal_trace_log_device("==> %s:%s:%d",
312 __FILE__, __func__, __LINE__);
314 vxge_hal_trace_log_device("hldev = 0x"VXGE_OS_STXFMT,
317 (void) __hal_vpath_pci_read(hldev,
319 vxge_offsetof(vxge_hal_pci_config_le_t, command),
322 /* already enabled? do nothing */
323 if (cmd & bus_master)
327 vxge_os_pci_write16(hldev->header.pdev, hldev->header.cfgh,
328 vxge_offsetof(vxge_hal_pci_config_le_t, command), cmd);
330 vxge_hal_trace_log_device("<== %s:%s:%d Result = 0",
331 __FILE__, __func__, __LINE__);
335 * vxge_hal_device_register_poll
336 * @pdev: PCI device object.
337 * @regh: BAR mapped memory handle (Solaris), or simply PCI device @pdev
338 * (Linux and the rest.)
339 * @reg: register to poll for
340 * @op: 0 - bit reset, 1 - bit set
341 * @mask: mask for logical "and" condition based on %op
342 * @max_millis: maximum time to try to poll in milliseconds
344 * Will poll certain register for specified amount of time.
345 * Will poll until masked bit is not cleared.
348 vxge_hal_device_register_poll(
358 vxge_hal_status_e ret = VXGE_HAL_FAIL;
363 val64 = vxge_os_pio_mem_read64(pdev, regh, reg);
364 if (op == 0 && !(val64 & mask)) {
365 return (VXGE_HAL_OK);
366 } else if (op == 1 && (val64 & mask) == mask)
367 return (VXGE_HAL_OK);
372 val64 = vxge_os_pio_mem_read64(pdev, regh, reg);
373 if (op == 0 && !(val64 & mask)) {
374 return (VXGE_HAL_OK);
375 } else if (op == 1 && (val64 & mask) == mask) {
376 return (VXGE_HAL_OK);
378 vxge_os_udelay(1000);
379 } while (++i < max_millis);
385 * __hal_device_register_stall
386 * @pdev: PCI device object.
387 * @regh: BAR mapped memory handle (Solaris), or simply PCI device @pdev
388 * (Linux and the rest.)
389 * @reg: register to poll for
390 * @op: 0 - bit reset, 1 - bit set
391 * @mask: mask for logical "and" condition based on %op
392 * @max_millis: maximum time to try to poll in milliseconds
394 * Will poll certain register for specified amount of time.
395 * Will poll until masked bit is not cleared.
398 __hal_device_register_stall(
408 vxge_hal_status_e ret = VXGE_HAL_FAIL;
413 val64 = vxge_os_pio_mem_read64(pdev, regh, reg);
414 if (op == 0 && !(val64 & mask)) {
415 return (VXGE_HAL_OK);
416 } else if (op == 1 && (val64 & mask) == mask)
417 return (VXGE_HAL_OK);
422 val64 = vxge_os_pio_mem_read64(pdev, regh, reg);
423 if (op == 0 && !(val64 & mask)) {
424 return (VXGE_HAL_OK);
425 } else if (op == 1 && (val64 & mask) == mask) {
426 return (VXGE_HAL_OK);
429 } while (++i < max_millis);
435 vxge_hal_device_get_legacy_reg(pci_dev_h pdev, pci_reg_h regh, u8 *bar0)
437 vxge_hal_legacy_reg_t *legacy_reg = NULL;
440 * If length of Bar0 is 16MB, then assume we are configured
441 * in MF8P_VP2 mode and add 8MB to get legacy_reg offsets
443 if (vxge_os_pci_res_len(pdev, regh) == 0x1000000)
444 legacy_reg = (vxge_hal_legacy_reg_t *)
445 ((void *) (bar0 + 0x800000));
447 legacy_reg = (vxge_hal_legacy_reg_t *)
454 * __hal_device_reg_addr_get
455 * @hldev: HAL Device object.
457 * This routine sets the swapper and reads the toc pointer and initializes the
458 * register location pointers in the device object. It waits until the ric is
459 * completed initializing registers.
462 __hal_device_reg_addr_get(__hal_device_t *hldev)
466 vxge_hal_status_e status = VXGE_HAL_OK;
470 vxge_hal_trace_log_device("==> %s:%s:%d",
471 __FILE__, __func__, __LINE__);
473 vxge_hal_trace_log_device("hldev = 0x"VXGE_OS_STXFMT,
476 hldev->legacy_reg = (vxge_hal_legacy_reg_t *)
477 vxge_hal_device_get_legacy_reg(hldev->header.pdev,
478 hldev->header.regh0, hldev->header.bar0);
480 status = __hal_legacy_swapper_set(hldev->header.pdev,
484 if (status != VXGE_HAL_OK) {
485 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
486 __FILE__, __func__, __LINE__, status);
490 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
492 &hldev->legacy_reg->toc_first_pointer);
494 hldev->toc_reg = (vxge_hal_toc_reg_t *)
495 ((void *) (hldev->header.bar0 + val64));
497 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
499 &hldev->toc_reg->toc_common_pointer);
501 hldev->common_reg = (vxge_hal_common_reg_t *)
502 ((void *) (hldev->header.bar0 + val64));
504 vxge_hal_info_log_device("COMMON = 0x"VXGE_OS_STXFMT,
505 (ptr_t) hldev->common_reg);
507 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
509 &hldev->toc_reg->toc_memrepair_pointer);
511 hldev->memrepair_reg = (vxge_hal_memrepair_reg_t *)
512 ((void *) (hldev->header.bar0 + val64));
514 vxge_hal_info_log_device("MEM REPAIR = 0x"VXGE_OS_STXFMT,
515 (ptr_t) hldev->memrepair_reg);
517 for (i = 0; i < VXGE_HAL_TITAN_PCICFGMGMT_REG_SPACES; i++) {
518 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
520 &hldev->toc_reg->toc_pcicfgmgmt_pointer[i]);
522 hldev->pcicfgmgmt_reg[i] = (vxge_hal_pcicfgmgmt_reg_t *)
523 ((void *) (hldev->header.bar0 + val64));
524 vxge_hal_info_log_device("PCICFG_MGMT[%d] = "
525 "0x"VXGE_OS_STXFMT, i, (ptr_t) hldev->pcicfgmgmt_reg[i]);
528 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
530 &hldev->toc_reg->toc_mrpcim_pointer);
532 hldev->mrpcim_reg = (vxge_hal_mrpcim_reg_t *)
533 ((void *) (hldev->header.bar0 + val64));
535 vxge_hal_info_log_device("MEM REPAIR = 0x"VXGE_OS_STXFMT,
536 (ptr_t) hldev->mrpcim_reg);
538 for (i = 0; i < VXGE_HAL_TITAN_SRPCIM_REG_SPACES; i++) {
540 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
542 &hldev->toc_reg->toc_srpcim_pointer[i]);
544 hldev->srpcim_reg[i] = (vxge_hal_srpcim_reg_t *)
545 ((void *) (hldev->header.bar0 + val64));
546 vxge_hal_info_log_device("SRPCIM[%d] =0x"VXGE_OS_STXFMT, i,
547 (ptr_t) hldev->srpcim_reg[i]);
550 for (i = 0; i < VXGE_HAL_TITAN_VPMGMT_REG_SPACES; i++) {
552 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
554 &hldev->toc_reg->toc_vpmgmt_pointer[i]);
556 hldev->vpmgmt_reg[i] = (vxge_hal_vpmgmt_reg_t *)
557 ((void *) (hldev->header.bar0 + val64));
559 vxge_hal_info_log_device("VPMGMT[%d] = 0x"VXGE_OS_STXFMT, i,
560 (ptr_t) hldev->vpmgmt_reg[i]);
563 for (i = 0; i < VXGE_HAL_TITAN_VPATH_REG_SPACES; i++) {
565 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
567 &hldev->toc_reg->toc_vpath_pointer[i]);
569 hldev->vpath_reg[i] = (vxge_hal_vpath_reg_t *)
570 ((void *) (hldev->header.bar0 + val64));
572 vxge_hal_info_log_device("VPATH[%d] = 0x"VXGE_OS_STXFMT, i,
573 (ptr_t) hldev->vpath_reg[i]);
577 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
579 &hldev->toc_reg->toc_kdfc);
581 switch (VXGE_HAL_TOC_GET_KDFC_INITIAL_BIR(val64)) {
583 hldev->kdfc = hldev->header.bar0 +
584 VXGE_HAL_TOC_GET_KDFC_INITIAL_OFFSET(val64);
587 hldev->kdfc = hldev->header.bar1 +
588 VXGE_HAL_TOC_GET_KDFC_INITIAL_OFFSET(val64);
591 hldev->kdfc = hldev->header.bar2 +
592 VXGE_HAL_TOC_GET_KDFC_INITIAL_OFFSET(val64);
595 vxge_hal_info_log_device("Invalid BIR = 0x"VXGE_OS_STXFMT,
596 (ptr_t) VXGE_HAL_TOC_GET_KDFC_INITIAL_BIR(val64));
600 vxge_hal_info_log_device("KDFC = 0x"VXGE_OS_STXFMT,
601 (ptr_t) hldev->kdfc);
603 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
605 &hldev->toc_reg->toc_usdc);
607 switch (VXGE_HAL_TOC_GET_USDC_INITIAL_BIR(val64)) {
609 hldev->usdc = hldev->header.bar0 +
610 VXGE_HAL_TOC_GET_USDC_INITIAL_OFFSET(val64);
613 hldev->usdc = hldev->header.bar1 +
614 VXGE_HAL_TOC_GET_USDC_INITIAL_OFFSET(val64);
617 hldev->usdc = hldev->header.bar2 +
618 VXGE_HAL_TOC_GET_USDC_INITIAL_OFFSET(val64);
621 vxge_hal_info_log_device("Invalid BIR = 0x"VXGE_OS_STXFMT,
622 (ptr_t) VXGE_HAL_TOC_GET_USDC_INITIAL_BIR(val64));
626 vxge_hal_info_log_device("USDC = 0x"VXGE_OS_STXFMT,
627 (ptr_t) hldev->usdc);
629 status = vxge_hal_device_register_poll(hldev->header.pdev,
631 &hldev->common_reg->vpath_rst_in_prog, 0,
632 VXGE_HAL_VPATH_RST_IN_PROG_VPATH_RST_IN_PROG(0x1ffff),
633 VXGE_HAL_DEF_DEVICE_POLL_MILLIS);
635 if (status != VXGE_HAL_OK) {
636 vxge_hal_err_log_device("%s:vpath_rst_in_prog is not cleared",
640 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
641 __FILE__, __func__, __LINE__, status);
647 * __hal_device_id_get
648 * @hldev: HAL Device object.
650 * This routine returns sets the device id and revision numbers into the device
654 __hal_device_id_get(__hal_device_t *hldev)
658 vxge_hal_trace_log_device("==> %s:%s:%d",
659 __FILE__, __func__, __LINE__);
661 vxge_hal_trace_log_device("hldev = 0x"VXGE_OS_STXFMT,
664 (void) __hal_vpath_pci_read(hldev,
666 vxge_offsetof(vxge_hal_pci_config_le_t, device_id),
668 &hldev->header.device_id);
670 (void) __hal_vpath_pci_read(hldev,
672 vxge_offsetof(vxge_hal_pci_config_le_t, revision),
674 &hldev->header.revision);
676 vxge_hal_trace_log_device("<== %s:%s:%d Result = 0",
677 __FILE__, __func__, __LINE__);
681 * __hal_device_access_rights_get: Get Access Rights of the driver
682 * @host_type: Host type.
683 * @func_id: Function Id
685 * This routine returns the Access Rights of the driver
688 __hal_device_access_rights_get(u32 host_type, u32 func_id)
690 u32 access_rights = VXGE_HAL_DEVICE_ACCESS_RIGHT_VPATH;
693 case VXGE_HAL_NO_MR_NO_SR_NORMAL_FUNCTION:
696 VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM |
697 VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM;
700 case VXGE_HAL_MR_NO_SR_VH0_BASE_FUNCTION:
701 access_rights |= VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM |
702 VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM;
704 case VXGE_HAL_NO_MR_SR_VH0_FUNCTION0:
705 access_rights |= VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM |
706 VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM;
708 case VXGE_HAL_NO_MR_SR_VH0_VIRTUAL_FUNCTION:
709 case VXGE_HAL_SR_VH_VIRTUAL_FUNCTION:
711 case VXGE_HAL_MR_SR_VH0_INVALID_CONFIG:
713 case VXGE_HAL_SR_VH_FUNCTION0:
714 case VXGE_HAL_VH_NORMAL_FUNCTION:
715 access_rights |= VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM;
719 return (access_rights);
723 * __hal_device_host_info_get
724 * @hldev: HAL Device object.
726 * This routine returns the host type assignments
729 __hal_device_host_info_get(__hal_device_t *hldev)
736 vxge_hal_trace_log_device("==> %s:%s:%d",
737 __FILE__, __func__, __LINE__);
739 vxge_hal_trace_log_device("hldev = 0x"VXGE_OS_STXFMT,
742 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
744 &hldev->common_reg->host_type_assignments);
746 hldev->host_type = (u32)
747 VXGE_HAL_HOST_TYPE_ASSIGNMENTS_GET_HOST_TYPE_ASSIGNMENTS(val64);
749 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
751 &hldev->common_reg->vplane_assignments);
753 hldev->srpcim_id = (u32)
754 VXGE_HAL_VPLANE_ASSIGNMENTS_GET_VPLANE_ASSIGNMENTS(val64);
756 hldev->vpath_assignments = vxge_os_pio_mem_read64(
759 &hldev->common_reg->vpath_assignments);
761 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
763 if (!(hldev->vpath_assignments & mBIT(i)))
766 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
768 &hldev->common_reg->debug_assignments);
770 (u32) VXGE_HAL_DEBUG_ASSIGNMENTS_GET_VHLABEL(val64);
772 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
774 &hldev->vpmgmt_reg[i]->vpath_to_func_map_cfg1);
776 (u32) VXGE_HAL_VPATH_TO_FUNC_MAP_CFG1_GET_CFG1(val64);
778 hldev->access_rights = __hal_device_access_rights_get(
779 hldev->host_type, hldev->func_id);
781 if (hldev->access_rights &
782 VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM) {
783 hldev->manager_up = TRUE;
785 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
787 &hldev->vpmgmt_reg[i]->srpcim_to_vpath_wmsg);
789 hldev->manager_up = __hal_ifmsg_is_manager_up(val64);
792 hldev->first_vp_id = i;
798 vxge_hal_trace_log_device("<== %s:%s:%d Result = 0",
799 __FILE__, __func__, __LINE__);
803 * __hal_device_pci_e_info_get - Get PCI_E bus informations such as link_width
804 * and signalling rate
805 * @hldev: HAL device.
806 * @signalling_rate: pointer to a variable of enumerated type
807 * vxge_hal_pci_e_signalling_rate_e {}.
808 * @link_width: pointer to a variable of enumerated type
809 * vxge_hal_pci_e_link_width_e {}.
811 * Get pci-e signalling rate and link width.
813 * Returns: one of the vxge_hal_status_e {} enumerated types.
814 * VXGE_HAL_OK - for success.
815 * VXGE_HAL_ERR_INVALID_PCI_INFO - for invalid PCI information from the card.
816 * VXGE_HAL_ERR_BAD_DEVICE_ID - for invalid card.
819 static vxge_hal_status_e
820 __hal_device_pci_e_info_get(
821 __hal_device_t *hldev,
822 vxge_hal_pci_e_signalling_rate_e *signalling_rate,
823 vxge_hal_pci_e_link_width_e *link_width)
825 vxge_hal_status_e status = VXGE_HAL_OK;
826 vxge_hal_pci_e_capability_t *pci_e_caps;
828 vxge_assert((hldev != NULL) && (signalling_rate != NULL) &&
829 (link_width != NULL));
831 vxge_hal_trace_log_device("==> %s:%s:%d",
832 __FILE__, __func__, __LINE__);
834 vxge_hal_trace_log_device("hldev = 0x"VXGE_OS_STXFMT
835 ", signalling_rate = 0x"VXGE_OS_STXFMT", "
836 "link_width = 0x"VXGE_OS_STXFMT, (ptr_t) hldev,
837 (ptr_t) signalling_rate, (ptr_t) link_width);
839 pci_e_caps = (vxge_hal_pci_e_capability_t *)
840 (((u8 *) &hldev->pci_config_space_bios) + hldev->pci_e_caps);
842 switch (pci_e_caps->pci_e_lnkcap & VXGE_HAL_PCI_EXP_LNKCAP_LNK_SPEED) {
843 case VXGE_HAL_PCI_EXP_LNKCAP_LS_2_5:
844 *signalling_rate = VXGE_HAL_PCI_E_SIGNALLING_RATE_2_5GB;
846 case VXGE_HAL_PCI_EXP_LNKCAP_LS_5:
847 *signalling_rate = VXGE_HAL_PCI_E_SIGNALLING_RATE_5GB;
851 VXGE_HAL_PCI_E_SIGNALLING_RATE_UNKNOWN;
855 switch ((pci_e_caps->pci_e_lnksta &
856 VXGE_HAL_PCI_EXP_LNKCAP_LNK_WIDTH) >> 4) {
857 case VXGE_HAL_PCI_EXP_LNKCAP_LW_X1:
858 *link_width = VXGE_HAL_PCI_E_LINK_WIDTH_X1;
860 case VXGE_HAL_PCI_EXP_LNKCAP_LW_X2:
861 *link_width = VXGE_HAL_PCI_E_LINK_WIDTH_X2;
863 case VXGE_HAL_PCI_EXP_LNKCAP_LW_X4:
864 *link_width = VXGE_HAL_PCI_E_LINK_WIDTH_X4;
866 case VXGE_HAL_PCI_EXP_LNKCAP_LW_X8:
867 *link_width = VXGE_HAL_PCI_E_LINK_WIDTH_X8;
869 case VXGE_HAL_PCI_EXP_LNKCAP_LW_X12:
870 *link_width = VXGE_HAL_PCI_E_LINK_WIDTH_X12;
872 case VXGE_HAL_PCI_EXP_LNKCAP_LW_X16:
873 *link_width = VXGE_HAL_PCI_E_LINK_WIDTH_X16;
875 case VXGE_HAL_PCI_EXP_LNKCAP_LW_X32:
876 *link_width = VXGE_HAL_PCI_E_LINK_WIDTH_X32;
878 case VXGE_HAL_PCI_EXP_LNKCAP_LW_RES:
880 *link_width = VXGE_HAL_PCI_E_LINK_WIDTH_UNKNOWN;
884 vxge_hal_trace_log_device("<== %s:%s:%d Result = 0",
885 __FILE__, __func__, __LINE__);
890 * __hal_device_hw_initialize
891 * @hldev: HAL device handle.
893 * Initialize X3100-V hardware.
896 __hal_device_hw_initialize(__hal_device_t *hldev)
898 vxge_hal_status_e status = VXGE_HAL_OK;
902 vxge_hal_trace_log_device("==> %s:%s:%d",
903 __FILE__, __func__, __LINE__);
905 vxge_hal_trace_log_device("hldev = 0x"VXGE_OS_STXFMT,
908 __hal_device_pci_e_init(hldev);
910 /* update the pci mode, frequency, and width */
911 if (__hal_device_pci_e_info_get(hldev, &hldev->header.signalling_rate,
912 &hldev->header.link_width) != VXGE_HAL_OK) {
913 hldev->header.signalling_rate =
914 VXGE_HAL_PCI_E_SIGNALLING_RATE_UNKNOWN;
915 hldev->header.link_width = VXGE_HAL_PCI_E_LINK_WIDTH_UNKNOWN;
917 * FIXME: this cannot happen.
918 * But if it happens we cannot continue just like that
920 vxge_hal_err_log_device("unable to get pci info == > %s : %d",
924 if (hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM) {
925 status = __hal_srpcim_initialize(hldev);
928 if (hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM) {
929 status = __hal_mrpcim_initialize(hldev);
932 if (status == VXGE_HAL_OK) {
933 hldev->hw_is_initialized = 1;
934 hldev->header.terminating = 0;
937 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
938 __FILE__, __func__, __LINE__, status);
943 * vxge_hal_device_reset - Reset device.
944 * @devh: HAL device handle.
946 * Soft-reset the device, reset the device stats except reset_cnt.
949 * Returns: VXGE_HAL_OK - success.
950 * VXGE_HAL_ERR_DEVICE_NOT_INITIALIZED - Device is not initialized.
951 * VXGE_HAL_ERR_RESET_FAILED - Reset failed.
953 * See also: vxge_hal_status_e {}.
956 vxge_hal_device_reset(vxge_hal_device_h devh)
959 vxge_hal_status_e status = VXGE_HAL_OK;
960 __hal_device_t *hldev = (__hal_device_t *) devh;
964 vxge_hal_trace_log_device("==> %s:%s:%d",
965 __FILE__, __func__, __LINE__);
967 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
970 if (!hldev->header.is_initialized) {
971 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
972 __FILE__, __func__, __LINE__,
973 VXGE_HAL_ERR_DEVICE_NOT_INITIALIZED);
974 return (VXGE_HAL_ERR_DEVICE_NOT_INITIALIZED);
977 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
979 if (!(hldev->vpaths_deployed & mBIT(i)))
982 status = vxge_hal_vpath_reset(
983 VXGE_HAL_VIRTUAL_PATH_HANDLE(&hldev->virtual_paths[i]));
985 if (status != VXGE_HAL_OK) {
986 vxge_hal_err_log_device("vpath %d Reset Failed", i);
991 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
992 __FILE__, __func__, __LINE__, status);
997 * vxge_hal_device_reset_poll - Poll the device for reset complete.
998 * @devh: HAL device handle.
1000 * Poll the device for reset complete
1002 * Returns: VXGE_HAL_OK - success.
1003 * VXGE_HAL_ERR_DEVICE_NOT_INITIALIZED - Device is not initialized.
1004 * VXGE_HAL_ERR_RESET_FAILED - Reset failed.
1006 * See also: vxge_hal_status_e {}.
1009 vxge_hal_device_reset_poll(vxge_hal_device_h devh)
1012 vxge_hal_status_e status = VXGE_HAL_OK;
1013 __hal_device_t *hldev = (__hal_device_t *) devh;
1017 vxge_hal_trace_log_device("==> %s:%s:%d",
1018 __FILE__, __func__, __LINE__);
1020 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
1023 if (!hldev->header.is_initialized) {
1024 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1025 __FILE__, __func__, __LINE__,
1026 VXGE_HAL_ERR_DEVICE_NOT_INITIALIZED);
1027 return (VXGE_HAL_ERR_DEVICE_NOT_INITIALIZED);
1030 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1032 if (!(hldev->vpaths_deployed & mBIT(i)))
1035 status = vxge_hal_vpath_reset_poll(
1036 VXGE_HAL_VIRTUAL_PATH_HANDLE(&hldev->virtual_paths[i]));
1038 if (status != VXGE_HAL_OK) {
1039 vxge_hal_err_log_device("vpath %d Reset Poll Failed",
1045 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1046 __FILE__, __func__, __LINE__, status);
1052 * vxge_hal_device_mrpcim_reset_poll - Poll the device for mrpcim reset complete
1053 * @devh: HAL device handle.
1055 * Poll the device for mrpcim reset complete
1057 * Returns: VXGE_HAL_OK - success.
1058 * VXGE_HAL_ERR_DEVICE_NOT_INITIALIZED - Device is not initialized.
1059 * VXGE_HAL_ERR_RESET_FAILED - Reset failed.
1060 * VXGE_HAL_ERR_MANAGER_NOT_FOUND - MRPCIM/SRPCIM manager not found
1061 * VXGE_HAL_ERR_TIME_OUT - Device Reset timed out
1063 * See also: vxge_hal_status_e {}.
1066 vxge_hal_device_mrpcim_reset_poll(vxge_hal_device_h devh)
1069 vxge_hal_status_e status = VXGE_HAL_OK;
1070 __hal_device_t *hldev = (__hal_device_t *) devh;
1074 vxge_hal_trace_log_device("==> %s:%s:%d",
1075 __FILE__, __func__, __LINE__);
1077 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
1080 if (!hldev->header.is_initialized) {
1081 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1082 __FILE__, __func__, __LINE__,
1083 VXGE_HAL_ERR_DEVICE_NOT_INITIALIZED);
1084 return (VXGE_HAL_ERR_DEVICE_NOT_INITIALIZED);
1087 if (!hldev->manager_up) {
1088 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1089 __FILE__, __func__, __LINE__,
1090 VXGE_HAL_ERR_MANAGER_NOT_FOUND);
1091 return (VXGE_HAL_ERR_MANAGER_NOT_FOUND);
1094 status = __hal_ifmsg_device_reset_end_poll(
1095 hldev, hldev->first_vp_id);
1097 if (status != VXGE_HAL_OK) {
1098 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1099 __FILE__, __func__, __LINE__,
1100 VXGE_HAL_ERR_TIME_OUT);
1101 return (VXGE_HAL_ERR_TIME_OUT);
1104 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1106 if (!(hldev->vpaths_deployed & mBIT(i)))
1109 status = vxge_hal_vpath_reset_poll(
1110 VXGE_HAL_VIRTUAL_PATH_HANDLE(&hldev->virtual_paths[i]));
1112 if (status != VXGE_HAL_OK) {
1113 vxge_hal_err_log_device("vpath %d Reset Poll Failed",
1119 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1120 __FILE__, __func__, __LINE__, status);
1126 * vxge_hal_device_status - Check whether X3100 hardware is ready for
1128 * @devh: HAL device handle.
1129 * @hw_status: X3100 status register. Returned by HAL.
1131 * Check whether X3100 hardware is ready for operation.
1132 * The checking includes TDMA, RDMA, PFC, PIC, MC_DRAM, and the rest
1133 * hardware functional blocks.
1135 * Returns: VXGE_HAL_OK if the device is ready for operation. Otherwise
1136 * returns VXGE_HAL_FAIL. Also, fills in adapter status (in @hw_status).
1138 * See also: vxge_hal_status_e {}.
1139 * Usage: See ex_open {}.
1142 vxge_hal_device_status(vxge_hal_device_h devh, u64 *hw_status)
1144 __hal_device_t *hldev = (__hal_device_t *) devh;
1146 vxge_assert((hldev != NULL) && (hw_status != NULL));
1148 vxge_hal_trace_log_device("==> %s:%s:%d",
1149 __FILE__, __func__, __LINE__);
1151 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
1154 *hw_status = vxge_os_pio_mem_read64(hldev->header.pdev,
1155 hldev->header.regh0,
1156 &hldev->common_reg->adapter_status);
1158 vxge_hal_trace_log_device("Adapter_Status = 0x"VXGE_OS_LLXFMT,
1161 if (!(*hw_status & VXGE_HAL_ADAPTER_STATUS_RTDMA_RTDMA_READY)) {
1162 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1163 __FILE__, __func__, __LINE__,
1164 VXGE_HAL_ERR_RTDMA_RTDMA_READY);
1165 return (VXGE_HAL_ERR_RTDMA_RTDMA_READY);
1168 if (!(*hw_status & VXGE_HAL_ADAPTER_STATUS_WRDMA_WRDMA_READY)) {
1169 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1170 __FILE__, __func__, __LINE__,
1171 VXGE_HAL_ERR_WRDMA_WRDMA_READY);
1172 return (VXGE_HAL_ERR_WRDMA_WRDMA_READY);
1175 if (!(*hw_status & VXGE_HAL_ADAPTER_STATUS_KDFC_KDFC_READY)) {
1176 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1177 __FILE__, __func__, __LINE__,
1178 VXGE_HAL_ERR_KDFC_KDFC_READY);
1179 return (VXGE_HAL_ERR_KDFC_KDFC_READY);
1182 if (!(*hw_status & VXGE_HAL_ADAPTER_STATUS_TPA_TMAC_BUF_EMPTY)) {
1183 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1184 __FILE__, __func__, __LINE__,
1185 VXGE_HAL_ERR_TPA_TMAC_BUF_EMPTY);
1186 return (VXGE_HAL_ERR_TPA_TMAC_BUF_EMPTY);
1189 if (!(*hw_status & VXGE_HAL_ADAPTER_STATUS_RDCTL_PIC_QUIESCENT)) {
1190 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1191 __FILE__, __func__, __LINE__,
1192 VXGE_HAL_ERR_RDCTL_PIC_QUIESCENT);
1193 return (VXGE_HAL_ERR_RDCTL_PIC_QUIESCENT);
1196 if (*hw_status & VXGE_HAL_ADAPTER_STATUS_XGMAC_NETWORK_FAULT) {
1197 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1198 __FILE__, __func__, __LINE__,
1199 VXGE_HAL_ERR_XGMAC_NETWORK_FAULT);
1200 return (VXGE_HAL_ERR_XGMAC_NETWORK_FAULT);
1203 if (!(*hw_status & VXGE_HAL_ADAPTER_STATUS_ROCRC_OFFLOAD_QUIESCENT)) {
1204 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1205 __FILE__, __func__, __LINE__,
1206 VXGE_HAL_ERR_ROCRC_OFFLOAD_QUIESCENT);
1207 return (VXGE_HAL_ERR_ROCRC_OFFLOAD_QUIESCENT);
1211 VXGE_HAL_ADAPTER_STATUS_G3IF_FB_G3IF_FB_GDDR3_READY)) {
1212 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1213 __FILE__, __func__, __LINE__,
1214 VXGE_HAL_ERR_G3IF_FB_G3IF_FB_GDDR3_READY);
1215 return (VXGE_HAL_ERR_G3IF_FB_G3IF_FB_GDDR3_READY);
1219 VXGE_HAL_ADAPTER_STATUS_G3IF_CM_G3IF_CM_GDDR3_READY)) {
1220 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1221 __FILE__, __func__, __LINE__,
1222 VXGE_HAL_ERR_G3IF_CM_G3IF_CM_GDDR3_READY);
1223 return (VXGE_HAL_ERR_G3IF_CM_G3IF_CM_GDDR3_READY);
1226 #ifndef VXGE_HAL_TITAN_EMULATION
1227 if (*hw_status & VXGE_HAL_ADAPTER_STATUS_RIC_RIC_RUNNING) {
1228 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1229 __FILE__, __func__, __LINE__,
1230 VXGE_HAL_ERR_RIC_RIC_RUNNING);
1231 return (VXGE_HAL_ERR_RIC_RIC_RUNNING);
1235 if (*hw_status & VXGE_HAL_ADAPTER_STATUS_CMG_C_PLL_IN_LOCK) {
1236 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1237 __FILE__, __func__, __LINE__,
1238 VXGE_HAL_ERR_CMG_C_PLL_IN_LOCK);
1239 return (VXGE_HAL_ERR_CMG_C_PLL_IN_LOCK);
1242 if (*hw_status & VXGE_HAL_ADAPTER_STATUS_XGMAC_X_PLL_IN_LOCK) {
1243 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1244 __FILE__, __func__, __LINE__,
1245 VXGE_HAL_ERR_XGMAC_X_PLL_IN_LOCK);
1246 return (VXGE_HAL_ERR_XGMAC_X_PLL_IN_LOCK);
1249 if (*hw_status & VXGE_HAL_ADAPTER_STATUS_FBIF_M_PLL_IN_LOCK) {
1250 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1251 __FILE__, __func__, __LINE__,
1252 VXGE_HAL_ERR_FBIF_M_PLL_IN_LOCK);
1253 return (VXGE_HAL_ERR_FBIF_M_PLL_IN_LOCK);
1256 if (!(*hw_status & VXGE_HAL_ADAPTER_STATUS_PCC_PCC_IDLE(0xFF))) {
1257 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1258 __FILE__, __func__, __LINE__,
1259 VXGE_HAL_ERR_PCC_PCC_IDLE);
1260 return (VXGE_HAL_ERR_PCC_PCC_IDLE);
1264 VXGE_HAL_ADAPTER_STATUS_ROCRC_RC_PRC_QUIESCENT(0xFF))) {
1265 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1266 __FILE__, __func__, __LINE__,
1267 VXGE_HAL_ERR_ROCRC_RC_PRC_QUIESCENT);
1268 return (VXGE_HAL_ERR_ROCRC_RC_PRC_QUIESCENT);
1271 vxge_hal_trace_log_device("<== %s:%s:%d Result = 0x"VXGE_OS_STXFMT,
1272 __FILE__, __func__, __LINE__, (ptr_t) *hw_status);
1273 return (VXGE_HAL_OK);
1277 * vxge_hal_device_is_slot_freeze
1280 * Returns non-zero if the slot is freezed.
1281 * The determination is made based on the adapter_status
1282 * register which will never give all FFs, unless PCI read
1283 * cannot go through.
1286 vxge_hal_device_is_slot_freeze(vxge_hal_device_h devh)
1288 __hal_device_t *hldev = (__hal_device_t *) devh;
1294 vxge_hal_trace_log_device("==> %s:%s:%d",
1295 __FILE__, __func__, __LINE__);
1297 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
1300 adapter_status = vxge_os_pio_mem_read64(hldev->header.pdev,
1301 hldev->header.regh0,
1302 &hldev->common_reg->adapter_status);
1304 (void) __hal_vpath_pci_read(hldev,
1306 vxge_offsetof(vxge_hal_pci_config_le_t, device_id),
1309 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1310 __FILE__, __func__, __LINE__,
1311 (adapter_status == VXGE_HAL_ALL_FOXES) || (device_id == 0xffff));
1313 return ((adapter_status == VXGE_HAL_ALL_FOXES) ||
1314 (device_id == 0xffff));
1318 * vxge_hal_device_intr_enable - Enable interrupts.
1319 * @devh: HAL device handle.
1320 * @op: One of the vxge_hal_device_intr_e enumerated values specifying
1321 * the type(s) of interrupts to enable.
1323 * Enable X3100 interrupts. The function is to be executed the last in
1324 * X3100 initialization sequence.
1326 * See also: vxge_hal_device_intr_disable()
1329 vxge_hal_device_intr_enable(
1330 vxge_hal_device_h devh)
1335 __hal_device_t *hldev = (__hal_device_t *) devh;
1339 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
1340 __FILE__, __func__, __LINE__);
1342 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
1345 vxge_hal_device_mask_all(hldev);
1347 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1349 if (!(hldev->vpaths_deployed & mBIT(i)))
1352 (void) __hal_vpath_intr_enable(&hldev->virtual_paths[i]);
1355 if ((hldev->header.config.intr_mode == VXGE_HAL_INTR_MODE_IRQLINE) ||
1356 (hldev->header.config.intr_mode == VXGE_HAL_INTR_MODE_EMULATED_INTA)) {
1358 val64 = hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] |
1359 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] |
1360 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_BMAP];
1363 vxge_os_pio_mem_write64(hldev->header.pdev,
1364 hldev->header.regh0,
1366 &hldev->common_reg->tim_int_status0);
1368 vxge_os_pio_mem_write64(hldev->header.pdev,
1369 hldev->header.regh0,
1371 &hldev->common_reg->tim_int_mask0);
1374 val32 = hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] |
1375 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] |
1376 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_BMAP];
1379 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
1380 hldev->header.regh0,
1382 &hldev->common_reg->tim_int_status1);
1384 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
1385 hldev->header.regh0,
1387 &hldev->common_reg->tim_int_mask1);
1391 vxge_os_pio_mem_read64(hldev->header.pdev,
1392 hldev->header.regh0,
1393 &hldev->common_reg->titan_general_int_status);
1395 vxge_hal_device_unmask_all(hldev);
1397 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
1398 __FILE__, __func__, __LINE__);
1402 * vxge_hal_device_intr_disable - Disable X3100 interrupts.
1403 * @devh: HAL device handle.
1404 * @op: One of the vxge_hal_device_intr_e enumerated values specifying
1405 * the type(s) of interrupts to disable.
1407 * Disable X3100 interrupts.
1409 * See also: vxge_hal_device_intr_enable()
1412 vxge_hal_device_intr_disable(
1413 vxge_hal_device_h devh)
1418 __hal_device_t *hldev = (__hal_device_t *) devh;
1422 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
1423 __FILE__, __func__, __LINE__);
1425 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
1428 vxge_hal_device_mask_all(hldev);
1430 if ((hldev->header.config.intr_mode ==
1431 VXGE_HAL_INTR_MODE_IRQLINE) ||
1432 (hldev->header.config.intr_mode ==
1433 VXGE_HAL_INTR_MODE_EMULATED_INTA)) {
1435 val64 = hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] |
1436 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] |
1437 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_BMAP];
1440 vxge_os_pio_mem_write64(hldev->header.pdev,
1441 hldev->header.regh0,
1443 &hldev->common_reg->tim_int_mask0);
1446 val32 = hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] |
1447 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] |
1448 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_BMAP];
1451 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
1452 hldev->header.regh0,
1454 &hldev->common_reg->tim_int_mask1);
1458 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1460 if (!(hldev->vpaths_deployed & mBIT(i)))
1463 (void) __hal_vpath_intr_disable(&hldev->virtual_paths[i]);
1466 vxge_hal_device_unmask_all(hldev);
1468 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
1469 __FILE__, __func__, __LINE__);
1473 * vxge_hal_device_mask_all - Mask all device interrupts.
1474 * @devh: HAL device handle.
1476 * Mask all device interrupts.
1478 * See also: vxge_hal_device_unmask_all()
1481 vxge_hal_device_mask_all(
1482 vxge_hal_device_h devh)
1485 __hal_device_t *hldev = (__hal_device_t *) devh;
1489 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
1490 __FILE__, __func__, __LINE__);
1492 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
1495 val64 = VXGE_HAL_TITAN_MASK_ALL_INT_ALARM |
1496 VXGE_HAL_TITAN_MASK_ALL_INT_TRAFFIC;
1498 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
1499 hldev->header.regh0,
1500 (u32) bVAL32(val64, 0),
1501 &hldev->common_reg->titan_mask_all_int);
1503 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
1504 __FILE__, __func__, __LINE__);
1508 * vxge_hal_device_unmask_all - Unmask all device interrupts.
1509 * @devh: HAL device handle.
1511 * Unmask all device interrupts.
1513 * See also: vxge_hal_device_mask_all()
1516 vxge_hal_device_unmask_all(
1517 vxge_hal_device_h devh)
1520 __hal_device_t *hldev = (__hal_device_t *) devh;
1524 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
1525 __FILE__, __func__, __LINE__);
1527 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
1530 if (hldev->header.config.intr_mode == VXGE_HAL_INTR_MODE_IRQLINE)
1531 val64 = VXGE_HAL_TITAN_MASK_ALL_INT_TRAFFIC;
1533 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
1534 hldev->header.regh0,
1535 (u32) bVAL32(val64, 0),
1536 &hldev->common_reg->titan_mask_all_int);
1538 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
1539 __FILE__, __func__, __LINE__);
1543 * vxge_hal_device_begin_irq - Begin IRQ processing.
1544 * @devh: HAL device handle.
1545 * @skip_alarms: Do not clear the alarms
1546 * @reason: "Reason" for the interrupt, the value of X3100's
1547 * general_int_status register.
1549 * The function performs two actions, It first checks whether (shared IRQ) the
1550 * interrupt was raised by the device. Next, it masks the device interrupts.
1553 * vxge_hal_device_begin_irq() does not flush MMIO writes through the
1554 * bridge. Therefore, two back-to-back interrupts are potentially possible.
1555 * It is the responsibility of the ULD to make sure that only one
1556 * vxge_hal_device_continue_irq() runs at a time.
1558 * Returns: 0, if the interrupt is not "ours" (note that in this case the
1559 * device remain enabled).
1560 * Otherwise, vxge_hal_device_begin_irq() returns 64bit general adapter
1562 * See also: vxge_hal_device_handle_irq()
1565 vxge_hal_device_begin_irq(
1566 vxge_hal_device_h devh,
1574 __hal_device_t *hldev = (__hal_device_t *) devh;
1575 vxge_hal_status_e ret = VXGE_HAL_ERR_WRONG_IRQ;
1576 vxge_hal_status_e status;
1578 vxge_assert((hldev != NULL) && (reason != NULL));
1580 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
1581 __FILE__, __func__, __LINE__);
1583 vxge_hal_trace_log_device_irq(
1584 "devh = 0x"VXGE_OS_STXFMT", skip_alarms = %d, "
1585 "reason = 0x"VXGE_OS_STXFMT, (ptr_t) devh,
1586 skip_alarms, (ptr_t) reason);
1588 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
1589 hldev->header.regh0,
1590 &hldev->common_reg->titan_general_int_status);
1592 if (vxge_os_unlikely(!val64)) {
1593 /* not Titan interrupt */
1595 ret = VXGE_HAL_ERR_WRONG_IRQ;
1596 vxge_hal_info_log_device_irq("wrong_isr general_int_status = \
1598 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = %d",
1599 __FILE__, __func__, __LINE__, ret);
1603 if (vxge_os_unlikely(val64 == VXGE_HAL_ALL_FOXES)) {
1605 adapter_status = vxge_os_pio_mem_read64(hldev->header.pdev,
1606 hldev->header.regh0,
1607 &hldev->common_reg->adapter_status);
1609 if (adapter_status == VXGE_HAL_ALL_FOXES) {
1610 vxge_hal_info_log_device_irq("%s:Slot is frozen",
1612 __hal_device_handle_error(hldev,
1613 NULL_VPID, VXGE_HAL_EVENT_SLOT_FREEZE);
1615 ret = VXGE_HAL_ERR_SLOT_FREEZE;
1623 vpath_mask = hldev->vpaths_deployed >>
1624 (64 - VXGE_HAL_MAX_VIRTUAL_PATHS);
1627 VXGE_HAL_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(vpath_mask)) {
1628 hldev->header.traffic_intr_cnt++;
1629 ret = VXGE_HAL_TRAFFIC_INTERRUPT;
1630 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = %d",
1631 __FILE__, __func__, __LINE__, ret);
1635 hldev->header.not_traffic_intr_cnt++;
1637 if (vxge_os_unlikely(val64 &
1638 VXGE_HAL_TITAN_GENERAL_INT_STATUS_VPATH_ALARM_INT)) {
1640 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1642 if (!(hldev->vpaths_deployed & mBIT(i)))
1645 status = __hal_vpath_alarm_process(
1646 &hldev->virtual_paths[i],
1649 if (status != VXGE_HAL_ERR_WRONG_IRQ)
1656 vxge_hal_trace_log_device_irq(
1657 "<==Error in %s:%s:%d result = 0x%x general_int_status= 0x%llx",
1658 __FILE__, __func__, __LINE__, ret, val64);
1663 * vxge_hal_device_continue_irq - Continue handling IRQ: process all
1664 * completed descriptors.
1665 * @devh: HAL device handle.
1667 * Process completed descriptors and unmask the device interrupts.
1669 * The vxge_hal_device_continue_irq() walks all open virtual paths
1670 * and calls upper-layer driver (ULD) via supplied completion
1673 * Note that the vxge_hal_device_continue_irq is part of the _fast_ path.
1674 * To optimize the processing, the function does _not_ check for
1675 * errors and alarms.
1677 * Returns: VXGE_HAL_OK.
1679 * See also: vxge_hal_device_handle_irq()
1680 * vxge_hal_ring_rxd_next_completed(),
1681 * vxge_hal_fifo_txdl_next_completed(), vxge_hal_ring_callback_f {},
1682 * vxge_hal_fifo_callback_f {}.
1685 vxge_hal_device_continue_irq(
1686 vxge_hal_device_h devh)
1689 __hal_device_t *hldev = (__hal_device_t *) devh;
1693 vxge_hal_trace_log_device_irq("==> %s:%s:%d", __FILE__,
1694 __func__, __LINE__);
1696 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
1699 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1701 if (!(hldev->vpaths_deployed & mBIT(i)))
1704 (void) vxge_hal_vpath_continue_irq(
1705 VXGE_HAL_VIRTUAL_PATH_HANDLE(&hldev->virtual_paths[i]));
1709 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
1710 __FILE__, __func__, __LINE__);
1711 return (VXGE_HAL_OK);
1715 * vxge_hal_device_handle_irq - Handle device IRQ.
1716 * @devh: HAL device handle.
1717 * @skip_alarms: Do not clear the alarms
1719 * Perform the complete handling of the line interrupt. The function
1720 * performs two calls.
1721 * First it uses vxge_hal_device_begin_irq() to check the reason for
1722 * the interrupt and mask the device interrupts.
1723 * Second, it calls vxge_hal_device_continue_irq() to process all
1724 * completed descriptors and re-enable the interrupts.
1726 * Returns: VXGE_HAL_OK - success;
1727 * VXGE_HAL_ERR_WRONG_IRQ - (shared) IRQ produced by other device.
1729 * See also: vxge_hal_device_begin_irq(), vxge_hal_device_continue_irq().
1732 vxge_hal_device_handle_irq(
1733 vxge_hal_device_h devh,
1737 vxge_hal_status_e status;
1738 __hal_device_t *hldev = (__hal_device_t *) devh;
1740 vxge_assert(devh != NULL);
1742 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
1743 __FILE__, __func__, __LINE__);
1745 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT", \
1747 (ptr_t) devh, skip_alarms);
1749 vxge_hal_device_mask_all(hldev);
1751 status = vxge_hal_device_begin_irq(hldev, skip_alarms, &reason);
1752 if (vxge_os_unlikely(status == VXGE_HAL_ERR_WRONG_IRQ)) {
1753 vxge_hal_device_unmask_all(hldev);
1756 if (status == VXGE_HAL_TRAFFIC_INTERRUPT) {
1758 vxge_hal_device_clear_rx(hldev);
1760 status = vxge_hal_device_continue_irq(hldev);
1762 vxge_hal_device_clear_tx(hldev);
1766 if (vxge_os_unlikely((status == VXGE_HAL_ERR_CRITICAL) && skip_alarms))
1767 /* ULD needs to unmask explicitely */
1770 vxge_hal_device_unmask_all(hldev);
1773 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = %d",
1774 __FILE__, __func__, __LINE__, status);
1779 * __hal_device_handle_link_up_ind
1780 * @hldev: HAL device handle.
1782 * Link up indication handler. The function is invoked by HAL when
1783 * X3100 indicates that the link is up for programmable amount of time.
1786 __hal_device_handle_link_up_ind(__hal_device_t *hldev)
1790 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
1791 __FILE__, __func__, __LINE__);
1793 vxge_hal_trace_log_device_irq("hldev = 0x"VXGE_OS_STXFMT,
1797 * If the previous link state is not down, return.
1799 if (hldev->header.link_state == VXGE_HAL_LINK_UP) {
1800 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
1801 __FILE__, __func__, __LINE__);
1802 return (VXGE_HAL_OK);
1805 hldev->header.link_state = VXGE_HAL_LINK_UP;
1808 if (g_vxge_hal_driver->uld_callbacks.link_up) {
1809 g_vxge_hal_driver->uld_callbacks.link_up(
1811 hldev->header.upper_layer_data);
1814 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
1815 __FILE__, __func__, __LINE__);
1816 return (VXGE_HAL_OK);
1820 * __hal_device_handle_link_down_ind
1821 * @hldev: HAL device handle.
1823 * Link down indication handler. The function is invoked by HAL when
1824 * X3100 indicates that the link is down.
1827 __hal_device_handle_link_down_ind(__hal_device_t *hldev)
1831 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
1832 __FILE__, __func__, __LINE__);
1834 vxge_hal_trace_log_device_irq("hldev = 0x"VXGE_OS_STXFMT,
1838 * If the previous link state is not down, return.
1840 if (hldev->header.link_state == VXGE_HAL_LINK_DOWN) {
1841 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
1842 __FILE__, __func__, __LINE__);
1843 return (VXGE_HAL_OK);
1846 hldev->header.link_state = VXGE_HAL_LINK_DOWN;
1849 if (g_vxge_hal_driver->uld_callbacks.link_down) {
1850 g_vxge_hal_driver->uld_callbacks.link_down(
1852 hldev->header.upper_layer_data);
1855 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
1856 __FILE__, __func__, __LINE__);
1857 return (VXGE_HAL_OK);
1861 * vxge_hal_device_link_state_test - Test the link state.
1862 * @devh: HAL device handle.
1865 * Returns: link state.
1867 vxge_hal_device_link_state_e
1868 vxge_hal_device_link_state_test(
1869 vxge_hal_device_h devh)
1872 vxge_hal_device_link_state_e status = VXGE_HAL_LINK_NONE;
1873 __hal_device_t *hldev = (__hal_device_t *) devh;
1877 vxge_hal_trace_log_device("==> %s:%s:%d",
1878 __FILE__, __func__, __LINE__);
1880 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
1883 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1885 if (!(hldev->vpath_assignments & mBIT(i)))
1889 __hal_vpath_link_state_test(&hldev->virtual_paths[i]);
1895 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1896 __FILE__, __func__, __LINE__, status);
1901 * vxge_hal_device_link_state_poll - Poll for the link state.
1902 * @devh: HAL device handle.
1905 * Returns: link state.
1907 vxge_hal_device_link_state_e
1908 vxge_hal_device_link_state_poll(
1909 vxge_hal_device_h devh)
1912 vxge_hal_device_link_state_e link_state = VXGE_HAL_LINK_NONE;
1913 __hal_device_t *hldev = (__hal_device_t *) devh;
1917 vxge_hal_trace_log_device("==> %s:%s:%d",
1918 __FILE__, __func__, __LINE__);
1920 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
1923 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1925 if (!(hldev->vpath_assignments & mBIT(i)))
1928 hldev->header.link_state = VXGE_HAL_LINK_NONE;
1931 __hal_vpath_link_state_poll(&hldev->virtual_paths[i]);
1937 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1938 __FILE__, __func__, __LINE__, link_state);
1939 return (link_state);
1943 * vxge_hal_device_data_rate_poll - Poll for the data rate.
1944 * @devh: HAL device handle.
1947 * Returns: data rate.
1949 vxge_hal_device_data_rate_e
1950 vxge_hal_device_data_rate_poll(
1951 vxge_hal_device_h devh)
1954 vxge_hal_device_data_rate_e data_rate = VXGE_HAL_DATA_RATE_UNKNOWN;
1955 __hal_device_t *hldev = (__hal_device_t *) devh;
1959 vxge_hal_trace_log_device("==> %s:%s:%d",
1960 __FILE__, __func__, __LINE__);
1962 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
1965 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
1967 if (!(hldev->vpaths_deployed & mBIT(i)))
1971 __hal_vpath_data_rate_poll(&hldev->virtual_paths[i]);
1977 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
1978 __FILE__, __func__, __LINE__, data_rate);
1983 * vxge_hal_device_lag_mode_get - Get Current LAG Mode
1984 * @devh: HAL device handle.
1986 * Get Current LAG Mode
1988 vxge_hal_device_lag_mode_e
1989 vxge_hal_device_lag_mode_get(
1990 vxge_hal_device_h devh)
1993 vxge_hal_device_lag_mode_e lag_mode = VXGE_HAL_DEVICE_LAG_MODE_UNKNOWN;
1994 __hal_device_t *hldev = (__hal_device_t *) devh;
1998 vxge_hal_trace_log_device("==> %s:%s:%d",
1999 __FILE__, __func__, __LINE__);
2001 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
2004 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
2006 if (!(hldev->vpaths_deployed & mBIT(i)))
2010 __hal_vpath_lag_mode_get(&hldev->virtual_paths[i]);
2016 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
2017 __FILE__, __func__, __LINE__, lag_mode);
2023 * __hal_device_handle_error - Handle error
2024 * @hldev: HAL device
2026 * @type: Error type. Please see vxge_hal_event_e {}
2031 __hal_device_handle_error(
2032 __hal_device_t *hldev,
2034 vxge_hal_event_e type)
2038 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
2039 __FILE__, __func__, __LINE__);
2041 vxge_hal_trace_log_device_irq(
2042 "hldev = 0x"VXGE_OS_STXFMT", vp_id = %d, type = %d",
2043 (ptr_t) hldev, vp_id, type);
2047 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = %d",
2048 __FILE__, __func__, __LINE__,
2049 VXGE_HAL_ERR_INVALID_TYPE);
2051 case VXGE_HAL_EVENT_UNKNOWN:
2052 if (hldev->header.config.dump_on_unknown) {
2053 (void) vxge_hal_aux_device_dump(hldev);
2056 case VXGE_HAL_EVENT_SERR:
2057 if (hldev->header.config.dump_on_serr) {
2058 (void) vxge_hal_aux_device_dump(hldev);
2061 case VXGE_HAL_EVENT_CRITICAL:
2062 case VXGE_HAL_EVENT_SRPCIM_CRITICAL:
2063 case VXGE_HAL_EVENT_MRPCIM_CRITICAL:
2064 if (hldev->header.config.dump_on_critical) {
2065 (void) vxge_hal_aux_device_dump(hldev);
2068 case VXGE_HAL_EVENT_ECCERR:
2069 if (hldev->header.config.dump_on_eccerr) {
2070 (void) vxge_hal_aux_device_dump(hldev);
2073 case VXGE_HAL_EVENT_KDFCCTL:
2075 case VXGE_HAL_EVENT_DEVICE_RESET_START:
2077 case VXGE_HAL_EVENT_DEVICE_RESET_COMPLETE:
2079 case VXGE_HAL_EVENT_VPATH_RESET_START:
2081 case VXGE_HAL_EVENT_VPATH_RESET_COMPLETE:
2083 case VXGE_HAL_EVENT_SLOT_FREEZE:
2089 if (g_vxge_hal_driver->uld_callbacks.crit_err) {
2090 g_vxge_hal_driver->uld_callbacks.crit_err(
2091 (vxge_hal_device_h) hldev,
2092 hldev->header.upper_layer_data,
2097 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
2098 __FILE__, __func__, __LINE__);
2102 * vxge_hal_device_mask_tx - Mask Tx interrupts.
2103 * @devh: HAL device.
2105 * Mask Tx device interrupts.
2107 * See also: vxge_hal_device_unmask_tx(), vxge_hal_device_mask_rx(),
2108 * vxge_hal_device_clear_tx().
2111 vxge_hal_device_mask_tx(
2112 vxge_hal_device_h devh)
2114 __hal_device_t *hldev = (__hal_device_t *) devh;
2118 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
2119 __FILE__, __func__, __LINE__);
2121 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
2124 if (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] != 0) {
2125 vxge_os_pio_mem_write64(hldev->header.pdev,
2126 hldev->header.regh0,
2127 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX],
2128 &hldev->common_reg->tim_int_mask0);
2131 if (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] != 0) {
2132 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2133 hldev->header.regh0,
2134 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX],
2135 &hldev->common_reg->tim_int_mask1);
2138 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
2139 __FILE__, __func__, __LINE__);
2143 * vxge_hal_device_clear_tx - Acknowledge (that is, clear) the
2144 * condition that has caused the TX interrupt.
2145 * @devh: HAL device.
2147 * Acknowledge (that is, clear) the condition that has caused
2149 * See also: vxge_hal_device_begin_irq(), vxge_hal_device_continue_irq(),
2150 * vxge_hal_device_clear_rx(), vxge_hal_device_mask_tx().
2153 vxge_hal_device_clear_tx(
2154 vxge_hal_device_h devh)
2156 __hal_device_t *hldev = (__hal_device_t *) devh;
2160 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
2161 __FILE__, __func__, __LINE__);
2163 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
2166 if (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] != 0) {
2167 vxge_os_pio_mem_write64(hldev->header.pdev,
2168 hldev->header.regh0,
2169 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX],
2170 &hldev->common_reg->tim_int_status0);
2173 if (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] != 0) {
2174 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2175 hldev->header.regh0,
2176 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX],
2177 &hldev->common_reg->tim_int_status1);
2180 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
2181 __FILE__, __func__, __LINE__);
2185 * vxge_hal_device_unmask_tx - Unmask Tx interrupts.
2186 * @devh: HAL device.
2188 * Unmask Tx device interrupts.
2190 * See also: vxge_hal_device_mask_tx(), vxge_hal_device_clear_tx().
2193 vxge_hal_device_unmask_tx(
2194 vxge_hal_device_h devh)
2196 __hal_device_t *hldev = (__hal_device_t *) devh;
2200 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
2201 __FILE__, __func__, __LINE__);
2203 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
2206 if (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] != 0) {
2207 vxge_os_pio_mem_write64(hldev->header.pdev,
2208 hldev->header.regh0,
2209 ~(hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX]),
2210 &hldev->common_reg->tim_int_mask0);
2213 if (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] != 0) {
2214 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2215 hldev->header.regh0,
2216 ~(hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX]),
2217 &hldev->common_reg->tim_int_mask1);
2220 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
2221 __FILE__, __func__, __LINE__);
2225 * vxge_hal_device_mask_rx - Mask Rx interrupts.
2226 * @devh: HAL device.
2228 * Mask Rx device interrupts.
2230 * See also: vxge_hal_device_unmask_rx(), vxge_hal_device_mask_tx(),
2231 * vxge_hal_device_clear_rx().
2234 vxge_hal_device_mask_rx(
2235 vxge_hal_device_h devh)
2237 __hal_device_t *hldev = (__hal_device_t *) devh;
2241 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
2242 __FILE__, __func__, __LINE__);
2244 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
2247 if (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] != 0) {
2248 vxge_os_pio_mem_write64(hldev->header.pdev,
2249 hldev->header.regh0,
2250 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX],
2251 &hldev->common_reg->tim_int_mask0);
2254 if (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] != 0) {
2255 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2256 hldev->header.regh0,
2257 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX],
2258 &hldev->common_reg->tim_int_mask1);
2261 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
2262 __FILE__, __func__, __LINE__);
2266 * vxge_hal_device_clear_rx - Acknowledge (that is, clear) the
2267 * condition that has caused the RX interrupt.
2268 * @devh: HAL device.
2270 * Acknowledge (that is, clear) the condition that has caused
2272 * See also: vxge_hal_device_begin_irq(), vxge_hal_device_continue_irq(),
2273 * vxge_hal_device_clear_tx(), vxge_hal_device_mask_rx().
2276 vxge_hal_device_clear_rx(
2277 vxge_hal_device_h devh)
2279 __hal_device_t *hldev = (__hal_device_t *) devh;
2283 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
2284 __FILE__, __func__, __LINE__);
2286 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
2289 if (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] != 0) {
2290 vxge_os_pio_mem_write64(hldev->header.pdev,
2291 hldev->header.regh0,
2292 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX],
2293 &hldev->common_reg->tim_int_status0);
2296 if (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] != 0) {
2297 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2298 hldev->header.regh0,
2299 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX],
2300 &hldev->common_reg->tim_int_status1);
2303 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
2304 __FILE__, __func__, __LINE__);
2308 * vxge_hal_device_unmask_rx - Unmask Rx interrupts.
2309 * @devh: HAL device.
2311 * Unmask Rx device interrupts.
2313 * See also: vxge_hal_device_mask_rx(), vxge_hal_device_clear_rx().
2316 vxge_hal_device_unmask_rx(
2317 vxge_hal_device_h devh)
2319 __hal_device_t *hldev = (__hal_device_t *) devh;
2323 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
2324 __FILE__, __func__, __LINE__);
2326 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
2329 if (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] != 0) {
2330 vxge_os_pio_mem_write64(hldev->header.pdev,
2331 hldev->header.regh0,
2332 ~(hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX]),
2333 &hldev->common_reg->tim_int_mask0);
2336 if (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] != 0) {
2337 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2338 hldev->header.regh0,
2339 ~(hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX]),
2340 &hldev->common_reg->tim_int_mask1);
2343 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
2344 __FILE__, __func__, __LINE__);
2348 * vxge_hal_device_mask_tx_rx - Mask Tx and Rx interrupts.
2349 * @devh: HAL device.
2351 * Mask Tx and Rx device interrupts.
2353 * See also: vxge_hal_device_unmask_tx_rx(), vxge_hal_device_clear_tx_rx().
2356 vxge_hal_device_mask_tx_rx(
2357 vxge_hal_device_h devh)
2359 __hal_device_t *hldev = (__hal_device_t *) devh;
2363 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
2364 __FILE__, __func__, __LINE__);
2366 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
2369 if ((hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] != 0) ||
2370 (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] != 0)) {
2371 vxge_os_pio_mem_write64(hldev->header.pdev,
2372 hldev->header.regh0,
2373 (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] |
2374 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX]),
2375 &hldev->common_reg->tim_int_mask0);
2378 if ((hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] != 0) ||
2379 (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] != 0)) {
2380 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2381 hldev->header.regh0,
2382 (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] |
2383 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX]),
2384 &hldev->common_reg->tim_int_mask1);
2387 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
2388 __FILE__, __func__, __LINE__);
2392 * vxge_hal_device_clear_tx_rx - Acknowledge (that is, clear) the
2393 * condition that has caused the Tx and RX interrupt.
2394 * @devh: HAL device.
2396 * Acknowledge (that is, clear) the condition that has caused
2397 * the Tx and Rx interrupt.
2398 * See also: vxge_hal_device_begin_irq(), vxge_hal_device_continue_irq(),
2399 * vxge_hal_device_mask_tx_rx(), vxge_hal_device_unmask_tx_rx().
2402 vxge_hal_device_clear_tx_rx(
2403 vxge_hal_device_h devh)
2405 __hal_device_t *hldev = (__hal_device_t *) devh;
2409 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
2410 __FILE__, __func__, __LINE__);
2412 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
2415 if ((hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] != 0) ||
2416 (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] != 0)) {
2417 vxge_os_pio_mem_write64(hldev->header.pdev,
2418 hldev->header.regh0,
2419 (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] |
2420 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX]),
2421 &hldev->common_reg->tim_int_status0);
2424 if ((hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] != 0) ||
2425 (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] != 0)) {
2426 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2427 hldev->header.regh0,
2428 (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] |
2429 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX]),
2430 &hldev->common_reg->tim_int_status1);
2433 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
2434 __FILE__, __func__, __LINE__);
2438 * vxge_hal_device_unmask_tx_rx - Unmask Tx and Rx interrupts.
2439 * @devh: HAL device.
2441 * Unmask Rx device interrupts.
2443 * See also: vxge_hal_device_mask_tx_rx(), vxge_hal_device_clear_tx_rx().
2446 vxge_hal_device_unmask_tx_rx(
2447 vxge_hal_device_h devh)
2449 __hal_device_t *hldev = (__hal_device_t *) devh;
2453 vxge_hal_trace_log_device_irq("==> %s:%s:%d",
2454 __FILE__, __func__, __LINE__);
2456 vxge_hal_trace_log_device_irq("devh = 0x"VXGE_OS_STXFMT,
2459 if ((hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] != 0) ||
2460 (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] != 0)) {
2461 vxge_os_pio_mem_write64(hldev->header.pdev,
2462 hldev->header.regh0,
2463 ~(hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] |
2464 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX]),
2465 &hldev->common_reg->tim_int_mask0);
2468 if ((hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] != 0) ||
2469 (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] != 0)) {
2470 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
2471 hldev->header.regh0,
2472 ~(hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] |
2473 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX]),
2474 &hldev->common_reg->tim_int_mask1);
2477 vxge_hal_trace_log_device_irq("<== %s:%s:%d Result = 0",
2478 __FILE__, __func__, __LINE__);
2482 * vxge_hal_device_hw_info_get - Get the hw information
2483 * @pdev: PCI device object.
2484 * @regh0: BAR0 mapped memory handle (Solaris), or simply PCI device @pdev
2485 * (Linux and the rest.)
2486 * @bar0: Address of BAR0 in PCI config
2487 * @hw_info: Buffer to return vxge_hal_device_hw_info_t {} structure
2489 * Returns the vpath mask that has the bits set for each vpath allocated
2490 * for the driver, FW version information and the first mac addresse for
2494 vxge_hal_device_hw_info_get(
2498 vxge_hal_device_hw_info_t *hw_info)
2502 vxge_hal_legacy_reg_t *legacy_reg;
2503 vxge_hal_toc_reg_t *toc_reg;
2504 vxge_hal_mrpcim_reg_t *mrpcim_reg;
2505 vxge_hal_common_reg_t *common_reg;
2506 vxge_hal_vpath_reg_t *vpath_reg;
2507 vxge_hal_vpmgmt_reg_t *vpmgmt_reg;
2508 vxge_hal_status_e status;
2510 vxge_hal_trace_log_driver("==> %s:%s:%d",
2511 __FILE__, __func__, __LINE__);
2513 vxge_hal_trace_log_driver(
2514 "pdev = 0x"VXGE_OS_STXFMT", regh0 = 0x"VXGE_OS_STXFMT", "
2515 "bar0 = 0x"VXGE_OS_STXFMT", hw_info = 0x"VXGE_OS_STXFMT,
2516 (ptr_t) pdev, (ptr_t) regh0, (ptr_t) bar0, (ptr_t) hw_info);
2518 vxge_assert((bar0 != NULL) && (hw_info != NULL));
2520 vxge_os_memzero(hw_info, sizeof(vxge_hal_device_hw_info_t));
2522 legacy_reg = (vxge_hal_legacy_reg_t *)
2523 vxge_hal_device_get_legacy_reg(pdev, regh0, bar0);
2525 status = __hal_legacy_swapper_set(pdev, regh0, legacy_reg);
2527 if (status != VXGE_HAL_OK) {
2528 vxge_hal_trace_log_driver("<== %s:%s:%d Result = %d",
2529 __FILE__, __func__, __LINE__, status);
2533 val64 = vxge_os_pio_mem_read64(pdev, regh0,
2534 &legacy_reg->toc_first_pointer);
2536 toc_reg = (vxge_hal_toc_reg_t *) ((void *) (bar0 + val64));
2539 vxge_os_pio_mem_read64(pdev, regh0, &toc_reg->toc_common_pointer);
2541 common_reg = (vxge_hal_common_reg_t *) ((void *) (bar0 + val64));
2543 status = vxge_hal_device_register_poll(pdev, regh0,
2544 &common_reg->vpath_rst_in_prog, 0,
2545 VXGE_HAL_VPATH_RST_IN_PROG_VPATH_RST_IN_PROG(0x1ffff),
2546 VXGE_HAL_DEF_DEVICE_POLL_MILLIS);
2548 if (status != VXGE_HAL_OK) {
2550 vxge_hal_trace_log_driver("<== %s:%s:%d Result = %d",
2551 __FILE__, __func__, __LINE__, status);
2555 hw_info->vpath_mask = vxge_os_pio_mem_read64(pdev, regh0,
2556 &common_reg->vpath_assignments);
2558 val64 = vxge_os_pio_mem_read64(pdev, regh0,
2559 &common_reg->host_type_assignments);
2561 hw_info->host_type = (u32)
2562 VXGE_HAL_HOST_TYPE_ASSIGNMENTS_GET_HOST_TYPE_ASSIGNMENTS(val64);
2564 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
2566 if (!((hw_info->vpath_mask) & mBIT(i)))
2569 val64 = vxge_os_pio_mem_read64(pdev, regh0,
2570 &toc_reg->toc_vpmgmt_pointer[i]);
2572 vpmgmt_reg = (vxge_hal_vpmgmt_reg_t *)
2573 ((void *) (bar0 + val64));
2575 val64 = vxge_os_pio_mem_read64(pdev, regh0,
2576 &vpmgmt_reg->vpath_to_func_map_cfg1);
2577 hw_info->func_id = (u32)
2578 VXGE_HAL_VPATH_TO_FUNC_MAP_CFG1_GET_CFG1(
2581 if (__hal_device_access_rights_get(hw_info->host_type,
2582 hw_info->func_id) & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM) {
2584 val64 = vxge_os_pio_mem_read64(pdev, regh0,
2585 &toc_reg->toc_mrpcim_pointer);
2587 mrpcim_reg = (vxge_hal_mrpcim_reg_t *)
2588 ((void *) (bar0 + val64));
2590 vxge_os_pio_mem_write64(pdev, regh0,
2592 &mrpcim_reg->xgmac_gen_fw_memo_mask);
2596 val64 = vxge_os_pio_mem_read64(pdev, regh0,
2597 &toc_reg->toc_vpath_pointer[i]);
2599 vpath_reg = (vxge_hal_vpath_reg_t *) ((void *) (bar0 + val64));
2601 (void) __hal_vpath_fw_flash_ver_get(pdev, regh0, i, vpath_reg,
2602 &hw_info->fw_version,
2604 &hw_info->flash_version,
2605 &hw_info->flash_date);
2607 (void) __hal_vpath_card_info_get(pdev, regh0, i, vpath_reg,
2608 hw_info->serial_number,
2609 hw_info->part_number,
2610 hw_info->product_description);
2612 (void) __hal_vpath_pmd_info_get(pdev, regh0, i, vpath_reg,
2614 &hw_info->pmd_port0,
2615 &hw_info->pmd_port1);
2617 hw_info->function_mode =
2618 __hal_vpath_pci_func_mode_get(pdev, regh0, i, vpath_reg);
2623 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
2625 if (!((hw_info->vpath_mask) & mBIT(i)))
2628 val64 = vxge_os_pio_mem_read64(pdev, regh0,
2629 &toc_reg->toc_vpath_pointer[i]);
2631 vpath_reg = (vxge_hal_vpath_reg_t *) ((void *) (bar0 + val64));
2633 status = __hal_vpath_hw_addr_get(pdev, regh0, i, vpath_reg,
2634 hw_info->mac_addrs[i], hw_info->mac_addr_masks[i]);
2636 if (status != VXGE_HAL_OK) {
2638 vxge_hal_trace_log_driver("<== %s:%s:%d Result = %d",
2639 __FILE__, __func__, __LINE__, status);
2646 vxge_hal_trace_log_driver("<== %s:%s:%d Result = 0",
2647 __FILE__, __func__, __LINE__);
2649 return (VXGE_HAL_OK);
2653 * vxge_hal_device_initialize - Initialize X3100 device.
2654 * @hldev: HAL device handle.
2655 * @attr: pointer to vxge_hal_device_attr_t structure
2656 * @device_config: Configuration to be _applied_ to the device,
2657 * For the X3100 configuration "knobs" please
2658 * refer to vxge_hal_device_config_t and X3100
2661 * Initialize X3100 device. Note that all the arguments of this public API
2662 * are 'IN', including @hldev. Upper-layer driver (ULD) cooperates with
2663 * OS to find new X3100 device, locate its PCI and memory spaces.
2665 * When done, the ULD allocates sizeof(__hal_device_t) bytes for HAL
2666 * to enable the latter to perform X3100 hardware initialization.
2668 * Returns: VXGE_HAL_OK - success.
2669 * VXGE_HAL_ERR_DRIVER_NOT_INITIALIZED - Driver is not initialized.
2670 * VXGE_HAL_ERR_BAD_DEVICE_CONFIG - Device configuration params are not
2672 * VXGE_HAL_ERR_OUT_OF_MEMORY - Memory allocation failed.
2673 * VXGE_HAL_ERR_BAD_SUBSYSTEM_ID - Device subsystem id is invalid.
2674 * VXGE_HAL_ERR_INVALID_MAC_ADDRESS - Device mac address in not valid.
2675 * VXGE_HAL_INF_MEM_STROBE_CMD_EXECUTING - Failed to retrieve the mac
2676 * address within the time(timeout) or TTI/RTI initialization failed.
2677 * VXGE_HAL_ERR_SWAPPER_CTRL - Failed to configure swapper control.
2679 * See also: __hal_device_terminate(), vxge_hal_status_e {}
2680 * vxge_hal_device_attr_t {}.
2683 vxge_hal_device_initialize(
2684 vxge_hal_device_h *devh,
2685 vxge_hal_device_attr_t *attr,
2686 vxge_hal_device_config_t *device_config)
2690 __hal_device_t *hldev;
2691 vxge_hal_status_e status;
2693 vxge_assert((devh != NULL) &&
2694 (attr != NULL) && (device_config != NULL));
2696 vxge_hal_trace_log_driver("==> %s:%s:%d",
2697 __FILE__, __func__, __LINE__);
2699 vxge_hal_trace_log_driver(
2700 "devh = 0x"VXGE_OS_STXFMT", attr = 0x"VXGE_OS_STXFMT", "
2701 "device_config = 0x"VXGE_OS_STXFMT, (ptr_t) devh, (ptr_t) attr,
2702 (ptr_t) device_config);
2705 if (g_vxge_hal_driver == NULL ||
2706 !g_vxge_hal_driver->is_initialized) {
2707 vxge_hal_trace_log_driver("<== %s:%s:%d Result = %d",
2708 __FILE__, __func__, __LINE__,
2709 VXGE_HAL_ERR_DRIVER_NOT_INITIALIZED);
2710 return (VXGE_HAL_ERR_DRIVER_NOT_INITIALIZED);
2713 status = __hal_device_config_check(device_config);
2715 if (status != VXGE_HAL_OK) {
2716 vxge_hal_trace_log_driver("<== %s:%s:%d Result = %d",
2717 __FILE__, __func__, __LINE__, status);
2721 hldev = (__hal_device_t *) vxge_os_malloc(attr->pdev,
2722 sizeof(__hal_device_t));
2724 if (hldev == NULL) {
2725 vxge_hal_trace_log_driver("<== %s:%s:%d Result = %d",
2726 __FILE__, __func__, __LINE__,
2727 VXGE_HAL_ERR_OUT_OF_MEMORY);
2728 return (VXGE_HAL_ERR_OUT_OF_MEMORY);
2731 vxge_os_memzero(hldev, sizeof(__hal_device_t));
2733 hldev->header.magic = VXGE_HAL_DEVICE_MAGIC;
2735 __hal_channel_init_pending_list(hldev);
2737 vxge_hal_device_debug_set(hldev,
2738 device_config->debug_level,
2739 device_config->debug_mask);
2741 #if defined(VXGE_TRACE_INTO_CIRCULAR_ARR)
2742 hldev->trace_buf.size = device_config->tracebuf_size;
2743 hldev->trace_buf.data =
2744 (u8 *) vxge_os_malloc(attr->pdev, hldev->trace_buf.size);
2745 if (hldev->trace_buf.data == NULL) {
2746 vxge_os_printf("cannot allocate trace buffer!\n");
2747 return (VXGE_HAL_ERR_OUT_OF_MEMORY);
2749 hldev->trace_buf.offset = 0;
2750 hldev->trace_buf.wrapped_count = 0;
2751 vxge_hal_trace_log_device("==> %s:%s:%d",
2752 __FILE__, __func__, __LINE__);
2755 vxge_hal_info_log_device("device 0x"VXGE_OS_STXFMT" is initializing",
2759 vxge_os_memcpy(&hldev->header.config, device_config,
2760 sizeof(vxge_hal_device_config_t));
2762 hldev->header.regh0 = attr->regh0;
2763 hldev->header.regh1 = attr->regh1;
2764 hldev->header.regh2 = attr->regh2;
2765 hldev->header.bar0 = attr->bar0;
2766 hldev->header.bar1 = attr->bar1;
2767 hldev->header.bar2 = attr->bar2;
2768 hldev->header.pdev = attr->pdev;
2769 hldev->header.irqh = attr->irqh;
2770 hldev->header.cfgh = attr->cfgh;
2772 if ((status = __hal_device_reg_addr_get(hldev)) != VXGE_HAL_OK) {
2773 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
2774 __FILE__, __func__, __LINE__, status);
2775 vxge_hal_device_terminate(hldev);
2779 __hal_device_id_get(hldev);
2781 __hal_device_host_info_get(hldev);
2784 nblocks += 1; /* For MRPCIM stats */
2786 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
2788 if (!(hldev->vpath_assignments & mBIT(i)))
2791 if (device_config->vp_config[i].ring.enable ==
2792 VXGE_HAL_RING_ENABLE) {
2794 (device_config->vp_config[i].ring.ring_length +
2795 vxge_hal_ring_rxds_per_block_get(
2796 device_config->vp_config[i].ring.buffer_mode) - 1) /
2797 vxge_hal_ring_rxds_per_block_get(
2798 device_config->vp_config[i].ring.buffer_mode);
2801 if ((device_config->vp_config[i].fifo.enable ==
2802 VXGE_HAL_FIFO_ENABLE) &&
2803 ((device_config->vp_config[i].fifo.max_frags *
2804 sizeof(vxge_hal_fifo_txd_t)) <=
2805 VXGE_OS_HOST_PAGE_SIZE)) {
2807 ((device_config->vp_config[i].fifo.fifo_length *
2808 sizeof(vxge_hal_fifo_txd_t) *
2809 device_config->vp_config[i].fifo.max_frags) +
2810 VXGE_OS_HOST_PAGE_SIZE - 1) /
2811 VXGE_OS_HOST_PAGE_SIZE;
2815 nblocks += 1; /* For vpath stats */
2819 if (__hal_blockpool_create(hldev,
2821 device_config->dma_blockpool_initial + nblocks,
2822 device_config->dma_blockpool_incr,
2823 device_config->dma_blockpool_min,
2824 device_config->dma_blockpool_max + nblocks) != VXGE_HAL_OK) {
2825 vxge_hal_info_log_device("%s:__hal_blockpool_create failed",
2827 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
2828 __FILE__, __func__, __LINE__,
2829 VXGE_HAL_ERR_OUT_OF_MEMORY);
2830 vxge_hal_device_terminate(hldev);
2831 return (VXGE_HAL_ERR_OUT_OF_MEMORY);
2835 status = __hal_device_hw_initialize(hldev);
2837 if (status != VXGE_HAL_OK) {
2838 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
2839 __FILE__, __func__, __LINE__, status);
2840 vxge_hal_device_terminate(hldev);
2844 hldev->dump_buf = (char *) vxge_os_malloc(hldev->header.pdev,
2845 VXGE_HAL_DUMP_BUF_SIZE);
2846 if (hldev->dump_buf == NULL) {
2847 vxge_hal_info_log_device("%s:vxge_os_malloc failed ",
2849 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
2850 __FILE__, __func__, __LINE__,
2851 VXGE_HAL_ERR_OUT_OF_MEMORY);
2852 vxge_hal_device_terminate(hldev);
2853 return (VXGE_HAL_ERR_OUT_OF_MEMORY);
2856 hldev->header.is_initialized = 1;
2860 vxge_hal_trace_log_device("<== %s:%s:%d Result = 0",
2861 __FILE__, __func__, __LINE__);
2862 return (VXGE_HAL_OK);
2866 * vxge_hal_device_terminate - Terminate X3100 device.
2867 * @devh: HAL device handle.
2869 * Terminate HAL device.
2871 * See also: vxge_hal_device_initialize().
2874 vxge_hal_device_terminate(vxge_hal_device_h devh)
2876 __hal_device_t *hldev = (__hal_device_t *) devh;
2878 vxge_assert(g_vxge_hal_driver != NULL);
2879 vxge_assert(hldev != NULL);
2880 vxge_assert(hldev->header.magic == VXGE_HAL_DEVICE_MAGIC);
2882 vxge_hal_trace_log_device("==> %s:%s:%d",
2883 __FILE__, __func__, __LINE__);
2885 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
2888 hldev->header.terminating = 1;
2889 hldev->header.is_initialized = 0;
2891 hldev->header.magic = VXGE_HAL_DEVICE_DEAD;
2893 if (hldev->dump_buf) {
2894 vxge_os_free(hldev->header.pdev, hldev->dump_buf,
2895 VXGE_HAL_DUMP_BUF_SIZE);
2896 hldev->dump_buf = NULL;
2899 if (hldev->srpcim != NULL)
2900 (void) __hal_srpcim_terminate(hldev);
2902 if (hldev->mrpcim != NULL)
2903 (void) __hal_mrpcim_terminate(hldev);
2905 __hal_channel_destroy_pending_list(hldev);
2908 __hal_blockpool_destroy(&hldev->block_pool);
2910 #if defined(VXGE_TRACE_INTO_CIRCULAR_ARR)
2911 if (hldev->trace_buf.size) {
2913 hldev->trace_buf.data,
2914 hldev->trace_buf.size);
2918 vxge_os_free(hldev->header.pdev, hldev, sizeof(__hal_device_t));
2920 vxge_hal_trace_log_driver("<== %s:%s:%d Result = 0",
2921 __FILE__, __func__, __LINE__);
2925 * vxge_hal_device_enable - Enable device.
2926 * @devh: HAL device handle.
2928 * Enable the specified device: bring up the link/interface.
2932 vxge_hal_device_enable(
2933 vxge_hal_device_h devh)
2935 vxge_hal_status_e status = VXGE_HAL_OK;
2936 __hal_device_t *hldev = (__hal_device_t *) devh;
2938 vxge_assert(devh != NULL);
2940 vxge_hal_trace_log_device("==> %s:%s:%d",
2941 __FILE__, __func__, __LINE__);
2943 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
2946 if (!hldev->hw_is_initialized) {
2948 status = __hal_device_hw_initialize(hldev);
2949 if (status != VXGE_HAL_OK) {
2950 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
2951 __FILE__, __func__, __LINE__, status);
2956 __hal_device_bus_master_enable(hldev);
2958 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
2959 __FILE__, __func__, __LINE__, status);
2964 * vxge_hal_device_disable - Disable X3100 adapter.
2965 * @devh: HAL device handle.
2967 * Disable this device. To gracefully reset the adapter, the host should:
2969 * - call vxge_hal_device_disable();
2971 * - call vxge_hal_device_intr_disable();
2973 * - do some work (error recovery, change mtu, reset, etc);
2975 * - call vxge_hal_device_enable();
2977 * - call vxge_hal_device_intr_enable().
2979 * Note: Disabling the device does _not_ include disabling of interrupts.
2980 * After disabling the device stops receiving new frames but those frames
2981 * that were already in the pipe will keep coming for some few milliseconds.
2986 vxge_hal_device_disable(
2987 vxge_hal_device_h devh)
2989 vxge_hal_status_e status = VXGE_HAL_OK;
2991 vxge_assert(devh != NULL);
2993 #if (VXGE_COMPONENT_HAL_DEVICE & VXGE_DEBUG_MODULE_MASK)
2995 __hal_device_t *hldev = (__hal_device_t *) devh;
2997 vxge_hal_trace_log_device("==> %s:%s:%d",
2998 __FILE__, __func__, __LINE__);
3000 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT,
3003 vxge_hal_trace_log_device("<== %s:%s:%d Result = %d",
3004 __FILE__, __func__, __LINE__, status);
3011 * vxge_hal_device_hw_stats_enable - Enable device h/w statistics.
3012 * @devh: HAL Device.
3014 * Enable the DMA vpath statistics for the device. The function is to be called
3015 * to re-enable the adapter to update stats into the host memory
3017 * See also: vxge_hal_device_hw_stats_disable()
3020 vxge_hal_device_hw_stats_enable(
3021 vxge_hal_device_h devh)
3025 vxge_hal_status_e status = VXGE_HAL_OK;
3026 __hal_device_t *hldev = (__hal_device_t *) devh;
3028 vxge_assert(devh != NULL);
3030 vxge_hal_trace_log_stats("==> %s:%s:%d",
3031 __FILE__, __func__, __LINE__);
3033 vxge_hal_trace_log_stats("devh = 0x"VXGE_OS_STXFMT,
3036 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3037 hldev->header.regh0,
3038 &hldev->common_reg->stats_cfg0);
3040 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
3042 if (!(hldev->vpaths_deployed & mBIT(i)))
3045 vxge_os_memcpy(hldev->virtual_paths[i].hw_stats_sav,
3046 hldev->virtual_paths[i].hw_stats,
3047 sizeof(vxge_hal_vpath_stats_hw_info_t));
3048 if (hldev->header.config.stats_read_method ==
3049 VXGE_HAL_STATS_READ_METHOD_DMA) {
3051 VXGE_HAL_STATS_CFG0_STATS_ENABLE((1 << (16 - i)));
3053 status = __hal_vpath_hw_stats_get(
3054 &hldev->virtual_paths[i],
3055 hldev->virtual_paths[i].hw_stats);
3060 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
3061 hldev->header.regh0,
3062 (u32) bVAL32(val64, 0),
3063 &hldev->common_reg->stats_cfg0);
3065 vxge_hal_trace_log_stats("<== %s:%s:%d Result = %d",
3066 __FILE__, __func__, __LINE__, status);
3071 * vxge_hal_device_hw_stats_disable - Disable device h/w statistics.
3072 * @devh: HAL Device.
3074 * Enable the DMA vpath statistics for the device. The function is to be called
3075 * to disable the adapter to update stats into the host memory. This function
3076 * is not needed to be called, normally.
3078 * See also: vxge_hal_device_hw_stats_enable()
3081 vxge_hal_device_hw_stats_disable(
3082 vxge_hal_device_h devh)
3086 vxge_hal_status_e status = VXGE_HAL_OK;
3087 __hal_device_t *hldev = (__hal_device_t *) devh;
3089 vxge_assert(devh != NULL);
3091 vxge_hal_trace_log_stats("==> %s:%s:%d",
3092 __FILE__, __func__, __LINE__);
3094 vxge_hal_trace_log_stats("devh = 0x"VXGE_OS_STXFMT,
3097 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3098 hldev->header.regh0,
3099 &hldev->common_reg->stats_cfg0);
3101 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
3103 if (!(hldev->vpaths_deployed & mBIT(i)))
3106 val64 &= ~VXGE_HAL_STATS_CFG0_STATS_ENABLE((1 << (16 - i)));
3110 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
3111 hldev->header.regh0,
3112 (u32) bVAL32(val64, 0),
3113 &hldev->common_reg->stats_cfg0);
3115 vxge_hal_trace_log_stats("<== %s:%s:%d Result = %d",
3116 __FILE__, __func__, __LINE__, status);
3121 * vxge_hal_device_hw_stats_get - Get the device hw statistics.
3122 * @devh: HAL Device.
3123 * @hw_stats: Hardware stats
3125 * Returns the vpath h/w stats for the device.
3127 * See also: vxge_hal_device_hw_stats_enable(),
3128 * vxge_hal_device_hw_stats_disable()
3131 vxge_hal_device_hw_stats_get(
3132 vxge_hal_device_h devh,
3133 vxge_hal_device_stats_hw_info_t *hw_stats)
3137 vxge_hal_status_e status = VXGE_HAL_OK;
3138 __hal_device_t *hldev = (__hal_device_t *) devh;
3140 vxge_assert((devh != NULL) && (hw_stats != NULL));
3142 vxge_hal_trace_log_stats("==> %s:%s:%d",
3143 __FILE__, __func__, __LINE__);
3145 vxge_hal_trace_log_stats(
3146 "devh = 0x"VXGE_OS_STXFMT", hw_stats = 0x"VXGE_OS_STXFMT,
3147 (ptr_t) devh, (ptr_t) hw_stats);
3149 if (hldev->header.config.stats_read_method ==
3150 VXGE_HAL_STATS_READ_METHOD_DMA) {
3152 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
3154 if (!(hldev->vpaths_deployed & mBIT(i)))
3158 VXGE_HAL_STATS_CFG0_STATS_ENABLE((1 << (16 - i)));
3162 status = vxge_hal_device_register_poll(hldev->header.pdev,
3163 hldev->header.regh0,
3164 &hldev->common_reg->stats_cfg0,
3167 hldev->header.config.device_poll_millis);
3171 if (status == VXGE_HAL_OK) {
3172 vxge_os_memcpy(hw_stats,
3173 &hldev->stats.hw_dev_info_stats,
3174 sizeof(vxge_hal_device_stats_hw_info_t));
3177 vxge_hal_trace_log_stats("<== %s:%s:%d Result = %d",
3178 __FILE__, __func__, __LINE__, status);
3183 * vxge_hal_device_sw_stats_get - Get the device sw statistics.
3184 * @devh: HAL Device.
3185 * @sw_stats: Software stats
3187 * Returns the vpath s/w stats for the device.
3189 * See also: vxge_hal_device_hw_stats_get()
3192 vxge_hal_device_sw_stats_get(
3193 vxge_hal_device_h devh,
3194 vxge_hal_device_stats_sw_info_t *sw_stats)
3196 vxge_hal_status_e status = VXGE_HAL_OK;
3197 __hal_device_t *hldev = (__hal_device_t *) devh;
3199 vxge_assert((hldev != NULL) && (sw_stats != NULL));
3201 vxge_hal_trace_log_stats("==> %s:%s:%d",
3202 __FILE__, __func__, __LINE__);
3204 vxge_hal_trace_log_stats(
3205 "devh = 0x"VXGE_OS_STXFMT", sw_stats = 0x"VXGE_OS_STXFMT,
3206 (ptr_t) devh, (ptr_t) sw_stats);
3208 vxge_os_memcpy(sw_stats,
3209 &hldev->stats.sw_dev_info_stats,
3210 sizeof(vxge_hal_device_stats_sw_info_t));
3212 vxge_hal_trace_log_stats("<== %s:%s:%d Result = %d",
3213 __FILE__, __func__, __LINE__, status);
3218 * vxge_hal_device_stats_get - Get the device statistics.
3219 * @devh: HAL Device.
3220 * @stats: Device stats
3222 * Returns the device stats for the device.
3224 * See also: vxge_hal_device_hw_stats_get(), vxge_hal_device_sw_stats_get()
3227 vxge_hal_device_stats_get(
3228 vxge_hal_device_h devh,
3229 vxge_hal_device_stats_t *stats)
3231 vxge_hal_status_e status = VXGE_HAL_OK;
3232 __hal_device_t *hldev = (__hal_device_t *) devh;
3234 vxge_assert((hldev != NULL) && (stats != NULL));
3236 vxge_hal_trace_log_stats("==> %s:%s:%d",
3237 __FILE__, __func__, __LINE__);
3239 vxge_hal_trace_log_stats(
3240 "devh = 0x"VXGE_OS_STXFMT", stats = 0x"VXGE_OS_STXFMT,
3241 (ptr_t) devh, (ptr_t) stats);
3243 vxge_os_memcpy(stats,
3245 sizeof(vxge_hal_device_stats_t));
3247 vxge_hal_trace_log_stats("<== %s:%s:%d Result = %d",
3248 __FILE__, __func__, __LINE__, status);
3253 * vxge_hal_device_xmac_stats_get - Get the Device XMAC Statistics
3254 * @devh: HAL device handle.
3255 * @xmac_stats: Buffer to return XMAC Statistics.
3257 * Get the XMAC Statistics
3261 vxge_hal_device_xmac_stats_get(vxge_hal_device_h devh,
3262 vxge_hal_device_xmac_stats_t *xmac_stats)
3264 vxge_hal_status_e status = VXGE_HAL_OK;
3266 __hal_device_t *hldev = (__hal_device_t *) devh;
3268 vxge_assert((hldev != NULL) && (xmac_stats != NULL));
3270 vxge_hal_trace_log_stats("==> %s:%s:%d",
3271 __FILE__, __func__, __LINE__);
3273 vxge_hal_trace_log_stats(
3274 "devh = 0x"VXGE_OS_STXFMT", xmac_stats = 0x"VXGE_OS_STXFMT,
3275 (ptr_t) devh, (ptr_t) xmac_stats);
3277 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
3280 if (!(hldev->vpaths_deployed & mBIT(i)))
3283 status = __hal_vpath_xmac_tx_stats_get(&hldev->virtual_paths[i],
3284 &xmac_stats->vpath_tx_stats[i]);
3286 if (status != VXGE_HAL_OK) {
3287 vxge_hal_trace_log_stats("<== %s:%s:%d Result = %d",
3288 __FILE__, __func__, __LINE__, status);
3292 status = __hal_vpath_xmac_rx_stats_get(&hldev->virtual_paths[i],
3293 &xmac_stats->vpath_rx_stats[i]);
3295 if (status != VXGE_HAL_OK) {
3296 vxge_hal_trace_log_stats("<== %s:%s:%d Result = %d",
3297 __FILE__, __func__, __LINE__, status);
3303 vxge_hal_trace_log_stats("<== %s:%s:%d Result = %d",
3304 __FILE__, __func__, __LINE__, status);
3308 #if defined(VXGE_TRACE_INTO_CIRCULAR_ARR)
3311 * vxge_hal_device_trace_write - Write the trace from the given buffer into
3312 * circular trace buffer
3313 * @devh: HAL device handle.
3314 * @trace_buf: Buffer containing the trace.
3315 * @trace_len: Length of the trace in the buffer
3317 * Writes the trace from the given buffer into the circular trace buffer
3321 vxge_hal_device_trace_write(vxge_hal_device_h devh,
3325 __hal_device_t *hldev = (__hal_device_t *) devh;
3331 offset = hldev->trace_buf.offset;
3333 if (trace_len > 1) {
3335 u32 leftsize = hldev->trace_buf.size - offset;
3337 if (trace_len > leftsize) {
3338 vxge_os_memzero(hldev->trace_buf.data + offset,
3341 hldev->trace_buf.wrapped_count++;
3344 vxge_os_memcpy(hldev->trace_buf.data + offset,
3345 trace_buf, trace_len);
3346 offset += trace_len;
3347 hldev->trace_buf.offset = offset;
3353 * vxge_hal_device_trace_dump - Dump the trace buffer.
3354 * @devh: HAL device handle.
3356 * Dump the trace buffer contents.
3359 vxge_hal_device_trace_dump(vxge_hal_device_h devh)
3361 __hal_device_t *hldev = (__hal_device_t *) devh;
3367 offset = hldev->trace_buf.offset;
3369 vxge_os_printf("################ Trace dump Begin ###############\n");
3371 if (hldev->trace_buf.wrapped_count) {
3372 for (i = hldev->trace_buf.offset;
3373 i < hldev->trace_buf.size; i += offset) {
3374 if (*(hldev->trace_buf.data + i))
3375 vxge_os_printf(hldev->trace_buf.data + i);
3376 offset = vxge_os_strlen(hldev->trace_buf.data + i) + 1;
3380 for (i = 0; i < hldev->trace_buf.offset; i += offset) {
3381 if (*(hldev->trace_buf.data + i))
3382 vxge_os_printf(hldev->trace_buf.data + i);
3383 offset = vxge_os_strlen(hldev->trace_buf.data + i) + 1;
3386 vxge_os_printf("################ Trace dump End ###############\n");
3391 * vxge_hal_device_trace_read - Read trace buffer contents.
3392 * @devh: HAL device handle.
3393 * @buffer: Buffer to store the trace buffer contents.
3394 * @buf_size: Size of the buffer.
3395 * @read_length: Size of the valid data in the buffer.
3397 * Read HAL trace buffer contents starting from the offset
3398 * upto the size of the buffer or till EOF is reached.
3400 * Returns: VXGE_HAL_OK - success.
3401 * VXGE_HAL_EOF_TRACE_BUF - No more data in the trace buffer.
3405 vxge_hal_device_trace_read(vxge_hal_device_h devh,
3408 unsigned *read_length)
3410 __hal_device_t *hldev = (__hal_device_t *) devh;
3411 u32 offset, i = 0, buf_off = 0;
3417 return (VXGE_HAL_FAIL);
3419 offset = hldev->trace_buf.offset;
3421 if (hldev->trace_buf.wrapped_count) {
3422 for (i = hldev->trace_buf.offset;
3423 i < hldev->trace_buf.size; i += offset) {
3424 if (*(hldev->trace_buf.data + i)) {
3425 vxge_os_sprintf(buffer + buf_off, "%s\n",
3426 hldev->trace_buf.data + i);
3427 buf_off += vxge_os_strlen(
3428 hldev->trace_buf.data + i) + 1;
3429 if (buf_off > buf_size)
3430 return (VXGE_HAL_ERR_OUT_OF_MEMORY);
3432 offset = vxge_os_strlen(hldev->trace_buf.data + i) + 1;
3436 for (i = 0; i < hldev->trace_buf.offset; i += offset) {
3437 if (*(hldev->trace_buf.data + i)) {
3438 vxge_os_sprintf(buffer + buf_off, "%s\n",
3439 hldev->trace_buf.data + i);
3440 buf_off += vxge_os_strlen(
3441 hldev->trace_buf.data + i) + 1;
3442 if (buf_off > buf_size)
3443 return (VXGE_HAL_ERR_OUT_OF_MEMORY);
3445 offset = vxge_os_strlen(hldev->trace_buf.data + i) + 1;
3448 *read_length = buf_off;
3449 *(buffer + buf_off + 1) = 0;
3451 return (VXGE_HAL_OK);
3457 * vxge_hal_device_debug_set - Set the debug module, level and timestamp
3458 * @devh: Hal device object
3459 * @level: Debug level as defined in enum vxge_debug_level_e
3460 * @module masks: An or value of component masks as defined in vxge_debug.h
3462 * This routine is used to dynamically change the debug output
3465 vxge_hal_device_debug_set(
3466 vxge_hal_device_h devh,
3467 vxge_debug_level_e level,
3470 __hal_device_t *hldev = (__hal_device_t *) devh;
3472 hldev->header.debug_module_mask = mask;
3473 hldev->header.debug_level = level;
3475 hldev->d_trace_mask = 0;
3476 hldev->d_info_mask = 0;
3477 hldev->d_err_mask = 0;
3481 hldev->d_trace_mask = mask;
3485 hldev->d_info_mask = mask;
3489 hldev->d_err_mask = mask;
3498 * vxge_hal_device_flick_link_led - Flick (blink) link LED.
3499 * @devh: HAL device handle.
3500 * @port : Port number 0, or 1
3501 * @on_off: TRUE if flickering to be on, FALSE to be off
3503 * Flicker the link LED.
3506 vxge_hal_device_flick_link_led(vxge_hal_device_h devh, u32 port, u32 on_off)
3508 vxge_hal_status_e status;
3509 __hal_device_t *hldev = (__hal_device_t *) devh;
3511 vxge_assert(devh != NULL);
3513 vxge_hal_trace_log_device("==> %s:%s:%d",
3514 __FILE__, __func__, __LINE__);
3516 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT
3517 ", port = %d, on_off = %d", (ptr_t) devh, port, on_off);
3519 if (hldev->header.magic != VXGE_HAL_DEVICE_MAGIC) {
3520 vxge_hal_trace_log_device("<== %s:%s:%d Result: %d",
3521 __FILE__, __func__, __LINE__,
3522 VXGE_HAL_ERR_INVALID_DEVICE);
3524 return (VXGE_HAL_ERR_INVALID_DEVICE);
3527 status = __hal_vpath_flick_link_led(hldev,
3528 hldev->first_vp_id, port, on_off);
3530 vxge_hal_trace_log_device("<== %s:%s:%d Result: %d",
3531 __FILE__, __func__, __LINE__, status);
3537 * vxge_hal_device_getpause_data -Pause frame frame generation and reception.
3538 * @devh: HAL device handle.
3539 * @port : Port number 0, 1, or 2
3540 * @tx : A field to return the pause generation capability of the NIC.
3541 * @rx : A field to return the pause reception capability of the NIC.
3543 * Returns the Pause frame generation and reception capability of the NIC.
3548 vxge_hal_device_getpause_data(
3549 vxge_hal_device_h devh,
3556 vxge_hal_status_e status = VXGE_HAL_ERR_VPATH_NOT_AVAILABLE;
3557 __hal_device_t *hldev = (__hal_device_t *) devh;
3559 vxge_assert(devh != NULL);
3561 vxge_hal_trace_log_device("==> %s:%s:%d",
3562 __FILE__, __func__, __LINE__);
3564 vxge_hal_trace_log_device("devh = 0x"VXGE_OS_STXFMT", "
3565 "port = %d, tx = 0x"VXGE_OS_STXFMT", "
3566 "rx = 0x"VXGE_OS_STXFMT, (ptr_t) devh, port, (ptr_t) tx,
3569 if (hldev->header.magic != VXGE_HAL_DEVICE_MAGIC) {
3570 vxge_hal_trace_log_device("<== %s:%s:%d Result: %d",
3571 __FILE__, __func__, __LINE__, VXGE_HAL_ERR_INVALID_DEVICE);
3572 return (VXGE_HAL_ERR_INVALID_DEVICE);
3575 if (port >= VXGE_HAL_MAC_MAX_PORTS) {
3576 vxge_hal_trace_log_device("<== %s:%s:%d Result: %d",
3577 __FILE__, __func__, __LINE__, VXGE_HAL_ERR_INVALID_PORT);
3578 return (VXGE_HAL_ERR_INVALID_PORT);
3581 for (i = 0; i < VXGE_HAL_MAX_VIRTUAL_PATHS; i++) {
3583 if (!(hldev->vpath_assignments & mBIT(i)))
3586 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
3587 hldev->header.regh0,
3588 &hldev->vpmgmt_reg[i]->
3589 rxmac_pause_cfg_port_vpmgmt_clone[port]);
3591 if (val64 & VXGE_HAL_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_GEN_EN)
3594 if (val64 & VXGE_HAL_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_RCV_EN)
3597 status = VXGE_HAL_OK;
3602 vxge_hal_trace_log_device("<== %s:%s:%d Result: %d",
3603 __FILE__, __func__, __LINE__, status);
3609 vxge_hal_device_is_privileged(u32 host_type, u32 func_id)
3612 vxge_hal_status_e status = VXGE_HAL_ERR_PRIVILAGED_OPEARATION;
3614 access_rights = __hal_device_access_rights_get(host_type, func_id);
3616 if (access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM)
3617 status = VXGE_HAL_OK;