2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2016-2019 Ruslan Bukin <br@bsdpad.com>
6 * This software was developed by SRI International and the University of
7 * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
8 * ("CTSRD"), as part of the DARPA CRASH research programme.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #include <sys/cdefs.h>
33 #include "opt_platform.h"
34 #include <sys/param.h>
37 #include <sys/epoch.h>
38 #include <sys/kernel.h>
39 #include <sys/queue.h>
41 #include <sys/malloc.h>
42 #include <sys/limits.h>
44 #include <sys/mutex.h>
45 #include <sys/sysctl.h>
46 #include <sys/systm.h>
48 #include <machine/bus.h>
51 #include <dev/fdt/fdt_common.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
56 #include <dev/xdma/xdma.h>
61 * Multiple xDMA controllers may work with single DMA device,
62 * so we have global lock for physical channel management.
64 static struct mtx xdma_mtx;
66 #define XDMA_LOCK() mtx_lock(&xdma_mtx)
67 #define XDMA_UNLOCK() mtx_unlock(&xdma_mtx)
68 #define XDMA_ASSERT_LOCKED() mtx_assert(&xdma_mtx, MA_OWNED)
70 #define FDT_REG_CELLS 4
74 xdma_get_iommu_fdt(xdma_controller_t *xdma, xdma_channel_t *xchan)
76 struct xdma_iommu *xio;
81 node = ofw_bus_get_node(xdma->dma_dev);
82 if (OF_getproplen(node, "xdma,iommu") <= 0)
85 len = OF_getencprop(node, "xdma,iommu", &prop, sizeof(prop));
86 if (len != sizeof(prop)) {
87 device_printf(xdma->dev,
88 "%s: Can't get iommu device node\n", __func__);
93 xio->dev = OF_device_from_xref(prop);
94 if (xio->dev == NULL) {
95 device_printf(xdma->dev,
96 "%s: Can't get iommu device\n", __func__);
106 * Allocate virtual xDMA channel.
109 xdma_channel_alloc(xdma_controller_t *xdma, uint32_t caps)
111 xdma_channel_t *xchan;
114 xchan = malloc(sizeof(xdma_channel_t), M_XDMA, M_WAITOK | M_ZERO);
118 /* Check if this DMA controller supports IOMMU. */
119 if (xdma_get_iommu_fdt(xdma, xchan))
120 caps |= XCHAN_CAP_IOMMU | XCHAN_CAP_NOSEG;
127 /* Request a real channel from hardware driver. */
128 ret = XDMA_CHANNEL_ALLOC(xdma->dma_dev, xchan);
130 device_printf(xdma->dev,
131 "%s: Can't request hardware channel.\n", __func__);
138 TAILQ_INIT(&xchan->ie_handlers);
140 mtx_init(&xchan->mtx_lock, "xDMA chan", NULL, MTX_DEF);
141 mtx_init(&xchan->mtx_qin_lock, "xDMA qin", NULL, MTX_DEF);
142 mtx_init(&xchan->mtx_qout_lock, "xDMA qout", NULL, MTX_DEF);
143 mtx_init(&xchan->mtx_bank_lock, "xDMA bank", NULL, MTX_DEF);
144 mtx_init(&xchan->mtx_proc_lock, "xDMA proc", NULL, MTX_DEF);
146 TAILQ_INIT(&xchan->bank);
147 TAILQ_INIT(&xchan->queue_in);
148 TAILQ_INIT(&xchan->queue_out);
149 TAILQ_INIT(&xchan->processing);
151 if (xchan->caps & XCHAN_CAP_IOMMU)
152 xdma_iommu_init(&xchan->xio);
154 TAILQ_INSERT_TAIL(&xdma->channels, xchan, xchan_next);
162 xdma_channel_free(xdma_channel_t *xchan)
164 xdma_controller_t *xdma;
168 KASSERT(xdma != NULL, ("xdma is NULL"));
172 /* Free the real DMA channel. */
173 err = XDMA_CHANNEL_FREE(xdma->dma_dev, xchan);
175 device_printf(xdma->dev,
176 "%s: Can't free real hw channel.\n", __func__);
181 if (xchan->flags & XCHAN_TYPE_SG)
182 xdma_channel_free_sg(xchan);
184 if (xchan->caps & XCHAN_CAP_IOMMU)
185 xdma_iommu_release(&xchan->xio);
187 xdma_teardown_all_intr(xchan);
189 mtx_destroy(&xchan->mtx_lock);
190 mtx_destroy(&xchan->mtx_qin_lock);
191 mtx_destroy(&xchan->mtx_qout_lock);
192 mtx_destroy(&xchan->mtx_bank_lock);
193 mtx_destroy(&xchan->mtx_proc_lock);
195 TAILQ_REMOVE(&xdma->channels, xchan, xchan_next);
205 xdma_setup_intr(xdma_channel_t *xchan, int flags,
206 int (*cb)(void *, xdma_transfer_status_t *),
207 void *arg, void **ihandler)
209 struct xdma_intr_handler *ih;
210 xdma_controller_t *xdma;
213 KASSERT(xdma != NULL, ("xdma is NULL"));
217 device_printf(xdma->dev,
218 "%s: Can't setup interrupt handler.\n",
224 ih = malloc(sizeof(struct xdma_intr_handler),
225 M_XDMA, M_WAITOK | M_ZERO);
231 TAILQ_INSERT_TAIL(&xchan->ie_handlers, ih, ih_next);
234 if (ihandler != NULL)
241 xdma_teardown_intr(xdma_channel_t *xchan, struct xdma_intr_handler *ih)
243 xdma_controller_t *xdma;
246 KASSERT(xdma != NULL, ("xdma is NULL"));
250 device_printf(xdma->dev,
251 "%s: Can't teardown interrupt.\n", __func__);
255 TAILQ_REMOVE(&xchan->ie_handlers, ih, ih_next);
262 xdma_teardown_all_intr(xdma_channel_t *xchan)
264 struct xdma_intr_handler *ih_tmp;
265 struct xdma_intr_handler *ih;
267 KASSERT(xchan->xdma != NULL, ("xdma is NULL"));
269 TAILQ_FOREACH_SAFE(ih, &xchan->ie_handlers, ih_next, ih_tmp) {
270 TAILQ_REMOVE(&xchan->ie_handlers, ih, ih_next);
278 xdma_request(xdma_channel_t *xchan, struct xdma_request *req)
280 xdma_controller_t *xdma;
285 KASSERT(xdma != NULL, ("xdma is NULL"));
288 ret = XDMA_CHANNEL_REQUEST(xdma->dma_dev, xchan, req);
290 device_printf(xdma->dev,
291 "%s: Can't request a transfer.\n", __func__);
302 xdma_control(xdma_channel_t *xchan, enum xdma_command cmd)
304 xdma_controller_t *xdma;
308 KASSERT(xdma != NULL, ("xdma is NULL"));
310 ret = XDMA_CHANNEL_CONTROL(xdma->dma_dev, xchan, cmd);
312 device_printf(xdma->dev,
313 "%s: Can't process command.\n", __func__);
321 xdma_callback(xdma_channel_t *xchan, xdma_transfer_status_t *status)
323 struct xdma_intr_handler *ih_tmp;
324 struct xdma_intr_handler *ih;
325 struct epoch_tracker et;
327 KASSERT(xchan->xdma != NULL, ("xdma is NULL"));
329 TAILQ_FOREACH_SAFE(ih, &xchan->ie_handlers, ih_next, ih_tmp) {
330 if (ih->cb != NULL) {
331 if (ih->flags & XDMA_INTR_NET)
333 ih->cb(ih->cb_user, status);
334 if (ih->flags & XDMA_INTR_NET)
339 if (xchan->flags & XCHAN_TYPE_SG)
340 xdma_queue_submit(xchan);
345 * Notify the DMA driver we have machine-dependent data in FDT.
348 xdma_ofw_md_data(xdma_controller_t *xdma, pcell_t *cells, int ncells)
352 ret = XDMA_OFW_MD_DATA(xdma->dma_dev,
353 cells, ncells, (void **)&xdma->data);
359 xdma_handle_mem_node(vmem_t *vmem, phandle_t memory)
361 pcell_t reg[FDT_REG_CELLS * FDT_MEM_REGIONS];
363 int addr_cells, size_cells;
364 int i, reg_len, ret, tuple_size, tuples;
365 u_long mem_start, mem_size;
367 if ((ret = fdt_addrsize_cells(OF_parent(memory), &addr_cells,
374 tuple_size = sizeof(pcell_t) * (addr_cells + size_cells);
375 reg_len = OF_getproplen(memory, "reg");
376 if (reg_len <= 0 || reg_len > sizeof(reg))
379 if (OF_getprop(memory, "reg", reg, reg_len) <= 0)
382 tuples = reg_len / tuple_size;
383 regp = (pcell_t *)®
384 for (i = 0; i < tuples; i++) {
385 ret = fdt_data_to_res(regp, addr_cells, size_cells,
386 &mem_start, &mem_size);
390 vmem_add(vmem, mem_start, mem_size, 0);
391 regp += addr_cells + size_cells;
398 xdma_get_memory(device_t dev)
400 phandle_t mem_node, node;
404 node = ofw_bus_get_node(dev);
407 "%s called on not ofw based device.\n", __func__);
411 if (!OF_hasprop(node, "memory-region"))
414 if (OF_getencprop(node, "memory-region", (void *)&mem_handle,
415 sizeof(mem_handle)) <= 0)
418 vmem = vmem_create("xDMA vmem", 0, 0, PAGE_SIZE,
419 PAGE_SIZE, M_BESTFIT | M_WAITOK);
423 mem_node = OF_node_from_xref(mem_handle);
424 if (xdma_handle_mem_node(vmem, mem_node) != 0) {
433 xdma_put_memory(vmem_t *vmem)
440 xchan_set_memory(xdma_channel_t *xchan, vmem_t *vmem)
447 * Allocate xdma controller.
450 xdma_ofw_get(device_t dev, const char *prop)
452 phandle_t node, parent;
453 xdma_controller_t *xdma;
461 node = ofw_bus_get_node(dev);
464 "%s called on not ofw based device.\n", __func__);
466 error = ofw_bus_parse_xref_list_get_length(node,
467 "dmas", "#dma-cells", &ndmas);
470 "%s can't get dmas list.\n", __func__);
476 "%s dmas list is empty.\n", __func__);
480 error = ofw_bus_find_string_index(node, "dma-names", prop, &idx);
483 "%s can't find string index.\n", __func__);
487 error = ofw_bus_parse_xref_list_alloc(node, "dmas", "#dma-cells",
488 idx, &parent, &ncells, &cells);
491 "%s can't get dma device xref.\n", __func__);
495 dma_dev = OF_device_from_xref(parent);
496 if (dma_dev == NULL) {
498 "%s can't get dma device.\n", __func__);
502 xdma = malloc(sizeof(struct xdma_controller),
503 M_XDMA, M_WAITOK | M_ZERO);
505 xdma->dma_dev = dma_dev;
507 TAILQ_INIT(&xdma->channels);
509 xdma_ofw_md_data(xdma, cells, ncells);
510 free(cells, M_OFWPROP);
517 * Allocate xdma controller.
520 xdma_get(device_t dev, device_t dma_dev)
522 xdma_controller_t *xdma;
524 xdma = malloc(sizeof(struct xdma_controller),
525 M_XDMA, M_WAITOK | M_ZERO);
527 xdma->dma_dev = dma_dev;
529 TAILQ_INIT(&xdma->channels);
535 * Free xDMA controller object.
538 xdma_put(xdma_controller_t *xdma)
543 /* Ensure no channels allocated. */
544 if (!TAILQ_EMPTY(&xdma->channels)) {
545 device_printf(xdma->dev, "%s: Can't free xDMA\n", __func__);
549 free(xdma->data, M_DEVBUF);
561 mtx_init(&xdma_mtx, "xDMA", NULL, MTX_DEF);
564 SYSINIT(xdma, SI_SUB_DRIVERS, SI_ORDER_FIRST, xdma_init, NULL);