2 * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
7 * ("CTSRD"), as part of the DARPA CRASH research programme.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include "opt_platform.h"
35 #include <sys/param.h>
38 #include <sys/kernel.h>
39 #include <sys/queue.h>
41 #include <sys/malloc.h>
42 #include <sys/mutex.h>
43 #include <sys/limits.h>
45 #include <sys/sysctl.h>
46 #include <sys/systm.h>
49 #include <machine/bus.h>
52 #include <dev/fdt/fdt_common.h>
53 #include <dev/ofw/ofw_bus.h>
54 #include <dev/ofw/ofw_bus_subr.h>
57 #include <dev/xdma/xdma.h>
61 MALLOC_DEFINE(M_XDMA, "xdma", "xDMA framework");
64 * Multiple xDMA controllers may work with single DMA device,
65 * so we have global lock for physical channel management.
67 static struct mtx xdma_mtx;
68 #define XDMA_LOCK() mtx_lock(&xdma_mtx)
69 #define XDMA_UNLOCK() mtx_unlock(&xdma_mtx)
70 #define XDMA_ASSERT_LOCKED() mtx_assert(&xdma_mtx, MA_OWNED)
75 #define XCHAN_LOCK(xchan) mtx_lock(&(xchan)->mtx_lock)
76 #define XCHAN_UNLOCK(xchan) mtx_unlock(&(xchan)->mtx_lock)
77 #define XCHAN_ASSERT_LOCKED(xchan) mtx_assert(&(xchan)->mtx_lock, MA_OWNED)
80 * Allocate virtual xDMA channel.
83 xdma_channel_alloc(xdma_controller_t *xdma)
85 xdma_channel_t *xchan;
88 xchan = malloc(sizeof(xdma_channel_t), M_XDMA, M_WAITOK | M_ZERO);
90 device_printf(xdma->dev,
91 "%s: Can't allocate memory for channel.\n", __func__);
98 /* Request a real channel from hardware driver. */
99 ret = XDMA_CHANNEL_ALLOC(xdma->dma_dev, xchan);
101 device_printf(xdma->dev,
102 "%s: Can't request hardware channel.\n", __func__);
109 TAILQ_INIT(&xchan->ie_handlers);
110 mtx_init(&xchan->mtx_lock, "xDMA", NULL, MTX_DEF);
112 TAILQ_INSERT_TAIL(&xdma->channels, xchan, xchan_next);
120 xdma_channel_free(xdma_channel_t *xchan)
122 xdma_controller_t *xdma;
129 /* Free the real DMA channel. */
130 err = XDMA_CHANNEL_FREE(xdma->dma_dev, xchan);
132 device_printf(xdma->dev,
133 "%s: Can't free real hw channel.\n", __func__);
138 xdma_teardown_all_intr(xchan);
140 /* Deallocate descriptors, if any. */
141 xdma_desc_free(xchan);
143 mtx_destroy(&xchan->mtx_lock);
145 TAILQ_REMOVE(&xdma->channels, xchan, xchan_next);
155 xdma_setup_intr(xdma_channel_t *xchan, int (*cb)(void *), void *arg,
158 struct xdma_intr_handler *ih;
159 xdma_controller_t *xdma;
162 KASSERT(xdma != NULL, ("xdma is NULL"));
166 device_printf(xdma->dev,
167 "%s: Can't setup interrupt handler.\n",
173 ih = malloc(sizeof(struct xdma_intr_handler),
174 M_XDMA, M_WAITOK | M_ZERO);
176 device_printf(xdma->dev,
177 "%s: Can't allocate memory for interrupt handler.\n",
186 TAILQ_INSERT_TAIL(&xchan->ie_handlers, ih, ih_next);
188 if (ihandler != NULL) {
196 xdma_teardown_intr(xdma_channel_t *xchan, struct xdma_intr_handler *ih)
198 xdma_controller_t *xdma;
201 KASSERT(xdma != NULL, ("xdma is NULL"));
205 device_printf(xdma->dev,
206 "%s: Can't teardown interrupt.\n", __func__);
210 TAILQ_REMOVE(&xchan->ie_handlers, ih, ih_next);
217 xdma_teardown_all_intr(xdma_channel_t *xchan)
219 struct xdma_intr_handler *ih_tmp;
220 struct xdma_intr_handler *ih;
221 xdma_controller_t *xdma;
224 KASSERT(xdma != NULL, ("xdma is NULL"));
226 TAILQ_FOREACH_SAFE(ih, &xchan->ie_handlers, ih_next, ih_tmp) {
227 TAILQ_REMOVE(&xchan->ie_handlers, ih, ih_next);
235 xdma_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err)
237 xdma_channel_t *xchan;
240 xchan = (xdma_channel_t *)arg;
241 KASSERT(xchan != NULL, ("xchan is NULL"));
248 for (i = 0; i < nseg; i++) {
249 xchan->descs_phys[i].ds_addr = segs[i].ds_addr;
250 xchan->descs_phys[i].ds_len = segs[i].ds_len;
255 xdma_desc_alloc_bus_dma(xdma_channel_t *xchan, uint32_t desc_size,
258 xdma_controller_t *xdma;
259 bus_size_t all_desc_sz;
267 nsegments = conf->block_num;
268 all_desc_sz = (nsegments * desc_size);
270 err = bus_dma_tag_create(
271 bus_get_dma_tag(xdma->dev),
272 align, desc_size, /* alignment, boundary */
273 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
274 BUS_SPACE_MAXADDR, /* highaddr */
275 NULL, NULL, /* filter, filterarg */
276 all_desc_sz, nsegments, /* maxsize, nsegments*/
277 desc_size, 0, /* maxsegsize, flags */
278 NULL, NULL, /* lockfunc, lockarg */
281 device_printf(xdma->dev,
282 "%s: Can't create bus_dma tag.\n", __func__);
286 err = bus_dmamem_alloc(xchan->dma_tag, (void **)&xchan->descs,
287 BUS_DMA_WAITOK | BUS_DMA_COHERENT, &xchan->dma_map);
289 device_printf(xdma->dev,
290 "%s: Can't allocate memory for descriptors.\n", __func__);
294 xchan->descs_phys = malloc(nsegments * sizeof(xdma_descriptor_t), M_XDMA,
295 (M_WAITOK | M_ZERO));
298 err = bus_dmamap_load(xchan->dma_tag, xchan->dma_map, xchan->descs,
299 all_desc_sz, xdma_dmamap_cb, xchan, BUS_DMA_WAITOK);
301 device_printf(xdma->dev,
302 "%s: Can't load DMA map.\n", __func__);
306 if (xchan->map_err != 0) {
307 device_printf(xdma->dev,
308 "%s: Can't load DMA map.\n", __func__);
316 * This function called by DMA controller driver.
319 xdma_desc_alloc(xdma_channel_t *xchan, uint32_t desc_size, uint32_t align)
321 xdma_controller_t *xdma;
325 XCHAN_ASSERT_LOCKED(xchan);
329 device_printf(xdma->dev,
330 "%s: Channel was not allocated properly.\n", __func__);
334 if (xchan->flags & XCHAN_DESC_ALLOCATED) {
335 device_printf(xdma->dev,
336 "%s: Descriptors already allocated.\n", __func__);
340 if ((xchan->flags & XCHAN_CONFIGURED) == 0) {
341 device_printf(xdma->dev,
342 "%s: Channel has no configuration.\n", __func__);
349 ret = xdma_desc_alloc_bus_dma(xchan, desc_size, align);
352 device_printf(xdma->dev,
353 "%s: Can't allocate memory for descriptors.\n",
358 xchan->flags |= XCHAN_DESC_ALLOCATED;
360 /* We are going to write to descriptors. */
361 bus_dmamap_sync(xchan->dma_tag, xchan->dma_map, BUS_DMASYNC_PREWRITE);
367 xdma_desc_free(xdma_channel_t *xchan)
370 if ((xchan->flags & XCHAN_DESC_ALLOCATED) == 0) {
371 /* No descriptors allocated. */
375 bus_dmamap_unload(xchan->dma_tag, xchan->dma_map);
376 bus_dmamem_free(xchan->dma_tag, xchan->descs, xchan->dma_map);
377 bus_dma_tag_destroy(xchan->dma_tag);
378 free(xchan->descs_phys, M_XDMA);
380 xchan->flags &= ~(XCHAN_DESC_ALLOCATED);
386 xdma_prep_memcpy(xdma_channel_t *xchan, uintptr_t src_addr,
387 uintptr_t dst_addr, size_t len)
389 xdma_controller_t *xdma;
394 KASSERT(xdma != NULL, ("xdma is NULL"));
397 conf->direction = XDMA_MEM_TO_MEM;
398 conf->src_addr = src_addr;
399 conf->dst_addr = dst_addr;
400 conf->block_len = len;
403 xchan->flags |= (XCHAN_CONFIGURED | XCHAN_TYPE_MEMCPY);
407 /* Deallocate old descriptors, if any. */
408 xdma_desc_free(xchan);
410 ret = XDMA_CHANNEL_PREP_MEMCPY(xdma->dma_dev, xchan);
412 device_printf(xdma->dev,
413 "%s: Can't prepare memcpy transfer.\n", __func__);
419 if (xchan->flags & XCHAN_DESC_ALLOCATED) {
420 /* Driver created xDMA descriptors. */
421 bus_dmamap_sync(xchan->dma_tag, xchan->dma_map,
422 BUS_DMASYNC_POSTWRITE);
431 xdma_prep_cyclic(xdma_channel_t *xchan, enum xdma_direction dir,
432 uintptr_t src_addr, uintptr_t dst_addr, int block_len,
433 int block_num, int src_width, int dst_width)
435 xdma_controller_t *xdma;
440 KASSERT(xdma != NULL, ("xdma is NULL"));
443 conf->direction = dir;
444 conf->src_addr = src_addr;
445 conf->dst_addr = dst_addr;
446 conf->block_len = block_len;
447 conf->block_num = block_num;
448 conf->src_width = src_width;
449 conf->dst_width = dst_width;
451 xchan->flags |= (XCHAN_CONFIGURED | XCHAN_TYPE_CYCLIC);
455 /* Deallocate old descriptors, if any. */
456 xdma_desc_free(xchan);
458 ret = XDMA_CHANNEL_PREP_CYCLIC(xdma->dma_dev, xchan);
460 device_printf(xdma->dev,
461 "%s: Can't prepare cyclic transfer.\n", __func__);
467 if (xchan->flags & XCHAN_DESC_ALLOCATED) {
468 /* Driver has created xDMA descriptors. */
469 bus_dmamap_sync(xchan->dma_tag, xchan->dma_map,
470 BUS_DMASYNC_POSTWRITE);
479 xdma_begin(xdma_channel_t *xchan)
481 xdma_controller_t *xdma;
486 ret = XDMA_CHANNEL_CONTROL(xdma->dma_dev, xchan, XDMA_CMD_BEGIN);
488 device_printf(xdma->dev,
489 "%s: Can't begin the channel operation.\n", __func__);
497 xdma_terminate(xdma_channel_t *xchan)
499 xdma_controller_t *xdma;
504 ret = XDMA_CHANNEL_CONTROL(xdma->dma_dev, xchan, XDMA_CMD_TERMINATE);
506 device_printf(xdma->dev,
507 "%s: Can't terminate the channel operation.\n", __func__);
515 xdma_pause(xdma_channel_t *xchan)
517 xdma_controller_t *xdma;
522 ret = XDMA_CHANNEL_CONTROL(xdma->dma_dev, xchan, XDMA_CMD_PAUSE);
524 device_printf(xdma->dev,
525 "%s: Can't pause the channel operation.\n", __func__);
533 xdma_callback(xdma_channel_t *xchan)
535 struct xdma_intr_handler *ih_tmp;
536 struct xdma_intr_handler *ih;
538 TAILQ_FOREACH_SAFE(ih, &xchan->ie_handlers, ih_next, ih_tmp) {
539 if (ih->cb != NULL) {
548 xdma_assert_locked(void)
551 XDMA_ASSERT_LOCKED();
556 * Notify the DMA driver we have machine-dependent data in FDT.
559 xdma_ofw_md_data(xdma_controller_t *xdma, pcell_t *cells, int ncells)
563 ret = XDMA_OFW_MD_DATA(xdma->dma_dev, cells, ncells, (void **)&xdma->data);
569 * Allocate xdma controller.
572 xdma_ofw_get(device_t dev, const char *prop)
574 phandle_t node, parent;
575 xdma_controller_t *xdma;
583 node = ofw_bus_get_node(dev);
586 "%s called on not ofw based device.\n", __func__);
589 error = ofw_bus_parse_xref_list_get_length(node,
590 "dmas", "#dma-cells", &ndmas);
593 "%s can't get dmas list.\n", __func__);
599 "%s dmas list is empty.\n", __func__);
603 error = ofw_bus_find_string_index(node, "dma-names", prop, &idx);
606 "%s can't find string index.\n", __func__);
610 error = ofw_bus_parse_xref_list_alloc(node, "dmas", "#dma-cells",
611 idx, &parent, &ncells, &cells);
614 "%s can't get dma device xref.\n", __func__);
618 dma_dev = OF_device_from_xref(parent);
619 if (dma_dev == NULL) {
621 "%s can't get dma device.\n", __func__);
625 xdma = malloc(sizeof(struct xdma_controller), M_XDMA, M_WAITOK | M_ZERO);
628 "%s can't allocate memory for xdma.\n", __func__);
632 xdma->dma_dev = dma_dev;
634 TAILQ_INIT(&xdma->channels);
636 xdma_ofw_md_data(xdma, cells, ncells);
637 free(cells, M_OFWPROP);
644 * Free xDMA controller object.
647 xdma_put(xdma_controller_t *xdma)
652 /* Ensure no channels allocated. */
653 if (!TAILQ_EMPTY(&xdma->channels)) {
654 device_printf(xdma->dev, "%s: Can't free xDMA\n", __func__);
658 free(xdma->data, M_DEVBUF);
670 mtx_init(&xdma_mtx, "xDMA", NULL, MTX_DEF);
673 SYSINIT(xdma, SI_SUB_DRIVERS, SI_ORDER_FIRST, xdma_init, NULL);