2 * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
5 * Portions of this software were developed by SRI International and the
6 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
7 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
9 * Portions of this software were developed by the University of Cambridge
10 * Computer Laboratory as part of the CTSRD Project, with support from the
11 * UK Higher Education Innovation Fund (HEIF).
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
42 #include <sys/param.h>
43 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/module.h>
47 #include <sys/malloc.h>
49 #include <sys/timeet.h>
50 #include <sys/timetc.h>
51 #include <sys/watchdog.h>
53 #include <dev/spibus/spi.h>
54 #include <dev/spibus/spibusvar.h>
56 #include "spibus_if.h"
58 #include <dev/fdt/fdt_common.h>
59 #include <dev/ofw/openfirm.h>
60 #include <dev/ofw/ofw_bus.h>
61 #include <dev/ofw/ofw_bus_subr.h>
63 #include <machine/bus.h>
64 #include <machine/cpu.h>
65 #include <machine/intr.h>
67 #define READ4(_sc, _reg) \
68 bus_space_read_4(_sc->bst, _sc->bsh, _reg)
69 #define WRITE4(_sc, _reg, _val) \
70 bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
72 #define SPI_SRR 0x40 /* Software reset register */
73 #define SRR_RESET 0x0A /* The only reset value */
74 #define SPI_CR 0x60 /* Control register */
75 #define CR_LSB_FIRST (1 << 9) /* LSB first */
76 #define CR_MASTER_TI (1 << 8) /* Master Transaction Inhibit */
77 #define CR_MSS (1 << 7) /* Manual Slave Select */
78 #define CR_RST_RX (1 << 6) /* RX FIFO Reset */
79 #define CR_RST_TX (1 << 5) /* TX FIFO Reset */
80 #define CR_CPHA (1 << 4) /* Clock phase */
81 #define CR_CPOL (1 << 3) /* Clock polarity */
82 #define CR_MASTER (1 << 2) /* Master (SPI master mode) */
83 #define CR_SPE (1 << 1) /* SPI system enable */
84 #define CR_LOOP (1 << 0) /* Local loopback mode */
85 #define SPI_SR 0x64 /* Status register */
86 #define SR_TX_FULL (1 << 3) /* Transmit full */
87 #define SR_TX_EMPTY (1 << 2) /* Transmit empty */
88 #define SR_RX_FULL (1 << 1) /* Receive full */
89 #define SR_RX_EMPTY (1 << 0) /* Receive empty */
90 #define SPI_DTR 0x68 /* Data transmit register */
91 #define SPI_DRR 0x6C /* Data receive register */
92 #define SPI_SSR 0x70 /* Slave select register */
93 #define SPI_TFOR 0x74 /* Transmit FIFO Occupancy Register */
94 #define SPI_RFOR 0x78 /* Receive FIFO Occupancy Register */
95 #define SPI_DGIER 0x1C /* Device global interrupt enable register */
96 #define SPI_IPISR 0x20 /* IP interrupt status register */
97 #define SPI_IPIER 0x28 /* IP interrupt enable register */
100 struct resource *res[1];
102 bus_space_handle_t bsh;
106 static struct resource_spec spi_spec[] = {
107 { SYS_RES_MEMORY, 0, RF_ACTIVE },
112 spi_probe(device_t dev)
115 if (!ofw_bus_status_okay(dev))
118 if (!ofw_bus_is_compatible(dev, "xlnx,xps-spi-3.2"))
121 device_set_desc(dev, "Xilinx Quad SPI");
122 return (BUS_PROBE_DEFAULT);
126 spi_attach(device_t dev)
128 struct spi_softc *sc;
131 sc = device_get_softc(dev);
133 if (bus_alloc_resources(dev, spi_spec, sc->res)) {
134 device_printf(dev, "could not allocate resources\n");
138 /* Memory interface */
139 sc->bst = rman_get_bustag(sc->res[0]);
140 sc->bsh = rman_get_bushandle(sc->res[0]);
143 WRITE4(sc, SPI_SRR, SRR_RESET);
147 reg = (CR_MASTER | CR_MSS | CR_RST_RX | CR_RST_TX);
148 WRITE4(sc, SPI_CR, reg);
149 WRITE4(sc, SPI_DGIER, 0); /* Disable interrupts */
151 reg = (CR_MASTER | CR_MSS | CR_SPE);
152 WRITE4(sc, SPI_CR, reg);
154 device_add_child(dev, "spibus", 0);
155 return (bus_generic_attach(dev));
159 spi_txrx(struct spi_softc *sc, uint8_t *out_buf,
160 uint8_t *in_buf, int bufsz, int cs)
165 for (i = 0; i < bufsz; i++) {
166 WRITE4(sc, SPI_DTR, out_buf[i]);
168 while(!(READ4(sc, SPI_SR) & SR_TX_EMPTY))
171 data = READ4(sc, SPI_DRR);
173 in_buf[i] = (data & 0xff);
180 spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
182 struct spi_softc *sc;
186 sc = device_get_softc(dev);
188 KASSERT(cmd->tx_cmd_sz == cmd->rx_cmd_sz,
189 ("%s: TX/RX command sizes should be equal", __func__));
190 KASSERT(cmd->tx_data_sz == cmd->rx_data_sz,
191 ("%s: TX/RX data sizes should be equal", __func__));
193 /* get the proper chip select */
194 spibus_get_cs(child, &cs);
196 cs &= ~SPIBUS_CS_HIGH;
199 reg = READ4(sc, SPI_SSR);
201 WRITE4(sc, SPI_SSR, reg);
204 spi_txrx(sc, cmd->tx_cmd, cmd->rx_cmd, cmd->tx_cmd_sz, cs);
207 spi_txrx(sc, cmd->tx_data, cmd->rx_data, cmd->tx_data_sz, cs);
210 reg = READ4(sc, SPI_SSR);
212 WRITE4(sc, SPI_SSR, reg);
217 static device_method_t spi_methods[] = {
218 /* Device interface */
219 DEVMETHOD(device_probe, spi_probe),
220 DEVMETHOD(device_attach, spi_attach),
223 DEVMETHOD(spibus_transfer, spi_transfer),
227 static driver_t spi_driver = {
230 sizeof(struct spi_softc),
233 static devclass_t spi_devclass;
235 DRIVER_MODULE(spi, simplebus, spi_driver, spi_devclass, 0, 0);