sys/dts/arm/rt1310a.dtsi

   1 /*
   2  * Copyright (c) 2011 Jakub Klama <jceel@FreeBSD.org>
   3  * Copyright (c) 2015 Hiroki Mori
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * Ralink RT1310A Device Tree Source.
  27  *
  28  * $FreeBSD$
  29  */
  30
  31 / {
  32         compatible = "ralink,rt1310a-soc";
  33         #address-cells = <1>;
  34         #size-cells = <1>;
  35
  36         aliases {
  37                 serial0 = &serial0;
  38         };
  39
  40         cpus {
  41                 #address-cells = <1>;
  42                 #size-cells = <0>;
  43
  44                 cpu@0 {
  45                         device_type = "cpu";
  46                         compatible = "ARM,926EJ-S";
  47                         reg = <0x0>;
  48                         d-cache-line-size = <32>;       // 32 bytes
  49                         i-cache-line-size = <32>;       // 32 bytes
  50                         d-cache-size = <0x4000>;        // L1, 16K
  51                         i-cache-size = <0x4000>;        // L1, 16K
  52                         timebase-frequency = <0>;
  53                         bus-frequency = <0>;
  54                         clock-frequency = <0>;
  55                 };
  56         };
  57
  58         memory {
  59                 device_type = "memory";
  60                 reg = <0x40000000 0x1000000>;           // 16M at 0x40000000
  61         };
  62
  63         localbus@1f000000 {
  64                 #address-cells = <1>;
  65                 #size-cells = <1>;
  66                 compatible = "simple-bus";
  67                 ranges = <0x0 0x1f000000 0x400000>;
  68         };
  69
  70         ahb@19C00000 {
  71                 #address-cells = <1>;
  72                 #size-cells = <1>;
  73                 compatible = "simple-bus";
  74                 ranges = <0x0 0x19C00000 0xE0000>;
  75                 bus-frequency = <13000000>;
  76
  77                 PIC: pic@40000 {
  78                         interrupt-controller;
  79                         #address-cells = <0>;
  80                         #interrupt-cells = <1>;
  81                         reg = <0x40000 0x20000>;
  82                         compatible = "rt,pic";
  83                 };
  84
  85                 fvmdio@0 {
  86                         #address-cells = <1>;
  87                         #size-cells = <0>;
  88                         compatible = "fv,mdio";
  89                         reg = <0x80000 0x20000>;
  90                 };
  91
  92                 enet0:fv_mac0@80000 {
  93                         compatible = "fv,ethernet";
  94                         reg = <0x80000 0x20000>;
  95                         interrupts = <7>;
  96                         interrupt-parent = <&PIC>;
  97
  98                 };
  99
 100                 enet1:fv_mac1@A0000 {
 101                         compatible = "fv,ethernet";
 102                         reg = <0xA0000 0x20000>;
 103                         interrupts = <8>;
 104                         interrupt-parent = <&PIC>;
 105                 };
 106
 107         };
 108
 109         apb@1E800000 {
 110                 #address-cells = <1>;
 111                 #size-cells = <1>;
 112                 compatible = "simple-bus";
 113                 ranges = <0x0 0x1E800000 0x800000>;
 114                 bus-frequency = <75000000>;
 115
 116                 timer@000000 {
 117                         compatible = "rt,timer";
 118                         reg = <0x0 0x10
 119                                 0x10 0x10
 120                                 0x20 0x10
 121                                 0x30 0x10>;
 122                         interrupts = <3 4 5>;
 123                         interrupt-parent = <&PIC>;
 124                 };
 125
 126                 rtc@20000 {
 127                         compatible = "rt,rtc";
 128                         interrupts = <6>;
 129                         reg = <0x20000 0x20000>;
 130                 };
 131
 132                 serial0: serial@40000 {
 133                         compatible = "ns16550";
 134                         reg = <0x40000 0x20000>;
 135                         interrupts = <1>;
 136                         reg-shift = <2>;
 137                         clock-frequency = <6758400>;
 138                         current-speed = <38400>;
 139                         interrupt-parent = <&PIC>;
 140                 };
 141
 142                 gpio0: gpio@A0000 {
 143                         compatible = "ralink,rt1310-gpio";
 144                         gpio-controller;
 145                         #gpio-cells = <2>;
 146                         interrupts = <8>;
 147                         reg = <0xA0000 0x20000>;
 148                 };
 149         };
 150
 151
 152 /*
 153         chosen {
 154                 stdin = "serial0";
 155                 stdout = "serial0";
 156         };
 157 */
 158 };
 159