2 * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 model = "Freescale Vybrid Family";
31 compatible = "freescale,vybrid", "fsl,mvf";
35 interrupt-parent = <&GIC>;
56 compatible = "simple-bus";
61 compatible = "fsl,mvf600-src";
62 reg = <0x4006E000 0x100>;
66 compatible = "fsl,mvf600-mscm";
67 reg = <0x40001000 0x1000>;
70 GIC: interrupt-controller@01c81000 {
71 compatible = "arm,gic";
72 reg = <0x40003000 0x1000>, /* Distributor Registers */
73 <0x40002100 0x100>; /* CPU Interface Registers */
75 #interrupt-cells = <1>;
79 compatible = "fsl,mvf600-anadig";
80 reg = <0x40050000 0x300>;
84 compatible = "fsl,mvf600-ccm";
85 reg = <0x4006b000 0x1000>;
90 compatible = "arm,mpcore-timers";
91 clock-frequency = <133000000>;
94 reg = < 0x40002200 0x100 >, /* Global Timer Registers */
95 < 0x40002600 0x100 >; /* Private Timer Registers */
96 interrupts = < 27 29 >;
97 interrupt-parent = < &GIC >;
101 compatible = "fsl,mvf600-dmamux";
102 reg = <0x40024000 0x100>,
108 edma0: edma@40018000 {
109 compatible = "fsl,mvf600-edma";
110 reg = <0x40018000 0x1000>,
111 <0x40019000 0x1000>; /* TCD */
112 interrupts = < 40 41 >;
113 interrupt-parent = <&GIC>;
118 edma1: edma@40098000 {
119 compatible = "fsl,mvf600-edma";
120 reg = <0x40098000 0x1000>,
121 <0x40099000 0x1000>; /* TCD */
122 interrupts = < 42 43 >;
123 interrupt-parent = <&GIC>;
129 compatible = "fsl,mvf600-pit";
130 reg = <0x40037000 0x1000>;
132 interrupt-parent = <&GIC>;
133 clock-frequency = < 24000000 >;
137 compatible = "fsl,mvf600-lptmr";
138 reg = <0x40040000 0x1000>;
140 interrupt-parent = <&GIC>;
141 clock-frequency = < 24000000 >;
145 compatible = "fsl,mvf600-iomuxc";
146 reg = <0x40048000 0x1000>;
150 compatible = "fsl,mvf600-port";
151 reg = <0x40049000 0x5000>;
152 interrupts = < 139 140 141 142 143 >;
153 interrupt-parent = <&GIC>;
157 compatible = "fsl,mvf600-gpio";
158 reg = <0x400FF000 0x200>;
164 #address-cells = <1>;
166 compatible = "fsl,mvf600-nand";
167 reg = <0x400E0000 0x10000>;
168 interrupts = < 115 >;
169 interrupt-parent = <&GIC>;
170 clock_names = "nand";
174 reg = <0x40000 0x200000>; /* 2MB */
180 reg = <0x240000 0x200000>; /* 2MB */
185 reg = <0x440000 0xa00000>; /* 10MB */
190 reg = <0xe40000 0x1e000000>; /* 480MB */
195 sdhci0: sdhci@400B1000 {
196 compatible = "fsl,mvf600-sdhci";
197 reg = <0x400B1000 0x1000>;
199 interrupt-parent = <&GIC>;
200 clock-frequency = <50000000>;
202 clock_names = "esdhc0";
205 sdhci1: sdhci@400B2000 {
206 compatible = "fsl,mvf600-sdhci";
207 reg = <0x400B2000 0x1000>;
209 interrupt-parent = <&GIC>;
210 clock-frequency = <50000000>;
212 clock_names = "esdhc1";
213 iomux_config = < 14 0x500060
221 serial0: serial@40027000 {
222 compatible = "fsl,mvf600-uart";
223 reg = <0x40027000 0x1000>;
225 interrupt-parent = <&GIC>;
226 current-speed = <115200>;
227 clock-frequency = < 24000000 >;
231 serial1: serial@40028000 {
232 compatible = "fsl,mvf600-uart";
233 reg = <0x40028000 0x1000>;
235 interrupt-parent = <&GIC>;
236 current-speed = <115200>;
237 clock-frequency = < 24000000 >;
242 compatible = "fsl,mvf600-usb-ehci", "usb-ehci";
243 reg = < 0x40034000 0x1000 >, /* ehci */
244 < 0x40035000 0x1000 >, /* usbc */
245 < 0x40050800 0x100 >; /* phy */
246 interrupts = < 107 >;
247 interrupt-parent = <&GIC>;
248 iomux_config = < 134 0x0001be
253 compatible = "fsl,mvf600-usb-ehci", "usb-ehci";
254 reg = < 0x400b4000 0x1000 >, /* ehci */
255 < 0x400b5000 0x1000 >, /* usbc */
256 < 0x40050C00 0x100 >; /* phy */
257 interrupts = < 108 >;
258 interrupt-parent = <&GIC>;
259 iomux_config = < 134 0x0001be
263 fec0: ethernet@400D0000 {
264 compatible = "fsl,mvf600-fec";
265 reg = <0x400D0000 0x1000>;
266 interrupts = < 110 >;
267 interrupt-parent = <&GIC>;
269 phy-disable-preamble;
271 clock_names = "enet";
272 iomux_config = < 45 0x100061
283 fec1: ethernet@400D1000 {
284 compatible = "fsl,mvf600-fec";
285 reg = <0x400D1000 0x1000>;
286 interrupts = < 111 >;
287 interrupt-parent = <&GIC>;
289 phy-disable-preamble;
291 clock_names = "enet";
292 iomux_config = < 54 0x103192
304 compatible = "fsl,mvf600-sai";
305 reg = <0x4002F000 0x1000>;
306 interrupts = < 116 >;
307 interrupt-parent = <&GIC>;
312 compatible = "fsl,mvf600-sai";
313 reg = <0x40030000 0x1000>;
314 interrupts = < 117 >;
315 interrupt-parent = <&GIC>;
320 compatible = "fsl,mvf600-sai";
321 reg = <0x40031000 0x1000>;
322 interrupts = < 118 >;
323 interrupt-parent = <&GIC>;
328 compatible = "fsl,mvf600-sai";
329 reg = <0x40032000 0x1000>;
330 interrupts = < 119 >;
331 interrupt-parent = <&GIC>;
333 edma-controller = <&edma1>;
334 edma-src-receive = < 8 >;
335 edma-src-transmit = < 9 >;
336 edma-mux-group = < 1 >;
337 clock_names = "sai3", "cko1";
338 iomux_config = < 16 0x200060
341 40 0x400061 >; /* CKO1 */
344 esai: esai@40062000 {
345 compatible = "fsl,mvf600-esai";
346 reg = <0x40062000 0x1000>;
347 interrupts = < 120 >;
348 interrupt-parent = <&GIC>;
350 clock_names = "esai";
351 iomux_config = < 45 0x400061
364 compatible = "fsl,mvf600-spi";
365 reg = <0x4002C000 0x1000>;
367 interrupt-parent = <&GIC>;
369 iomux_config = < 40 0x100061
377 compatible = "fsl,mvf600-spi";
378 reg = <0x4002D000 0x1000>;
379 interrupts = < 100 >;
380 interrupt-parent = <&GIC>;
385 compatible = "fsl,mvf600-spi";
386 reg = <0x400AC000 0x1000>;
387 interrupts = < 101 >;
388 interrupt-parent = <&GIC>;
393 compatible = "fsl,mvf600-spi";
394 reg = <0x400AD000 0x1000>;
395 interrupts = < 102 >;
396 interrupt-parent = <&GIC>;
401 compatible = "fsl,mvf600-i2c";
402 reg = <0x40066000 0x1000>;
403 interrupts = < 103 >;
404 interrupt-parent = <&GIC>;
407 iomux_config = < 36 0x2034d3
414 compatible = "fsl,mvf600-i2c";
415 reg = <0x40067000 0x1000>;
416 interrupts = < 104 >;
417 interrupt-parent = <&GIC>;
422 compatible = "fsl,mvf600-i2c";
423 reg = <0x400E6000 0x1000>;
424 interrupts = < 105 >;
425 interrupt-parent = <&GIC>;
430 compatible = "fsl,mvf600-i2c";
431 reg = <0x400E7000 0x1000>;
432 interrupts = < 106 >;
433 interrupt-parent = <&GIC>;
438 compatible = "fsl,mvf600-adc";
439 reg = <0x4003B000 0x1000>;
441 interrupt-parent = <&GIC>;
446 compatible = "fsl,mvf600-adc";
447 reg = <0x400BB000 0x1000>;
449 interrupt-parent = <&GIC>;
453 tcon0: tcon@4003D000 {
454 compatible = "fsl,mvf600-tcon";
455 reg = <0x4003D000 0x1000>;
459 dcu0: dcu4@40058000 {
460 compatible = "fsl,mvf600-dcu4";
461 reg = <0x40058000 0x7000>;
463 interrupt-parent = <&GIC>;
465 clock_names = "dcu0";
466 iomux_config = < 105 0x100044