1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for Marvell Armada 390 Development Board
6 * Copyright (C) 2016 Marvell
8 * Grzegorz Jaszczyk <jaz@semihalf.com>
12 #include "armada-390.dtsi"
15 model = "Marvell Armada 390 Development Board";
16 compatible = "marvell,a390-db", "marvell,armada390";
19 stdout-path = "serial0:115200n8";
23 device_type = "memory";
24 reg = <0x00000000 0x80000000>; /* 2 GB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
34 clock-frequency = <100000>;
37 compatible = "atmel,24c64";
54 pinctrl-0 = <&nand_pins>;
55 pinctrl-names = "default";
57 marvell,nand-keep-config;
58 marvell,nand-enable-arbiter;
60 nand-ecc-strength = <8>;
61 nand-ecc-step-size = <512>;
64 compatible = "fixed-partitions";
74 reg = <0x800000 0x800000>;
78 reg = <0x1000000 0x3f000000>;
112 pinctrl-0 = <&spi1_pins>;
113 pinctrl-names = "default";
116 #address-cells = <1>;
118 compatible = "n25q128a13",
120 reg = <0>; /* Chip select 0 */
121 spi-max-frequency = <108000000>;
124 compatible = "fixed-partitions";
125 #address-cells = <1>;
133 label = "Filesystem";
134 reg = <0x400000 0xc00000>;