1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2400";
9 interrupt-parent = <&vic>;
39 compatible = "arm,arm926ej-s";
46 device_type = "memory";
51 compatible = "simple-bus";
56 fmc: flash-controller@1e620000 {
57 reg = < 0x1e620000 0x94
58 0x20000000 0x10000000 >;
61 compatible = "aspeed,ast2400-fmc";
62 clocks = <&syscon ASPEED_CLK_AHB>;
67 compatible = "jedec,spi-nor";
72 spi: flash-controller@1e630000 {
73 reg = < 0x1e630000 0x18
74 0x30000000 0x10000000 >;
77 compatible = "aspeed,ast2400-spi";
78 clocks = <&syscon ASPEED_CLK_AHB>;
82 compatible = "jedec,spi-nor";
87 vic: interrupt-controller@1e6c0080 {
88 compatible = "aspeed,ast2400-vic";
90 #interrupt-cells = <1>;
91 valid-sources = <0xffffffff 0x0007ffff>;
92 reg = <0x1e6c0080 0x80>;
95 mac0: ethernet@1e660000 {
96 compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
97 reg = <0x1e660000 0x180>;
99 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
103 mac1: ethernet@1e680000 {
104 compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
105 reg = <0x1e680000 0x180>;
107 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
111 ehci0: usb@1e6a1000 {
112 compatible = "aspeed,ast2400-ehci", "generic-ehci";
113 reg = <0x1e6a1000 0x100>;
115 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
120 compatible = "aspeed,ast2400-uhci", "generic-uhci";
121 reg = <0x1e6b0000 0x100>;
124 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
129 compatible = "simple-bus";
130 #address-cells = <1>;
134 syscon: syscon@1e6e2000 {
135 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
136 reg = <0x1e6e2000 0x1a8>;
137 #address-cells = <1>;
143 compatible = "aspeed,g4-pinctrl";
148 rng: hwrng@1e6e2078 {
149 compatible = "timeriomem_rng";
150 reg = <0x1e6e2078 0x4>;
156 compatible = "aspeed,ast2400-adc";
157 reg = <0x1e6e9000 0xb0>;
158 clocks = <&syscon ASPEED_CLK_APB>;
159 resets = <&syscon ASPEED_RESET_ADC>;
160 #io-channel-cells = <1>;
165 compatible = "mmio-sram";
166 reg = <0x1e720000 0x8000>; // 32K
169 gpio: gpio@1e780000 {
172 compatible = "aspeed,ast2400-gpio";
173 reg = <0x1e780000 0x1000>;
175 gpio-ranges = <&pinctrl 0 0 220>;
176 clocks = <&syscon ASPEED_CLK_APB>;
177 interrupt-controller;
180 timer: timer@1e782000 {
181 /* This timer is a Faraday FTTMR010 derivative */
182 compatible = "aspeed,ast2400-timer";
183 reg = <0x1e782000 0x90>;
184 interrupts = <16 17 18 35 36 37 38 39>;
185 clocks = <&syscon ASPEED_CLK_APB>;
186 clock-names = "PCLK";
189 uart1: serial@1e783000 {
190 compatible = "ns16550a";
191 reg = <0x1e783000 0x20>;
194 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
195 resets = <&lpc_reset 4>;
200 uart5: serial@1e784000 {
201 compatible = "ns16550a";
202 reg = <0x1e784000 0x20>;
205 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
210 wdt1: watchdog@1e785000 {
211 compatible = "aspeed,ast2400-wdt";
212 reg = <0x1e785000 0x1c>;
213 clocks = <&syscon ASPEED_CLK_APB>;
216 wdt2: watchdog@1e785020 {
217 compatible = "aspeed,ast2400-wdt";
218 reg = <0x1e785020 0x1c>;
219 clocks = <&syscon ASPEED_CLK_APB>;
222 pwm_tacho: pwm-tacho-controller@1e786000 {
223 compatible = "aspeed,ast2400-pwm-tacho";
224 #address-cells = <1>;
226 reg = <0x1e786000 0x1000>;
227 clocks = <&syscon ASPEED_CLK_APB>;
228 resets = <&syscon ASPEED_RESET_PWM>;
232 vuart: serial@1e787000 {
233 compatible = "aspeed,ast2400-vuart";
234 reg = <0x1e787000 0x40>;
237 clocks = <&syscon ASPEED_CLK_APB>;
243 compatible = "aspeed,ast2400-lpc", "simple-mfd";
244 reg = <0x1e789000 0x1000>;
246 #address-cells = <1>;
248 ranges = <0x0 0x1e789000 0x1000>;
251 compatible = "aspeed,ast2400-lpc-bmc";
255 lpc_host: lpc-host@80 {
256 compatible = "aspeed,ast2400-lpc-host", "simple-mfd", "syscon";
260 #address-cells = <1>;
262 ranges = <0x0 0x80 0x1e0>;
264 lpc_ctrl: lpc-ctrl@0 {
265 compatible = "aspeed,ast2400-lpc-ctrl";
267 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
271 lpc_snoop: lpc-snoop@0 {
272 compatible = "aspeed,ast2400-lpc-snoop";
279 compatible = "aspeed,ast2400-lhc";
280 reg = <0x20 0x24 0x48 0x8>;
283 lpc_reset: reset-controller@18 {
284 compatible = "aspeed,ast2400-lpc-reset";
290 compatible = "aspeed,ast2400-ibt-bmc";
298 uart2: serial@1e78d000 {
299 compatible = "ns16550a";
300 reg = <0x1e78d000 0x20>;
303 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
304 resets = <&lpc_reset 5>;
309 uart3: serial@1e78e000 {
310 compatible = "ns16550a";
311 reg = <0x1e78e000 0x20>;
314 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
315 resets = <&lpc_reset 6>;
320 uart4: serial@1e78f000 {
321 compatible = "ns16550a";
322 reg = <0x1e78f000 0x20>;
325 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
326 resets = <&lpc_reset 7>;
332 compatible = "simple-bus";
333 #address-cells = <1>;
335 ranges = <0 0x1e78a000 0x1000>;
342 i2c_ic: interrupt-controller@0 {
343 #interrupt-cells = <1>;
344 compatible = "aspeed,ast2400-i2c-ic";
347 interrupt-controller;
351 #address-cells = <1>;
353 #interrupt-cells = <1>;
356 compatible = "aspeed,ast2400-i2c-bus";
357 clocks = <&syscon ASPEED_CLK_APB>;
358 resets = <&syscon ASPEED_RESET_I2C>;
359 bus-frequency = <100000>;
361 interrupt-parent = <&i2c_ic>;
363 /* Does not need pinctrl properties */
367 #address-cells = <1>;
369 #interrupt-cells = <1>;
372 compatible = "aspeed,ast2400-i2c-bus";
373 clocks = <&syscon ASPEED_CLK_APB>;
374 resets = <&syscon ASPEED_RESET_I2C>;
375 bus-frequency = <100000>;
377 interrupt-parent = <&i2c_ic>;
379 /* Does not need pinctrl properties */
383 #address-cells = <1>;
385 #interrupt-cells = <1>;
388 compatible = "aspeed,ast2400-i2c-bus";
389 clocks = <&syscon ASPEED_CLK_APB>;
390 resets = <&syscon ASPEED_RESET_I2C>;
391 bus-frequency = <100000>;
393 interrupt-parent = <&i2c_ic>;
394 pinctrl-names = "default";
395 pinctrl-0 = <&pinctrl_i2c3_default>;
400 #address-cells = <1>;
402 #interrupt-cells = <1>;
405 compatible = "aspeed,ast2400-i2c-bus";
406 clocks = <&syscon ASPEED_CLK_APB>;
407 resets = <&syscon ASPEED_RESET_I2C>;
408 bus-frequency = <100000>;
410 interrupt-parent = <&i2c_ic>;
411 pinctrl-names = "default";
412 pinctrl-0 = <&pinctrl_i2c4_default>;
417 #address-cells = <1>;
419 #interrupt-cells = <1>;
422 compatible = "aspeed,ast2400-i2c-bus";
423 clocks = <&syscon ASPEED_CLK_APB>;
424 resets = <&syscon ASPEED_RESET_I2C>;
425 bus-frequency = <100000>;
427 interrupt-parent = <&i2c_ic>;
428 pinctrl-names = "default";
429 pinctrl-0 = <&pinctrl_i2c5_default>;
434 #address-cells = <1>;
436 #interrupt-cells = <1>;
439 compatible = "aspeed,ast2400-i2c-bus";
440 clocks = <&syscon ASPEED_CLK_APB>;
441 resets = <&syscon ASPEED_RESET_I2C>;
442 bus-frequency = <100000>;
444 interrupt-parent = <&i2c_ic>;
445 pinctrl-names = "default";
446 pinctrl-0 = <&pinctrl_i2c6_default>;
451 #address-cells = <1>;
453 #interrupt-cells = <1>;
456 compatible = "aspeed,ast2400-i2c-bus";
457 clocks = <&syscon ASPEED_CLK_APB>;
458 resets = <&syscon ASPEED_RESET_I2C>;
459 bus-frequency = <100000>;
461 interrupt-parent = <&i2c_ic>;
462 pinctrl-names = "default";
463 pinctrl-0 = <&pinctrl_i2c7_default>;
468 #address-cells = <1>;
470 #interrupt-cells = <1>;
473 compatible = "aspeed,ast2400-i2c-bus";
474 clocks = <&syscon ASPEED_CLK_APB>;
475 resets = <&syscon ASPEED_RESET_I2C>;
476 bus-frequency = <100000>;
478 interrupt-parent = <&i2c_ic>;
479 pinctrl-names = "default";
480 pinctrl-0 = <&pinctrl_i2c8_default>;
485 #address-cells = <1>;
487 #interrupt-cells = <1>;
490 compatible = "aspeed,ast2400-i2c-bus";
491 clocks = <&syscon ASPEED_CLK_APB>;
492 resets = <&syscon ASPEED_RESET_I2C>;
493 bus-frequency = <100000>;
495 interrupt-parent = <&i2c_ic>;
496 pinctrl-names = "default";
497 pinctrl-0 = <&pinctrl_i2c9_default>;
502 #address-cells = <1>;
504 #interrupt-cells = <1>;
507 compatible = "aspeed,ast2400-i2c-bus";
508 clocks = <&syscon ASPEED_CLK_APB>;
509 resets = <&syscon ASPEED_RESET_I2C>;
510 bus-frequency = <100000>;
512 interrupt-parent = <&i2c_ic>;
513 pinctrl-names = "default";
514 pinctrl-0 = <&pinctrl_i2c10_default>;
519 #address-cells = <1>;
521 #interrupt-cells = <1>;
524 compatible = "aspeed,ast2400-i2c-bus";
525 clocks = <&syscon ASPEED_CLK_APB>;
526 resets = <&syscon ASPEED_RESET_I2C>;
527 bus-frequency = <100000>;
529 interrupt-parent = <&i2c_ic>;
530 pinctrl-names = "default";
531 pinctrl-0 = <&pinctrl_i2c11_default>;
536 #address-cells = <1>;
538 #interrupt-cells = <1>;
541 compatible = "aspeed,ast2400-i2c-bus";
542 clocks = <&syscon ASPEED_CLK_APB>;
543 resets = <&syscon ASPEED_RESET_I2C>;
544 bus-frequency = <100000>;
546 interrupt-parent = <&i2c_ic>;
547 pinctrl-names = "default";
548 pinctrl-0 = <&pinctrl_i2c12_default>;
553 #address-cells = <1>;
555 #interrupt-cells = <1>;
558 compatible = "aspeed,ast2400-i2c-bus";
559 clocks = <&syscon ASPEED_CLK_APB>;
560 resets = <&syscon ASPEED_RESET_I2C>;
561 bus-frequency = <100000>;
563 interrupt-parent = <&i2c_ic>;
564 pinctrl-names = "default";
565 pinctrl-0 = <&pinctrl_i2c13_default>;
570 #address-cells = <1>;
572 #interrupt-cells = <1>;
575 compatible = "aspeed,ast2400-i2c-bus";
576 clocks = <&syscon ASPEED_CLK_APB>;
577 resets = <&syscon ASPEED_RESET_I2C>;
578 bus-frequency = <100000>;
580 interrupt-parent = <&i2c_ic>;
581 pinctrl-names = "default";
582 pinctrl-0 = <&pinctrl_i2c14_default>;
588 pinctrl_acpi_default: acpi_default {
593 pinctrl_adc0_default: adc0_default {
598 pinctrl_adc1_default: adc1_default {
603 pinctrl_adc10_default: adc10_default {
608 pinctrl_adc11_default: adc11_default {
613 pinctrl_adc12_default: adc12_default {
618 pinctrl_adc13_default: adc13_default {
623 pinctrl_adc14_default: adc14_default {
628 pinctrl_adc15_default: adc15_default {
633 pinctrl_adc2_default: adc2_default {
638 pinctrl_adc3_default: adc3_default {
643 pinctrl_adc4_default: adc4_default {
648 pinctrl_adc5_default: adc5_default {
653 pinctrl_adc6_default: adc6_default {
658 pinctrl_adc7_default: adc7_default {
663 pinctrl_adc8_default: adc8_default {
668 pinctrl_adc9_default: adc9_default {
673 pinctrl_bmcint_default: bmcint_default {
678 pinctrl_ddcclk_default: ddcclk_default {
683 pinctrl_ddcdat_default: ddcdat_default {
688 pinctrl_extrst_default: extrst_default {
693 pinctrl_flack_default: flack_default {
698 pinctrl_flbusy_default: flbusy_default {
703 pinctrl_flwp_default: flwp_default {
708 pinctrl_gpid_default: gpid_default {
713 pinctrl_gpid0_default: gpid0_default {
718 pinctrl_gpid2_default: gpid2_default {
723 pinctrl_gpid4_default: gpid4_default {
728 pinctrl_gpid6_default: gpid6_default {
733 pinctrl_gpie0_default: gpie0_default {
738 pinctrl_gpie2_default: gpie2_default {
743 pinctrl_gpie4_default: gpie4_default {
748 pinctrl_gpie6_default: gpie6_default {
753 pinctrl_i2c10_default: i2c10_default {
758 pinctrl_i2c11_default: i2c11_default {
763 pinctrl_i2c12_default: i2c12_default {
768 pinctrl_i2c13_default: i2c13_default {
773 pinctrl_i2c14_default: i2c14_default {
778 pinctrl_i2c3_default: i2c3_default {
783 pinctrl_i2c4_default: i2c4_default {
788 pinctrl_i2c5_default: i2c5_default {
793 pinctrl_i2c6_default: i2c6_default {
798 pinctrl_i2c7_default: i2c7_default {
803 pinctrl_i2c8_default: i2c8_default {
808 pinctrl_i2c9_default: i2c9_default {
813 pinctrl_lpcpd_default: lpcpd_default {
818 pinctrl_lpcpme_default: lpcpme_default {
823 pinctrl_lpcrst_default: lpcrst_default {
828 pinctrl_lpcsmi_default: lpcsmi_default {
833 pinctrl_mac1link_default: mac1link_default {
834 function = "MAC1LINK";
838 pinctrl_mac2link_default: mac2link_default {
839 function = "MAC2LINK";
843 pinctrl_mdio1_default: mdio1_default {
848 pinctrl_mdio2_default: mdio2_default {
853 pinctrl_ncts1_default: ncts1_default {
858 pinctrl_ncts2_default: ncts2_default {
863 pinctrl_ncts3_default: ncts3_default {
868 pinctrl_ncts4_default: ncts4_default {
873 pinctrl_ndcd1_default: ndcd1_default {
878 pinctrl_ndcd2_default: ndcd2_default {
883 pinctrl_ndcd3_default: ndcd3_default {
888 pinctrl_ndcd4_default: ndcd4_default {
893 pinctrl_ndsr1_default: ndsr1_default {
898 pinctrl_ndsr2_default: ndsr2_default {
903 pinctrl_ndsr3_default: ndsr3_default {
908 pinctrl_ndsr4_default: ndsr4_default {
913 pinctrl_ndtr1_default: ndtr1_default {
918 pinctrl_ndtr2_default: ndtr2_default {
923 pinctrl_ndtr3_default: ndtr3_default {
928 pinctrl_ndtr4_default: ndtr4_default {
933 pinctrl_ndts4_default: ndts4_default {
938 pinctrl_nri1_default: nri1_default {
943 pinctrl_nri2_default: nri2_default {
948 pinctrl_nri3_default: nri3_default {
953 pinctrl_nri4_default: nri4_default {
958 pinctrl_nrts1_default: nrts1_default {
963 pinctrl_nrts2_default: nrts2_default {
968 pinctrl_nrts3_default: nrts3_default {
973 pinctrl_oscclk_default: oscclk_default {
978 pinctrl_pwm0_default: pwm0_default {
983 pinctrl_pwm1_default: pwm1_default {
988 pinctrl_pwm2_default: pwm2_default {
993 pinctrl_pwm3_default: pwm3_default {
998 pinctrl_pwm4_default: pwm4_default {
1003 pinctrl_pwm5_default: pwm5_default {
1008 pinctrl_pwm6_default: pwm6_default {
1013 pinctrl_pwm7_default: pwm7_default {
1018 pinctrl_rgmii1_default: rgmii1_default {
1019 function = "RGMII1";
1023 pinctrl_rgmii2_default: rgmii2_default {
1024 function = "RGMII2";
1028 pinctrl_rmii1_default: rmii1_default {
1033 pinctrl_rmii2_default: rmii2_default {
1038 pinctrl_rom16_default: rom16_default {
1043 pinctrl_rom8_default: rom8_default {
1048 pinctrl_romcs1_default: romcs1_default {
1049 function = "ROMCS1";
1053 pinctrl_romcs2_default: romcs2_default {
1054 function = "ROMCS2";
1058 pinctrl_romcs3_default: romcs3_default {
1059 function = "ROMCS3";
1063 pinctrl_romcs4_default: romcs4_default {
1064 function = "ROMCS4";
1068 pinctrl_rxd1_default: rxd1_default {
1073 pinctrl_rxd2_default: rxd2_default {
1078 pinctrl_rxd3_default: rxd3_default {
1083 pinctrl_rxd4_default: rxd4_default {
1088 pinctrl_salt1_default: salt1_default {
1093 pinctrl_salt2_default: salt2_default {
1098 pinctrl_salt3_default: salt3_default {
1103 pinctrl_salt4_default: salt4_default {
1108 pinctrl_sd1_default: sd1_default {
1113 pinctrl_sd2_default: sd2_default {
1118 pinctrl_sgpmck_default: sgpmck_default {
1119 function = "SGPMCK";
1123 pinctrl_sgpmi_default: sgpmi_default {
1128 pinctrl_sgpmld_default: sgpmld_default {
1129 function = "SGPMLD";
1133 pinctrl_sgpmo_default: sgpmo_default {
1138 pinctrl_sgpsck_default: sgpsck_default {
1139 function = "SGPSCK";
1143 pinctrl_sgpsi0_default: sgpsi0_default {
1144 function = "SGPSI0";
1148 pinctrl_sgpsi1_default: sgpsi1_default {
1149 function = "SGPSI1";
1153 pinctrl_sgpsld_default: sgpsld_default {
1154 function = "SGPSLD";
1158 pinctrl_sioonctrl_default: sioonctrl_default {
1159 function = "SIOONCTRL";
1160 groups = "SIOONCTRL";
1163 pinctrl_siopbi_default: siopbi_default {
1164 function = "SIOPBI";
1168 pinctrl_siopbo_default: siopbo_default {
1169 function = "SIOPBO";
1173 pinctrl_siopwreq_default: siopwreq_default {
1174 function = "SIOPWREQ";
1175 groups = "SIOPWREQ";
1178 pinctrl_siopwrgd_default: siopwrgd_default {
1179 function = "SIOPWRGD";
1180 groups = "SIOPWRGD";
1183 pinctrl_sios3_default: sios3_default {
1188 pinctrl_sios5_default: sios5_default {
1193 pinctrl_siosci_default: siosci_default {
1194 function = "SIOSCI";
1198 pinctrl_spi1_default: spi1_default {
1203 pinctrl_spi1debug_default: spi1debug_default {
1204 function = "SPI1DEBUG";
1205 groups = "SPI1DEBUG";
1208 pinctrl_spi1passthru_default: spi1passthru_default {
1209 function = "SPI1PASSTHRU";
1210 groups = "SPI1PASSTHRU";
1213 pinctrl_spics1_default: spics1_default {
1214 function = "SPICS1";
1218 pinctrl_timer3_default: timer3_default {
1219 function = "TIMER3";
1223 pinctrl_timer4_default: timer4_default {
1224 function = "TIMER4";
1228 pinctrl_timer5_default: timer5_default {
1229 function = "TIMER5";
1233 pinctrl_timer6_default: timer6_default {
1234 function = "TIMER6";
1238 pinctrl_timer7_default: timer7_default {
1239 function = "TIMER7";
1243 pinctrl_timer8_default: timer8_default {
1244 function = "TIMER8";
1248 pinctrl_txd1_default: txd1_default {
1253 pinctrl_txd2_default: txd2_default {
1258 pinctrl_txd3_default: txd3_default {
1263 pinctrl_txd4_default: txd4_default {
1268 pinctrl_uart6_default: uart6_default {
1273 pinctrl_usbcki_default: usbcki_default {
1274 function = "USBCKI";
1278 pinctrl_usb2h_default: usb2h_default {
1279 function = "USB2H1";
1283 pinctrl_usb2d_default: usb2d_default {
1284 function = "USB2D1";
1288 pinctrl_vgabios_rom_default: vgabios_rom_default {
1289 function = "VGABIOS_ROM";
1290 groups = "VGABIOS_ROM";
1293 pinctrl_vgahs_default: vgahs_default {
1298 pinctrl_vgavs_default: vgavs_default {
1303 pinctrl_vpi18_default: vpi18_default {
1308 pinctrl_vpi24_default: vpi24_default {
1313 pinctrl_vpi30_default: vpi30_default {
1318 pinctrl_vpo12_default: vpo12_default {
1323 pinctrl_vpo24_default: vpo24_default {
1328 pinctrl_wdtrst1_default: wdtrst1_default {
1329 function = "WDTRST1";
1333 pinctrl_wdtrst2_default: wdtrst2_default {
1334 function = "WDTRST2";