sys/gnu/dts/arm/aspeed-g5.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 #include <dt-bindings/clock/aspeed-clock.h>
   3
   4 / {
   5         model = "Aspeed BMC";
   6         compatible = "aspeed,ast2500";
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         interrupt-parent = <&vic>;
  10
  11         aliases {
  12                 i2c0 = &i2c0;
  13                 i2c1 = &i2c1;
  14                 i2c2 = &i2c2;
  15                 i2c3 = &i2c3;
  16                 i2c4 = &i2c4;
  17                 i2c5 = &i2c5;
  18                 i2c6 = &i2c6;
  19                 i2c7 = &i2c7;
  20                 i2c8 = &i2c8;
  21                 i2c9 = &i2c9;
  22                 i2c10 = &i2c10;
  23                 i2c11 = &i2c11;
  24                 i2c12 = &i2c12;
  25                 i2c13 = &i2c13;
  26                 serial0 = &uart1;
  27                 serial1 = &uart2;
  28                 serial2 = &uart3;
  29                 serial3 = &uart4;
  30                 serial4 = &uart5;
  31                 serial5 = &vuart;
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 cpu@0 {
  39                         compatible = "arm,arm1176jzf-s";
  40                         device_type = "cpu";
  41                         reg = <0>;
  42                 };
  43         };
  44
  45         memory@80000000 {
  46                 device_type = "memory";
  47                 reg = <0x80000000 0>;
  48         };
  49
  50         ahb {
  51                 compatible = "simple-bus";
  52                 #address-cells = <1>;
  53                 #size-cells = <1>;
  54                 ranges;
  55
  56                 fmc: spi@1e620000 {
  57                         reg = < 0x1e620000 0xc4
  58                                 0x20000000 0x10000000 >;
  59                         #address-cells = <1>;
  60                         #size-cells = <0>;
  61                         compatible = "aspeed,ast2500-fmc";
  62                         clocks = <&syscon ASPEED_CLK_AHB>;
  63                         status = "disabled";
  64                         interrupts = <19>;
  65                         flash@0 {
  66                                 reg = < 0 >;
  67                                 compatible = "jedec,spi-nor";
  68                                 spi-max-frequency = <50000000>;
  69                                 status = "disabled";
  70                         };
  71                         flash@1 {
  72                                 reg = < 1 >;
  73                                 compatible = "jedec,spi-nor";
  74                                 spi-max-frequency = <50000000>;
  75                                 status = "disabled";
  76                         };
  77                         flash@2 {
  78                                 reg = < 2 >;
  79                                 compatible = "jedec,spi-nor";
  80                                 spi-max-frequency = <50000000>;
  81                                 status = "disabled";
  82                         };
  83                 };
  84
  85                 spi1: spi@1e630000 {
  86                         reg = < 0x1e630000 0xc4
  87                                 0x30000000 0x08000000 >;
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                         compatible = "aspeed,ast2500-spi";
  91                         clocks = <&syscon ASPEED_CLK_AHB>;
  92                         status = "disabled";
  93                         flash@0 {
  94                                 reg = < 0 >;
  95                                 compatible = "jedec,spi-nor";
  96                                 spi-max-frequency = <50000000>;
  97                                 status = "disabled";
  98                         };
  99                         flash@1 {
 100                                 reg = < 1 >;
 101                                 compatible = "jedec,spi-nor";
 102                                 spi-max-frequency = <50000000>;
 103                                 status = "disabled";
 104                         };
 105                 };
 106
 107                 spi2: spi@1e631000 {
 108                         reg = < 0x1e631000 0xc4
 109                                 0x38000000 0x08000000 >;
 110                         #address-cells = <1>;
 111                         #size-cells = <0>;
 112                         compatible = "aspeed,ast2500-spi";
 113                         clocks = <&syscon ASPEED_CLK_AHB>;
 114                         status = "disabled";
 115                         flash@0 {
 116                                 reg = < 0 >;
 117                                 compatible = "jedec,spi-nor";
 118                                 spi-max-frequency = <50000000>;
 119                                 status = "disabled";
 120                         };
 121                         flash@1 {
 122                                 reg = < 1 >;
 123                                 compatible = "jedec,spi-nor";
 124                                 spi-max-frequency = <50000000>;
 125                                 status = "disabled";
 126                         };
 127                 };
 128
 129                 vic: interrupt-controller@1e6c0080 {
 130                         compatible = "aspeed,ast2400-vic";
 131                         interrupt-controller;
 132                         #interrupt-cells = <1>;
 133                         valid-sources = <0xfefff7ff 0x0807ffff>;
 134                         reg = <0x1e6c0080 0x80>;
 135                 };
 136
 137                 cvic: copro-interrupt-controller@1e6c2000 {
 138                         compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
 139                         valid-sources = <0xffffffff>;
 140                         copro-sw-interrupts = <1>;
 141                         reg = <0x1e6c2000 0x80>;
 142                 };
 143
 144                 mac0: ethernet@1e660000 {
 145                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 146                         reg = <0x1e660000 0x180>;
 147                         interrupts = <2>;
 148                         clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
 149                         status = "disabled";
 150                 };
 151
 152                 mac1: ethernet@1e680000 {
 153                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 154                         reg = <0x1e680000 0x180>;
 155                         interrupts = <3>;
 156                         clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
 157                         status = "disabled";
 158                 };
 159
 160                 ehci0: usb@1e6a1000 {
 161                         compatible = "aspeed,ast2500-ehci", "generic-ehci";
 162                         reg = <0x1e6a1000 0x100>;
 163                         interrupts = <5>;
 164                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
 165                         pinctrl-names = "default";
 166                         pinctrl-0 = <&pinctrl_usb2ah_default>;
 167                         status = "disabled";
 168                 };
 169
 170                 ehci1: usb@1e6a3000 {
 171                         compatible = "aspeed,ast2500-ehci", "generic-ehci";
 172                         reg = <0x1e6a3000 0x100>;
 173                         interrupts = <13>;
 174                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
 175                         pinctrl-names = "default";
 176                         pinctrl-0 = <&pinctrl_usb2bh_default>;
 177                         status = "disabled";
 178                 };
 179
 180                 uhci: usb@1e6b0000 {
 181                         compatible = "aspeed,ast2500-uhci", "generic-uhci";
 182                         reg = <0x1e6b0000 0x100>;
 183                         interrupts = <14>;
 184                         #ports = <2>;
 185                         clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
 186                         status = "disabled";
 187                         /*
 188                          * No default pinmux, it will follow EHCI, use an explicit pinmux
 189                          * override if you don't enable EHCI
 190                          */
 191                 };
 192
 193                 vhub: usb-vhub@1e6a0000 {
 194                         compatible = "aspeed,ast2500-usb-vhub";
 195                         reg = <0x1e6a0000 0x300>;
 196                         interrupts = <5>;
 197                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
 198                         pinctrl-names = "default";
 199                         pinctrl-0 = <&pinctrl_usb2ad_default>;
 200                         status = "disabled";
 201                 };
 202
 203                 apb {
 204                         compatible = "simple-bus";
 205                         #address-cells = <1>;
 206                         #size-cells = <1>;
 207                         ranges;
 208
 209                         edac: memory-controller@1e6e0000 {
 210                                 compatible = "aspeed,ast2500-sdram-edac";
 211                                 reg = <0x1e6e0000 0x174>;
 212                                 interrupts = <0>;
 213                                 status = "disabled";
 214                         };
 215
 216                         syscon: syscon@1e6e2000 {
 217                                 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
 218                                 reg = <0x1e6e2000 0x1a8>;
 219                                 #address-cells = <1>;
 220                                 #size-cells = <1>;
 221                                 ranges = <0 0x1e6e2000 0x1000>;
 222                                 #clock-cells = <1>;
 223                                 #reset-cells = <1>;
 224
 225                                 p2a: p2a-control@2c {
 226                                         compatible = "aspeed,ast2500-p2a-ctrl";
 227                                         reg = <0x2c 0x4>;
 228                                         status = "disabled";
 229                                 };
 230
 231                                 pinctrl: pinctrl@80 {
 232                                         compatible = "aspeed,ast2500-pinctrl";
 233                                         reg = <0x80 0x18>, <0xa0 0x10>;
 234                                         aspeed,external-nodes = <&gfx>, <&lhc>;
 235                                 };
 236                         };
 237
 238                         rng: hwrng@1e6e2078 {
 239                                 compatible = "timeriomem_rng";
 240                                 reg = <0x1e6e2078 0x4>;
 241                                 period = <1>;
 242                                 quality = <100>;
 243                         };
 244
 245                         gfx: display@1e6e6000 {
 246                                 compatible = "aspeed,ast2500-gfx", "syscon";
 247                                 reg = <0x1e6e6000 0x1000>;
 248                                 reg-io-width = <4>;
 249                                 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
 250                                 resets = <&syscon ASPEED_RESET_CRT1>;
 251                                 status = "disabled";
 252                                 interrupts = <0x19>;
 253                         };
 254
 255                         adc: adc@1e6e9000 {
 256                                 compatible = "aspeed,ast2500-adc";
 257                                 reg = <0x1e6e9000 0xb0>;
 258                                 clocks = <&syscon ASPEED_CLK_APB>;
 259                                 resets = <&syscon ASPEED_RESET_ADC>;
 260                                 #io-channel-cells = <1>;
 261                                 status = "disabled";
 262                         };
 263
 264                         video: video@1e700000 {
 265                                 compatible = "aspeed,ast2500-video-engine";
 266                                 reg = <0x1e700000 0x1000>;
 267                                 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
 268                                          <&syscon ASPEED_CLK_GATE_ECLK>;
 269                                 clock-names = "vclk", "eclk";
 270                                 interrupts = <7>;
 271                                 status = "disabled";
 272                         };
 273
 274                         sram: sram@1e720000 {
 275                                 compatible = "mmio-sram";
 276                                 reg = <0x1e720000 0x9000>;      // 36K
 277                         };
 278
 279                         sdmmc: sd-controller@1e740000 {
 280                                 compatible = "aspeed,ast2500-sd-controller";
 281                                 reg = <0x1e740000 0x100>;
 282                                 #address-cells = <1>;
 283                                 #size-cells = <1>;
 284                                 ranges = <0 0x1e740000 0x10000>;
 285                                 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
 286                                 status = "disabled";
 287
 288                                 sdhci0: sdhci@100 {
 289                                         compatible = "aspeed,ast2500-sdhci";
 290                                         reg = <0x100 0x100>;
 291                                         interrupts = <26>;
 292                                         sdhci,auto-cmd12;
 293                                         clocks = <&syscon ASPEED_CLK_SDIO>;
 294                                         status = "disabled";
 295                                 };
 296
 297                                 sdhci1: sdhci@200 {
 298                                         compatible = "aspeed,ast2500-sdhci";
 299                                         reg = <0x200 0x100>;
 300                                         interrupts = <26>;
 301                                         sdhci,auto-cmd12;
 302                                         clocks = <&syscon ASPEED_CLK_SDIO>;
 303                                         status = "disabled";
 304                                 };
 305                         };
 306
 307                         gpio: gpio@1e780000 {
 308                                 #gpio-cells = <2>;
 309                                 gpio-controller;
 310                                 compatible = "aspeed,ast2500-gpio";
 311                                 reg = <0x1e780000 0x200>;
 312                                 interrupts = <20>;
 313                                 gpio-ranges = <&pinctrl 0 0 232>;
 314                                 clocks = <&syscon ASPEED_CLK_APB>;
 315                                 interrupt-controller;
 316                                 #interrupt-cells = <2>;
 317                         };
 318
 319                         sgpio: sgpio@1e780200 {
 320                                 #gpio-cells = <2>;
 321                                 compatible = "aspeed,ast2500-sgpio";
 322                                 gpio-controller;
 323                                 interrupts = <40>;
 324                                 reg = <0x1e780200 0x0100>;
 325                                 clocks = <&syscon ASPEED_CLK_APB>;
 326                                 interrupt-controller;
 327                                 ngpios = <8>;
 328                                 bus-frequency = <12000000>;
 329                                 pinctrl-names = "default";
 330                                 pinctrl-0 = <&pinctrl_sgpm_default>;
 331                                 status = "disabled";
 332                         };
 333
 334                         rtc: rtc@1e781000 {
 335                                 compatible = "aspeed,ast2500-rtc";
 336                                 reg = <0x1e781000 0x18>;
 337                                 status = "disabled";
 338                         };
 339
 340                         timer: timer@1e782000 {
 341                                 /* This timer is a Faraday FTTMR010 derivative */
 342                                 compatible = "aspeed,ast2400-timer";
 343                                 reg = <0x1e782000 0x90>;
 344                                 interrupts = <16 17 18 35 36 37 38 39>;
 345                                 clocks = <&syscon ASPEED_CLK_APB>;
 346                                 clock-names = "PCLK";
 347                         };
 348
 349                         uart1: serial@1e783000 {
 350                                 compatible = "ns16550a";
 351                                 reg = <0x1e783000 0x20>;
 352                                 reg-shift = <2>;
 353                                 interrupts = <9>;
 354                                 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
 355                                 resets = <&lpc_reset 4>;
 356                                 no-loopback-test;
 357                                 status = "disabled";
 358                         };
 359
 360                         uart5: serial@1e784000 {
 361                                 compatible = "ns16550a";
 362                                 reg = <0x1e784000 0x20>;
 363                                 reg-shift = <2>;
 364                                 interrupts = <10>;
 365                                 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
 366                                 no-loopback-test;
 367                                 status = "disabled";
 368                         };
 369
 370                         wdt1: watchdog@1e785000 {
 371                                 compatible = "aspeed,ast2500-wdt";
 372                                 reg = <0x1e785000 0x20>;
 373                                 clocks = <&syscon ASPEED_CLK_APB>;
 374                         };
 375
 376                         wdt2: watchdog@1e785020 {
 377                                 compatible = "aspeed,ast2500-wdt";
 378                                 reg = <0x1e785020 0x20>;
 379                                 clocks = <&syscon ASPEED_CLK_APB>;
 380                         };
 381
 382                         wdt3: watchdog@1e785040 {
 383                                 compatible = "aspeed,ast2500-wdt";
 384                                 reg = <0x1e785040 0x20>;
 385                                 clocks = <&syscon ASPEED_CLK_APB>;
 386                                 status = "disabled";
 387                         };
 388
 389                         pwm_tacho: pwm-tacho-controller@1e786000 {
 390                                 compatible = "aspeed,ast2500-pwm-tacho";
 391                                 #address-cells = <1>;
 392                                 #size-cells = <0>;
 393                                 reg = <0x1e786000 0x1000>;
 394                                 clocks = <&syscon ASPEED_CLK_24M>;
 395                                 resets = <&syscon ASPEED_RESET_PWM>;
 396                                 status = "disabled";
 397                         };
 398
 399                         vuart: serial@1e787000 {
 400                                 compatible = "aspeed,ast2500-vuart";
 401                                 reg = <0x1e787000 0x40>;
 402                                 reg-shift = <2>;
 403                                 interrupts = <8>;
 404                                 clocks = <&syscon ASPEED_CLK_APB>;
 405                                 no-loopback-test;
 406                                 aspeed,sirq-polarity-sense = <&syscon 0x70 25>;
 407                                 status = "disabled";
 408                         };
 409
 410                         lpc: lpc@1e789000 {
 411                                 compatible = "aspeed,ast2500-lpc", "simple-mfd";
 412                                 reg = <0x1e789000 0x1000>;
 413
 414                                 #address-cells = <1>;
 415                                 #size-cells = <1>;
 416                                 ranges = <0x0 0x1e789000 0x1000>;
 417
 418                                 lpc_bmc: lpc-bmc@0 {
 419                                         compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
 420                                         reg = <0x0 0x80>;
 421                                         reg-io-width = <4>;
 422
 423                                         #address-cells = <1>;
 424                                         #size-cells = <1>;
 425                                         ranges = <0x0 0x0 0x80>;
 426
 427                                         kcs1: kcs1@0 {
 428                                                 compatible = "aspeed,ast2500-kcs-bmc";
 429                                                 interrupts = <8>;
 430                                                 kcs_chan = <1>;
 431                                                 status = "disabled";
 432                                         };
 433                                         kcs2: kcs2@0 {
 434                                                 compatible = "aspeed,ast2500-kcs-bmc";
 435                                                 interrupts = <8>;
 436                                                 kcs_chan = <2>;
 437                                                 status = "disabled";
 438                                         };
 439                                         kcs3: kcs3@0 {
 440                                                 compatible = "aspeed,ast2500-kcs-bmc";
 441                                                 interrupts = <8>;
 442                                                 kcs_chan = <3>;
 443                                                 status = "disabled";
 444                                         };
 445                                 };
 446
 447                                 lpc_host: lpc-host@80 {
 448                                         compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
 449                                         reg = <0x80 0x1e0>;
 450                                         reg-io-width = <4>;
 451
 452                                         #address-cells = <1>;
 453                                         #size-cells = <1>;
 454                                         ranges = <0x0 0x80 0x1e0>;
 455
 456                                         kcs4: kcs4@0 {
 457                                                 compatible = "aspeed,ast2500-kcs-bmc";
 458                                                 interrupts = <8>;
 459                                                 kcs_chan = <4>;
 460                                                 status = "disabled";
 461                                         };
 462
 463                                         lpc_ctrl: lpc-ctrl@0 {
 464                                                 compatible = "aspeed,ast2500-lpc-ctrl";
 465                                                 reg = <0x0 0x10>;
 466                                                 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
 467                                                 status = "disabled";
 468                                         };
 469
 470                                         lpc_snoop: lpc-snoop@10 {
 471                                                 compatible = "aspeed,ast2500-lpc-snoop";
 472                                                 reg = <0x10 0x8>;
 473                                                 interrupts = <8>;
 474                                                 status = "disabled";
 475                                         };
 476
 477                                         lpc_reset: reset-controller@18 {
 478                                                 compatible = "aspeed,ast2500-lpc-reset";
 479                                                 reg = <0x18 0x4>;
 480                                                 #reset-cells = <1>;
 481                                         };
 482
 483                                         lhc: lhc@20 {
 484                                                 compatible = "aspeed,ast2500-lhc";
 485                                                 reg = <0x20 0x24 0x48 0x8>;
 486                                         };
 487
 488
 489                                         ibt: ibt@c0 {
 490                                                 compatible = "aspeed,ast2500-ibt-bmc";
 491                                                 reg = <0xc0 0x18>;
 492                                                 interrupts = <8>;
 493                                                 status = "disabled";
 494                                         };
 495                                 };
 496                         };
 497
 498                         uart2: serial@1e78d000 {
 499                                 compatible = "ns16550a";
 500                                 reg = <0x1e78d000 0x20>;
 501                                 reg-shift = <2>;
 502                                 interrupts = <32>;
 503                                 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
 504                                 resets = <&lpc_reset 5>;
 505                                 no-loopback-test;
 506                                 status = "disabled";
 507                         };
 508
 509                         uart3: serial@1e78e000 {
 510                                 compatible = "ns16550a";
 511                                 reg = <0x1e78e000 0x20>;
 512                                 reg-shift = <2>;
 513                                 interrupts = <33>;
 514                                 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
 515                                 resets = <&lpc_reset 6>;
 516                                 no-loopback-test;
 517                                 status = "disabled";
 518                         };
 519
 520                         uart4: serial@1e78f000 {
 521                                 compatible = "ns16550a";
 522                                 reg = <0x1e78f000 0x20>;
 523                                 reg-shift = <2>;
 524                                 interrupts = <34>;
 525                                 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
 526                                 resets = <&lpc_reset 7>;
 527                                 no-loopback-test;
 528                                 status = "disabled";
 529                         };
 530
 531                         i2c: bus@1e78a000 {
 532                                 compatible = "simple-bus";
 533                                 #address-cells = <1>;
 534                                 #size-cells = <1>;
 535                                 ranges = <0 0x1e78a000 0x1000>;
 536                         };
 537                 };
 538         };
 539 };
 540
 541 &i2c {
 542         i2c_ic: interrupt-controller@0 {
 543                 #interrupt-cells = <1>;
 544                 compatible = "aspeed,ast2500-i2c-ic";
 545                 reg = <0x0 0x40>;
 546                 interrupts = <12>;
 547                 interrupt-controller;
 548         };
 549
 550         i2c0: i2c-bus@40 {
 551                 #address-cells = <1>;
 552                 #size-cells = <0>;
 553                 #interrupt-cells = <1>;
 554
 555                 reg = <0x40 0x40>;
 556                 compatible = "aspeed,ast2500-i2c-bus";
 557                 clocks = <&syscon ASPEED_CLK_APB>;
 558                 resets = <&syscon ASPEED_RESET_I2C>;
 559                 bus-frequency = <100000>;
 560                 interrupts = <0>;
 561                 interrupt-parent = <&i2c_ic>;
 562                 status = "disabled";
 563                 /* Does not need pinctrl properties */
 564         };
 565
 566         i2c1: i2c-bus@80 {
 567                 #address-cells = <1>;
 568                 #size-cells = <0>;
 569                 #interrupt-cells = <1>;
 570
 571                 reg = <0x80 0x40>;
 572                 compatible = "aspeed,ast2500-i2c-bus";
 573                 clocks = <&syscon ASPEED_CLK_APB>;
 574                 resets = <&syscon ASPEED_RESET_I2C>;
 575                 bus-frequency = <100000>;
 576                 interrupts = <1>;
 577                 interrupt-parent = <&i2c_ic>;
 578                 status = "disabled";
 579                 /* Does not need pinctrl properties */
 580         };
 581
 582         i2c2: i2c-bus@c0 {
 583                 #address-cells = <1>;
 584                 #size-cells = <0>;
 585                 #interrupt-cells = <1>;
 586
 587                 reg = <0xc0 0x40>;
 588                 compatible = "aspeed,ast2500-i2c-bus";
 589                 clocks = <&syscon ASPEED_CLK_APB>;
 590                 resets = <&syscon ASPEED_RESET_I2C>;
 591                 bus-frequency = <100000>;
 592                 interrupts = <2>;
 593                 interrupt-parent = <&i2c_ic>;
 594                 pinctrl-names = "default";
 595                 pinctrl-0 = <&pinctrl_i2c3_default>;
 596                 status = "disabled";
 597         };
 598
 599         i2c3: i2c-bus@100 {
 600                 #address-cells = <1>;
 601                 #size-cells = <0>;
 602                 #interrupt-cells = <1>;
 603
 604                 reg = <0x100 0x40>;
 605                 compatible = "aspeed,ast2500-i2c-bus";
 606                 clocks = <&syscon ASPEED_CLK_APB>;
 607                 resets = <&syscon ASPEED_RESET_I2C>;
 608                 bus-frequency = <100000>;
 609                 interrupts = <3>;
 610                 interrupt-parent = <&i2c_ic>;
 611                 pinctrl-names = "default";
 612                 pinctrl-0 = <&pinctrl_i2c4_default>;
 613                 status = "disabled";
 614         };
 615
 616         i2c4: i2c-bus@140 {
 617                 #address-cells = <1>;
 618                 #size-cells = <0>;
 619                 #interrupt-cells = <1>;
 620
 621                 reg = <0x140 0x40>;
 622                 compatible = "aspeed,ast2500-i2c-bus";
 623                 clocks = <&syscon ASPEED_CLK_APB>;
 624                 resets = <&syscon ASPEED_RESET_I2C>;
 625                 bus-frequency = <100000>;
 626                 interrupts = <4>;
 627                 interrupt-parent = <&i2c_ic>;
 628                 pinctrl-names = "default";
 629                 pinctrl-0 = <&pinctrl_i2c5_default>;
 630                 status = "disabled";
 631         };
 632
 633         i2c5: i2c-bus@180 {
 634                 #address-cells = <1>;
 635                 #size-cells = <0>;
 636                 #interrupt-cells = <1>;
 637
 638                 reg = <0x180 0x40>;
 639                 compatible = "aspeed,ast2500-i2c-bus";
 640                 clocks = <&syscon ASPEED_CLK_APB>;
 641                 resets = <&syscon ASPEED_RESET_I2C>;
 642                 bus-frequency = <100000>;
 643                 interrupts = <5>;
 644                 interrupt-parent = <&i2c_ic>;
 645                 pinctrl-names = "default";
 646                 pinctrl-0 = <&pinctrl_i2c6_default>;
 647                 status = "disabled";
 648         };
 649
 650         i2c6: i2c-bus@1c0 {
 651                 #address-cells = <1>;
 652                 #size-cells = <0>;
 653                 #interrupt-cells = <1>;
 654
 655                 reg = <0x1c0 0x40>;
 656                 compatible = "aspeed,ast2500-i2c-bus";
 657                 clocks = <&syscon ASPEED_CLK_APB>;
 658                 resets = <&syscon ASPEED_RESET_I2C>;
 659                 bus-frequency = <100000>;
 660                 interrupts = <6>;
 661                 interrupt-parent = <&i2c_ic>;
 662                 pinctrl-names = "default";
 663                 pinctrl-0 = <&pinctrl_i2c7_default>;
 664                 status = "disabled";
 665         };
 666
 667         i2c7: i2c-bus@300 {
 668                 #address-cells = <1>;
 669                 #size-cells = <0>;
 670                 #interrupt-cells = <1>;
 671
 672                 reg = <0x300 0x40>;
 673                 compatible = "aspeed,ast2500-i2c-bus";
 674                 clocks = <&syscon ASPEED_CLK_APB>;
 675                 resets = <&syscon ASPEED_RESET_I2C>;
 676                 bus-frequency = <100000>;
 677                 interrupts = <7>;
 678                 interrupt-parent = <&i2c_ic>;
 679                 pinctrl-names = "default";
 680                 pinctrl-0 = <&pinctrl_i2c8_default>;
 681                 status = "disabled";
 682         };
 683
 684         i2c8: i2c-bus@340 {
 685                 #address-cells = <1>;
 686                 #size-cells = <0>;
 687                 #interrupt-cells = <1>;
 688
 689                 reg = <0x340 0x40>;
 690                 compatible = "aspeed,ast2500-i2c-bus";
 691                 clocks = <&syscon ASPEED_CLK_APB>;
 692                 resets = <&syscon ASPEED_RESET_I2C>;
 693                 bus-frequency = <100000>;
 694                 interrupts = <8>;
 695                 interrupt-parent = <&i2c_ic>;
 696                 pinctrl-names = "default";
 697                 pinctrl-0 = <&pinctrl_i2c9_default>;
 698                 status = "disabled";
 699         };
 700
 701         i2c9: i2c-bus@380 {
 702                 #address-cells = <1>;
 703                 #size-cells = <0>;
 704                 #interrupt-cells = <1>;
 705
 706                 reg = <0x380 0x40>;
 707                 compatible = "aspeed,ast2500-i2c-bus";
 708                 clocks = <&syscon ASPEED_CLK_APB>;
 709                 resets = <&syscon ASPEED_RESET_I2C>;
 710                 bus-frequency = <100000>;
 711                 interrupts = <9>;
 712                 interrupt-parent = <&i2c_ic>;
 713                 pinctrl-names = "default";
 714                 pinctrl-0 = <&pinctrl_i2c10_default>;
 715                 status = "disabled";
 716         };
 717
 718         i2c10: i2c-bus@3c0 {
 719                 #address-cells = <1>;
 720                 #size-cells = <0>;
 721                 #interrupt-cells = <1>;
 722
 723                 reg = <0x3c0 0x40>;
 724                 compatible = "aspeed,ast2500-i2c-bus";
 725                 clocks = <&syscon ASPEED_CLK_APB>;
 726                 resets = <&syscon ASPEED_RESET_I2C>;
 727                 bus-frequency = <100000>;
 728                 interrupts = <10>;
 729                 interrupt-parent = <&i2c_ic>;
 730                 pinctrl-names = "default";
 731                 pinctrl-0 = <&pinctrl_i2c11_default>;
 732                 status = "disabled";
 733         };
 734
 735         i2c11: i2c-bus@400 {
 736                 #address-cells = <1>;
 737                 #size-cells = <0>;
 738                 #interrupt-cells = <1>;
 739
 740                 reg = <0x400 0x40>;
 741                 compatible = "aspeed,ast2500-i2c-bus";
 742                 clocks = <&syscon ASPEED_CLK_APB>;
 743                 resets = <&syscon ASPEED_RESET_I2C>;
 744                 bus-frequency = <100000>;
 745                 interrupts = <11>;
 746                 interrupt-parent = <&i2c_ic>;
 747                 pinctrl-names = "default";
 748                 pinctrl-0 = <&pinctrl_i2c12_default>;
 749                 status = "disabled";
 750         };
 751
 752         i2c12: i2c-bus@440 {
 753                 #address-cells = <1>;
 754                 #size-cells = <0>;
 755                 #interrupt-cells = <1>;
 756
 757                 reg = <0x440 0x40>;
 758                 compatible = "aspeed,ast2500-i2c-bus";
 759                 clocks = <&syscon ASPEED_CLK_APB>;
 760                 resets = <&syscon ASPEED_RESET_I2C>;
 761                 bus-frequency = <100000>;
 762                 interrupts = <12>;
 763                 interrupt-parent = <&i2c_ic>;
 764                 pinctrl-names = "default";
 765                 pinctrl-0 = <&pinctrl_i2c13_default>;
 766                 status = "disabled";
 767         };
 768
 769         i2c13: i2c-bus@480 {
 770                 #address-cells = <1>;
 771                 #size-cells = <0>;
 772                 #interrupt-cells = <1>;
 773
 774                 reg = <0x480 0x40>;
 775                 compatible = "aspeed,ast2500-i2c-bus";
 776                 clocks = <&syscon ASPEED_CLK_APB>;
 777                 resets = <&syscon ASPEED_RESET_I2C>;
 778                 bus-frequency = <100000>;
 779                 interrupts = <13>;
 780                 interrupt-parent = <&i2c_ic>;
 781                 pinctrl-names = "default";
 782                 pinctrl-0 = <&pinctrl_i2c14_default>;
 783                 status = "disabled";
 784         };
 785 };
 786
 787 &pinctrl {
 788         pinctrl_acpi_default: acpi_default {
 789                 function = "ACPI";
 790                 groups = "ACPI";
 791         };
 792
 793         pinctrl_adc0_default: adc0_default {
 794                 function = "ADC0";
 795                 groups = "ADC0";
 796         };
 797
 798         pinctrl_adc1_default: adc1_default {
 799                 function = "ADC1";
 800                 groups = "ADC1";
 801         };
 802
 803         pinctrl_adc10_default: adc10_default {
 804                 function = "ADC10";
 805                 groups = "ADC10";
 806         };
 807
 808         pinctrl_adc11_default: adc11_default {
 809                 function = "ADC11";
 810                 groups = "ADC11";
 811         };
 812
 813         pinctrl_adc12_default: adc12_default {
 814                 function = "ADC12";
 815                 groups = "ADC12";
 816         };
 817
 818         pinctrl_adc13_default: adc13_default {
 819                 function = "ADC13";
 820                 groups = "ADC13";
 821         };
 822
 823         pinctrl_adc14_default: adc14_default {
 824                 function = "ADC14";
 825                 groups = "ADC14";
 826         };
 827
 828         pinctrl_adc15_default: adc15_default {
 829                 function = "ADC15";
 830                 groups = "ADC15";
 831         };
 832
 833         pinctrl_adc2_default: adc2_default {
 834                 function = "ADC2";
 835                 groups = "ADC2";
 836         };
 837
 838         pinctrl_adc3_default: adc3_default {
 839                 function = "ADC3";
 840                 groups = "ADC3";
 841         };
 842
 843         pinctrl_adc4_default: adc4_default {
 844                 function = "ADC4";
 845                 groups = "ADC4";
 846         };
 847
 848         pinctrl_adc5_default: adc5_default {
 849                 function = "ADC5";
 850                 groups = "ADC5";
 851         };
 852
 853         pinctrl_adc6_default: adc6_default {
 854                 function = "ADC6";
 855                 groups = "ADC6";
 856         };
 857
 858         pinctrl_adc7_default: adc7_default {
 859                 function = "ADC7";
 860                 groups = "ADC7";
 861         };
 862
 863         pinctrl_adc8_default: adc8_default {
 864                 function = "ADC8";
 865                 groups = "ADC8";
 866         };
 867
 868         pinctrl_adc9_default: adc9_default {
 869                 function = "ADC9";
 870                 groups = "ADC9";
 871         };
 872
 873         pinctrl_bmcint_default: bmcint_default {
 874                 function = "BMCINT";
 875                 groups = "BMCINT";
 876         };
 877
 878         pinctrl_ddcclk_default: ddcclk_default {
 879                 function = "DDCCLK";
 880                 groups = "DDCCLK";
 881         };
 882
 883         pinctrl_ddcdat_default: ddcdat_default {
 884                 function = "DDCDAT";
 885                 groups = "DDCDAT";
 886         };
 887
 888         pinctrl_espi_default: espi_default {
 889                 function = "ESPI";
 890                 groups = "ESPI";
 891         };
 892
 893         pinctrl_fwspics1_default: fwspics1_default {
 894                 function = "FWSPICS1";
 895                 groups = "FWSPICS1";
 896         };
 897
 898         pinctrl_fwspics2_default: fwspics2_default {
 899                 function = "FWSPICS2";
 900                 groups = "FWSPICS2";
 901         };
 902
 903         pinctrl_gpid0_default: gpid0_default {
 904                 function = "GPID0";
 905                 groups = "GPID0";
 906         };
 907
 908         pinctrl_gpid2_default: gpid2_default {
 909                 function = "GPID2";
 910                 groups = "GPID2";
 911         };
 912
 913         pinctrl_gpid4_default: gpid4_default {
 914                 function = "GPID4";
 915                 groups = "GPID4";
 916         };
 917
 918         pinctrl_gpid6_default: gpid6_default {
 919                 function = "GPID6";
 920                 groups = "GPID6";
 921         };
 922
 923         pinctrl_gpie0_default: gpie0_default {
 924                 function = "GPIE0";
 925                 groups = "GPIE0";
 926         };
 927
 928         pinctrl_gpie2_default: gpie2_default {
 929                 function = "GPIE2";
 930                 groups = "GPIE2";
 931         };
 932
 933         pinctrl_gpie4_default: gpie4_default {
 934                 function = "GPIE4";
 935                 groups = "GPIE4";
 936         };
 937
 938         pinctrl_gpie6_default: gpie6_default {
 939                 function = "GPIE6";
 940                 groups = "GPIE6";
 941         };
 942
 943         pinctrl_i2c10_default: i2c10_default {
 944                 function = "I2C10";
 945                 groups = "I2C10";
 946         };
 947
 948         pinctrl_i2c11_default: i2c11_default {
 949                 function = "I2C11";
 950                 groups = "I2C11";
 951         };
 952
 953         pinctrl_i2c12_default: i2c12_default {
 954                 function = "I2C12";
 955                 groups = "I2C12";
 956         };
 957
 958         pinctrl_i2c13_default: i2c13_default {
 959                 function = "I2C13";
 960                 groups = "I2C13";
 961         };
 962
 963         pinctrl_i2c14_default: i2c14_default {
 964                 function = "I2C14";
 965                 groups = "I2C14";
 966         };
 967
 968         pinctrl_i2c3_default: i2c3_default {
 969                 function = "I2C3";
 970                 groups = "I2C3";
 971         };
 972
 973         pinctrl_i2c4_default: i2c4_default {
 974                 function = "I2C4";
 975                 groups = "I2C4";
 976         };
 977
 978         pinctrl_i2c5_default: i2c5_default {
 979                 function = "I2C5";
 980                 groups = "I2C5";
 981         };
 982
 983         pinctrl_i2c6_default: i2c6_default {
 984                 function = "I2C6";
 985                 groups = "I2C6";
 986         };
 987
 988         pinctrl_i2c7_default: i2c7_default {
 989                 function = "I2C7";
 990                 groups = "I2C7";
 991         };
 992
 993         pinctrl_i2c8_default: i2c8_default {
 994                 function = "I2C8";
 995                 groups = "I2C8";
 996         };
 997
 998         pinctrl_i2c9_default: i2c9_default {
 999                 function = "I2C9";
1000                 groups = "I2C9";
1001         };
1002
1003         pinctrl_lad0_default: lad0_default {
1004                 function = "LAD0";
1005                 groups = "LAD0";
1006         };
1007
1008         pinctrl_lad1_default: lad1_default {
1009                 function = "LAD1";
1010                 groups = "LAD1";
1011         };
1012
1013         pinctrl_lad2_default: lad2_default {
1014                 function = "LAD2";
1015                 groups = "LAD2";
1016         };
1017
1018         pinctrl_lad3_default: lad3_default {
1019                 function = "LAD3";
1020                 groups = "LAD3";
1021         };
1022
1023         pinctrl_lclk_default: lclk_default {
1024                 function = "LCLK";
1025                 groups = "LCLK";
1026         };
1027
1028         pinctrl_lframe_default: lframe_default {
1029                 function = "LFRAME";
1030                 groups = "LFRAME";
1031         };
1032
1033         pinctrl_lpchc_default: lpchc_default {
1034                 function = "LPCHC";
1035                 groups = "LPCHC";
1036         };
1037
1038         pinctrl_lpcpd_default: lpcpd_default {
1039                 function = "LPCPD";
1040                 groups = "LPCPD";
1041         };
1042
1043         pinctrl_lpcplus_default: lpcplus_default {
1044                 function = "LPCPLUS";
1045                 groups = "LPCPLUS";
1046         };
1047
1048         pinctrl_lpcpme_default: lpcpme_default {
1049                 function = "LPCPME";
1050                 groups = "LPCPME";
1051         };
1052
1053         pinctrl_lpcrst_default: lpcrst_default {
1054                 function = "LPCRST";
1055                 groups = "LPCRST";
1056         };
1057
1058         pinctrl_lpcsmi_default: lpcsmi_default {
1059                 function = "LPCSMI";
1060                 groups = "LPCSMI";
1061         };
1062
1063         pinctrl_lsirq_default: lsirq_default {
1064                 function = "LSIRQ";
1065                 groups = "LSIRQ";
1066         };
1067
1068         pinctrl_mac1link_default: mac1link_default {
1069                 function = "MAC1LINK";
1070                 groups = "MAC1LINK";
1071         };
1072
1073         pinctrl_mac2link_default: mac2link_default {
1074                 function = "MAC2LINK";
1075                 groups = "MAC2LINK";
1076         };
1077
1078         pinctrl_mdio1_default: mdio1_default {
1079                 function = "MDIO1";
1080                 groups = "MDIO1";
1081         };
1082
1083         pinctrl_mdio2_default: mdio2_default {
1084                 function = "MDIO2";
1085                 groups = "MDIO2";
1086         };
1087
1088         pinctrl_ncts1_default: ncts1_default {
1089                 function = "NCTS1";
1090                 groups = "NCTS1";
1091         };
1092
1093         pinctrl_ncts2_default: ncts2_default {
1094                 function = "NCTS2";
1095                 groups = "NCTS2";
1096         };
1097
1098         pinctrl_ncts3_default: ncts3_default {
1099                 function = "NCTS3";
1100                 groups = "NCTS3";
1101         };
1102
1103         pinctrl_ncts4_default: ncts4_default {
1104                 function = "NCTS4";
1105                 groups = "NCTS4";
1106         };
1107
1108         pinctrl_ndcd1_default: ndcd1_default {
1109                 function = "NDCD1";
1110                 groups = "NDCD1";
1111         };
1112
1113         pinctrl_ndcd2_default: ndcd2_default {
1114                 function = "NDCD2";
1115                 groups = "NDCD2";
1116         };
1117
1118         pinctrl_ndcd3_default: ndcd3_default {
1119                 function = "NDCD3";
1120                 groups = "NDCD3";
1121         };
1122
1123         pinctrl_ndcd4_default: ndcd4_default {
1124                 function = "NDCD4";
1125                 groups = "NDCD4";
1126         };
1127
1128         pinctrl_ndsr1_default: ndsr1_default {
1129                 function = "NDSR1";
1130                 groups = "NDSR1";
1131         };
1132
1133         pinctrl_ndsr2_default: ndsr2_default {
1134                 function = "NDSR2";
1135                 groups = "NDSR2";
1136         };
1137
1138         pinctrl_ndsr3_default: ndsr3_default {
1139                 function = "NDSR3";
1140                 groups = "NDSR3";
1141         };
1142
1143         pinctrl_ndsr4_default: ndsr4_default {
1144                 function = "NDSR4";
1145                 groups = "NDSR4";
1146         };
1147
1148         pinctrl_ndtr1_default: ndtr1_default {
1149                 function = "NDTR1";
1150                 groups = "NDTR1";
1151         };
1152
1153         pinctrl_ndtr2_default: ndtr2_default {
1154                 function = "NDTR2";
1155                 groups = "NDTR2";
1156         };
1157
1158         pinctrl_ndtr3_default: ndtr3_default {
1159                 function = "NDTR3";
1160                 groups = "NDTR3";
1161         };
1162
1163         pinctrl_ndtr4_default: ndtr4_default {
1164                 function = "NDTR4";
1165                 groups = "NDTR4";
1166         };
1167
1168         pinctrl_nri1_default: nri1_default {
1169                 function = "NRI1";
1170                 groups = "NRI1";
1171         };
1172
1173         pinctrl_nri2_default: nri2_default {
1174                 function = "NRI2";
1175                 groups = "NRI2";
1176         };
1177
1178         pinctrl_nri3_default: nri3_default {
1179                 function = "NRI3";
1180                 groups = "NRI3";
1181         };
1182
1183         pinctrl_nri4_default: nri4_default {
1184                 function = "NRI4";
1185                 groups = "NRI4";
1186         };
1187
1188         pinctrl_nrts1_default: nrts1_default {
1189                 function = "NRTS1";
1190                 groups = "NRTS1";
1191         };
1192
1193         pinctrl_nrts2_default: nrts2_default {
1194                 function = "NRTS2";
1195                 groups = "NRTS2";
1196         };
1197
1198         pinctrl_nrts3_default: nrts3_default {
1199                 function = "NRTS3";
1200                 groups = "NRTS3";
1201         };
1202
1203         pinctrl_nrts4_default: nrts4_default {
1204                 function = "NRTS4";
1205                 groups = "NRTS4";
1206         };
1207
1208         pinctrl_oscclk_default: oscclk_default {
1209                 function = "OSCCLK";
1210                 groups = "OSCCLK";
1211         };
1212
1213         pinctrl_pewake_default: pewake_default {
1214                 function = "PEWAKE";
1215                 groups = "PEWAKE";
1216         };
1217
1218         pinctrl_pnor_default: pnor_default {
1219                 function = "PNOR";
1220                 groups = "PNOR";
1221         };
1222
1223         pinctrl_pwm0_default: pwm0_default {
1224                 function = "PWM0";
1225                 groups = "PWM0";
1226         };
1227
1228         pinctrl_pwm1_default: pwm1_default {
1229                 function = "PWM1";
1230                 groups = "PWM1";
1231         };
1232
1233         pinctrl_pwm2_default: pwm2_default {
1234                 function = "PWM2";
1235                 groups = "PWM2";
1236         };
1237
1238         pinctrl_pwm3_default: pwm3_default {
1239                 function = "PWM3";
1240                 groups = "PWM3";
1241         };
1242
1243         pinctrl_pwm4_default: pwm4_default {
1244                 function = "PWM4";
1245                 groups = "PWM4";
1246         };
1247
1248         pinctrl_pwm5_default: pwm5_default {
1249                 function = "PWM5";
1250                 groups = "PWM5";
1251         };
1252
1253         pinctrl_pwm6_default: pwm6_default {
1254                 function = "PWM6";
1255                 groups = "PWM6";
1256         };
1257
1258         pinctrl_pwm7_default: pwm7_default {
1259                 function = "PWM7";
1260                 groups = "PWM7";
1261         };
1262
1263         pinctrl_rgmii1_default: rgmii1_default {
1264                 function = "RGMII1";
1265                 groups = "RGMII1";
1266         };
1267
1268         pinctrl_rgmii2_default: rgmii2_default {
1269                 function = "RGMII2";
1270                 groups = "RGMII2";
1271         };
1272
1273         pinctrl_rmii1_default: rmii1_default {
1274                 function = "RMII1";
1275                 groups = "RMII1";
1276         };
1277
1278         pinctrl_rmii2_default: rmii2_default {
1279                 function = "RMII2";
1280                 groups = "RMII2";
1281         };
1282
1283         pinctrl_rxd1_default: rxd1_default {
1284                 function = "RXD1";
1285                 groups = "RXD1";
1286         };
1287
1288         pinctrl_rxd2_default: rxd2_default {
1289                 function = "RXD2";
1290                 groups = "RXD2";
1291         };
1292
1293         pinctrl_rxd3_default: rxd3_default {
1294                 function = "RXD3";
1295                 groups = "RXD3";
1296         };
1297
1298         pinctrl_rxd4_default: rxd4_default {
1299                 function = "RXD4";
1300                 groups = "RXD4";
1301         };
1302
1303         pinctrl_salt1_default: salt1_default {
1304                 function = "SALT1";
1305                 groups = "SALT1";
1306         };
1307
1308         pinctrl_salt10_default: salt10_default {
1309                 function = "SALT10";
1310                 groups = "SALT10";
1311         };
1312
1313         pinctrl_salt11_default: salt11_default {
1314                 function = "SALT11";
1315                 groups = "SALT11";
1316         };
1317
1318         pinctrl_salt12_default: salt12_default {
1319                 function = "SALT12";
1320                 groups = "SALT12";
1321         };
1322
1323         pinctrl_salt13_default: salt13_default {
1324                 function = "SALT13";
1325                 groups = "SALT13";
1326         };
1327
1328         pinctrl_salt14_default: salt14_default {
1329                 function = "SALT14";
1330                 groups = "SALT14";
1331         };
1332
1333         pinctrl_salt2_default: salt2_default {
1334                 function = "SALT2";
1335                 groups = "SALT2";
1336         };
1337
1338         pinctrl_salt3_default: salt3_default {
1339                 function = "SALT3";
1340                 groups = "SALT3";
1341         };
1342
1343         pinctrl_salt4_default: salt4_default {
1344                 function = "SALT4";
1345                 groups = "SALT4";
1346         };
1347
1348         pinctrl_salt5_default: salt5_default {
1349                 function = "SALT5";
1350                 groups = "SALT5";
1351         };
1352
1353         pinctrl_salt6_default: salt6_default {
1354                 function = "SALT6";
1355                 groups = "SALT6";
1356         };
1357
1358         pinctrl_salt7_default: salt7_default {
1359                 function = "SALT7";
1360                 groups = "SALT7";
1361         };
1362
1363         pinctrl_salt8_default: salt8_default {
1364                 function = "SALT8";
1365                 groups = "SALT8";
1366         };
1367
1368         pinctrl_salt9_default: salt9_default {
1369                 function = "SALT9";
1370                 groups = "SALT9";
1371         };
1372
1373         pinctrl_scl1_default: scl1_default {
1374                 function = "SCL1";
1375                 groups = "SCL1";
1376         };
1377
1378         pinctrl_scl2_default: scl2_default {
1379                 function = "SCL2";
1380                 groups = "SCL2";
1381         };
1382
1383         pinctrl_sd1_default: sd1_default {
1384                 function = "SD1";
1385                 groups = "SD1";
1386         };
1387
1388         pinctrl_sd2_default: sd2_default {
1389                 function = "SD2";
1390                 groups = "SD2";
1391         };
1392
1393         pinctrl_sda1_default: sda1_default {
1394                 function = "SDA1";
1395                 groups = "SDA1";
1396         };
1397
1398         pinctrl_sda2_default: sda2_default {
1399                 function = "SDA2";
1400                 groups = "SDA2";
1401         };
1402
1403         pinctrl_sgpm_default: sgpm_default {
1404                 function = "SGPM";
1405                 groups = "SGPM";
1406         };
1407
1408         pinctrl_sgps1_default: sgps1_default {
1409                 function = "SGPS1";
1410                 groups = "SGPS1";
1411         };
1412
1413         pinctrl_sgps2_default: sgps2_default {
1414                 function = "SGPS2";
1415                 groups = "SGPS2";
1416         };
1417
1418         pinctrl_sioonctrl_default: sioonctrl_default {
1419                 function = "SIOONCTRL";
1420                 groups = "SIOONCTRL";
1421         };
1422
1423         pinctrl_siopbi_default: siopbi_default {
1424                 function = "SIOPBI";
1425                 groups = "SIOPBI";
1426         };
1427
1428         pinctrl_siopbo_default: siopbo_default {
1429                 function = "SIOPBO";
1430                 groups = "SIOPBO";
1431         };
1432
1433         pinctrl_siopwreq_default: siopwreq_default {
1434                 function = "SIOPWREQ";
1435                 groups = "SIOPWREQ";
1436         };
1437
1438         pinctrl_siopwrgd_default: siopwrgd_default {
1439                 function = "SIOPWRGD";
1440                 groups = "SIOPWRGD";
1441         };
1442
1443         pinctrl_sios3_default: sios3_default {
1444                 function = "SIOS3";
1445                 groups = "SIOS3";
1446         };
1447
1448         pinctrl_sios5_default: sios5_default {
1449                 function = "SIOS5";
1450                 groups = "SIOS5";
1451         };
1452
1453         pinctrl_siosci_default: siosci_default {
1454                 function = "SIOSCI";
1455                 groups = "SIOSCI";
1456         };
1457
1458         pinctrl_spi1_default: spi1_default {
1459                 function = "SPI1";
1460                 groups = "SPI1";
1461         };
1462
1463         pinctrl_spi1cs1_default: spi1cs1_default {
1464                 function = "SPI1CS1";
1465                 groups = "SPI1CS1";
1466         };
1467
1468         pinctrl_spi1debug_default: spi1debug_default {
1469                 function = "SPI1DEBUG";
1470                 groups = "SPI1DEBUG";
1471         };
1472
1473         pinctrl_spi1passthru_default: spi1passthru_default {
1474                 function = "SPI1PASSTHRU";
1475                 groups = "SPI1PASSTHRU";
1476         };
1477
1478         pinctrl_spi2ck_default: spi2ck_default {
1479                 function = "SPI2CK";
1480                 groups = "SPI2CK";
1481         };
1482
1483         pinctrl_spi2cs0_default: spi2cs0_default {
1484                 function = "SPI2CS0";
1485                 groups = "SPI2CS0";
1486         };
1487
1488         pinctrl_spi2cs1_default: spi2cs1_default {
1489                 function = "SPI2CS1";
1490                 groups = "SPI2CS1";
1491         };
1492
1493         pinctrl_spi2miso_default: spi2miso_default {
1494                 function = "SPI2MISO";
1495                 groups = "SPI2MISO";
1496         };
1497
1498         pinctrl_spi2mosi_default: spi2mosi_default {
1499                 function = "SPI2MOSI";
1500                 groups = "SPI2MOSI";
1501         };
1502
1503         pinctrl_timer3_default: timer3_default {
1504                 function = "TIMER3";
1505                 groups = "TIMER3";
1506         };
1507
1508         pinctrl_timer4_default: timer4_default {
1509                 function = "TIMER4";
1510                 groups = "TIMER4";
1511         };
1512
1513         pinctrl_timer5_default: timer5_default {
1514                 function = "TIMER5";
1515                 groups = "TIMER5";
1516         };
1517
1518         pinctrl_timer6_default: timer6_default {
1519                 function = "TIMER6";
1520                 groups = "TIMER6";
1521         };
1522
1523         pinctrl_timer7_default: timer7_default {
1524                 function = "TIMER7";
1525                 groups = "TIMER7";
1526         };
1527
1528         pinctrl_timer8_default: timer8_default {
1529                 function = "TIMER8";
1530                 groups = "TIMER8";
1531         };
1532
1533         pinctrl_txd1_default: txd1_default {
1534                 function = "TXD1";
1535                 groups = "TXD1";
1536         };
1537
1538         pinctrl_txd2_default: txd2_default {
1539                 function = "TXD2";
1540                 groups = "TXD2";
1541         };
1542
1543         pinctrl_txd3_default: txd3_default {
1544                 function = "TXD3";
1545                 groups = "TXD3";
1546         };
1547
1548         pinctrl_txd4_default: txd4_default {
1549                 function = "TXD4";
1550                 groups = "TXD4";
1551         };
1552
1553         pinctrl_uart6_default: uart6_default {
1554                 function = "UART6";
1555                 groups = "UART6";
1556         };
1557
1558         pinctrl_usbcki_default: usbcki_default {
1559                 function = "USBCKI";
1560                 groups = "USBCKI";
1561         };
1562
1563         pinctrl_usb2ah_default: usb2ah_default {
1564                 function = "USB2AH";
1565                 groups = "USB2AH";
1566         };
1567
1568         pinctrl_usb2ad_default: usb2ad_default {
1569                 function = "USB2AD";
1570                 groups = "USB2AD";
1571         };
1572
1573         pinctrl_usb11bhid_default: usb11bhid_default {
1574                 function = "USB11BHID";
1575                 groups = "USB11BHID";
1576         };
1577
1578         pinctrl_usb2bh_default: usb2bh_default {
1579                 function = "USB2BH";
1580                 groups = "USB2BH";
1581         };
1582
1583         pinctrl_vgabiosrom_default: vgabiosrom_default {
1584                 function = "VGABIOSROM";
1585                 groups = "VGABIOSROM";
1586         };
1587
1588         pinctrl_vgahs_default: vgahs_default {
1589                 function = "VGAHS";
1590                 groups = "VGAHS";
1591         };
1592
1593         pinctrl_vgavs_default: vgavs_default {
1594                 function = "VGAVS";
1595                 groups = "VGAVS";
1596         };
1597
1598         pinctrl_vpi24_default: vpi24_default {
1599                 function = "VPI24";
1600                 groups = "VPI24";
1601         };
1602
1603         pinctrl_vpo_default: vpo_default {
1604                 function = "VPO";
1605                 groups = "VPO";
1606         };
1607
1608         pinctrl_wdtrst1_default: wdtrst1_default {
1609                 function = "WDTRST1";
1610                 groups = "WDTRST1";
1611         };
1612
1613         pinctrl_wdtrst2_default: wdtrst2_default {
1614                 function = "WDTRST2";
1615                 groups = "WDTRST2";
1616         };
1617 };