2 * DTS file for CSR SiRFatlas6 SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
10 compatible = "sirf,atlas6";
13 interrupt-parent = <&intc>;
21 d-cache-line-size = <32>;
22 i-cache-line-size = <32>;
23 d-cache-size = <32768>;
24 i-cache-size = <32768>;
26 timebase-frequency = <0>;
28 clock-frequency = <0>;
37 clock-latency = <150000>;
42 compatible = "arm,cortex-a9-pmu";
47 compatible = "simple-bus";
50 ranges = <0x40000000 0x40000000 0x80000000>;
52 intc: interrupt-controller@80020000 {
53 #interrupt-cells = <1>;
55 compatible = "sirf,prima2-intc";
56 reg = <0x80020000 0x1000>;
60 compatible = "simple-bus";
63 ranges = <0x88000000 0x88000000 0x40000>;
65 clks: clock-controller@88000000 {
66 compatible = "sirf,atlas6-clkc";
67 reg = <0x88000000 0x1000>;
72 rstc: reset-controller@88010000 {
73 compatible = "sirf,prima2-rstc";
74 reg = <0x88010000 0x1000>;
78 rsc-controller@88020000 {
79 compatible = "sirf,prima2-rsc";
80 reg = <0x88020000 0x1000>;
84 compatible = "sirf,prima2-cphifbg";
85 reg = <0x88030000 0x1000>;
91 compatible = "simple-bus";
94 ranges = <0x90000000 0x90000000 0x10000>;
96 memory-controller@90000000 {
97 compatible = "sirf,prima2-memc";
98 reg = <0x90000000 0x2000>;
104 compatible = "sirf,prima2-memcmon";
105 reg = <0x90002000 0x200>;
112 compatible = "simple-bus";
113 #address-cells = <1>;
115 ranges = <0x90010000 0x90010000 0x30000>;
118 compatible = "sirf,prima2-lcd";
119 reg = <0x90010000 0x20000>;
123 /* later transfer to pwm */
124 bl-gpio = <&gpio 7 0>;
125 default-panel = <&panel0>;
129 compatible = "sirf,prima2-vpp";
130 reg = <0x90020000 0x10000>;
138 compatible = "simple-bus";
139 #address-cells = <1>;
141 ranges = <0x98000000 0x98000000 0x8000000>;
144 compatible = "powervr,sgx510";
145 reg = <0x98000000 0x8000000>;
152 compatible = "simple-bus";
153 #address-cells = <1>;
155 ranges = <0xa0000000 0xa0000000 0x8000000>;
158 compatible = "sirf,atlas6-ble";
159 reg = <0xa0000000 0x2000>;
166 compatible = "simple-bus";
167 #address-cells = <1>;
169 ranges = <0xa8000000 0xa8000000 0x2000000>;
172 compatible = "sirf,prima2-dspif";
173 reg = <0xa8000000 0x10000>;
179 compatible = "sirf,prima2-gps";
180 reg = <0xa8010000 0x10000>;
187 compatible = "sirf,prima2-dsp";
188 reg = <0xa9000000 0x1000000>;
196 compatible = "simple-bus";
197 #address-cells = <1>;
199 ranges = <0xb0000000 0xb0000000 0x180000>,
200 <0x56000000 0x56000000 0x1b00000>;
203 compatible = "sirf,prima2-tick";
204 reg = <0xb0020000 0x1000>;
210 compatible = "sirf,prima2-nand";
211 reg = <0xb0030000 0x10000>;
217 compatible = "sirf,prima2-audio";
218 reg = <0xb0040000 0x10000>;
223 uart0: uart@b0050000 {
225 compatible = "sirf,prima2-uart";
226 reg = <0xb0050000 0x1000>;
230 dmas = <&dmac1 5>, <&dmac0 2>;
231 dma-names = "rx", "tx";
234 uart1: uart@b0060000 {
236 compatible = "sirf,prima2-uart";
237 reg = <0xb0060000 0x1000>;
241 dma-names = "no-rx", "no-tx";
244 uart2: uart@b0070000 {
246 compatible = "sirf,prima2-uart";
247 reg = <0xb0070000 0x1000>;
251 dmas = <&dmac0 6>, <&dmac0 7>;
252 dma-names = "rx", "tx";
257 compatible = "sirf,prima2-usp";
258 reg = <0xb0080000 0x10000>;
262 dmas = <&dmac1 1>, <&dmac1 2>;
263 dma-names = "rx", "tx";
268 compatible = "sirf,prima2-usp";
269 reg = <0xb0090000 0x10000>;
273 dmas = <&dmac0 14>, <&dmac0 15>;
274 dma-names = "rx", "tx";
277 dmac0: dma-controller@b00b0000 {
279 compatible = "sirf,prima2-dmac";
280 reg = <0xb00b0000 0x10000>;
286 dmac1: dma-controller@b0160000 {
288 compatible = "sirf,prima2-dmac";
289 reg = <0xb0160000 0x10000>;
296 compatible = "sirf,prima2-vip";
297 reg = <0xb00C0000 0x10000>;
300 sirf,vip-dma-rx-channel = <16>;
305 compatible = "sirf,prima2-spi";
306 reg = <0xb00d0000 0x10000>;
308 sirf,spi-num-chipselects = <1>;
311 dma-names = "rx", "tx";
312 #address-cells = <1>;
321 compatible = "sirf,prima2-spi";
322 reg = <0xb0170000 0x10000>;
324 sirf,spi-num-chipselects = <1>;
327 dma-names = "rx", "tx";
328 #address-cells = <1>;
337 compatible = "sirf,prima2-i2c";
338 reg = <0xb00e0000 0x10000>;
340 #address-cells = <1>;
347 compatible = "sirf,prima2-i2c";
348 reg = <0xb00f0000 0x10000>;
350 #address-cells = <1>;
356 compatible = "sirf,prima2-tsc";
357 reg = <0xb0110000 0x10000>;
362 gpio: pinctrl@b0120000 {
364 #interrupt-cells = <2>;
365 compatible = "sirf,atlas6-pinctrl";
366 reg = <0xb0120000 0x10000>;
367 interrupts = <43 44 45 46 47>;
369 interrupt-controller;
371 lcd_16pins_a: lcd0@0 {
373 sirf,pins = "lcd_16bitsgrp";
374 sirf,function = "lcd_16bits";
377 lcd_18pins_a: lcd0@1 {
379 sirf,pins = "lcd_18bitsgrp";
380 sirf,function = "lcd_18bits";
383 lcd_24pins_a: lcd0@2 {
385 sirf,pins = "lcd_24bitsgrp";
386 sirf,function = "lcd_24bits";
389 lcdrom_pins_a: lcdrom0@0 {
391 sirf,pins = "lcdromgrp";
392 sirf,function = "lcdrom";
395 uart0_pins_a: uart0@0 {
397 sirf,pins = "uart0grp";
398 sirf,function = "uart0";
401 uart0_noflow_pins_a: uart0@1 {
403 sirf,pins = "uart0_nostreamctrlgrp";
404 sirf,function = "uart0_nostreamctrl";
407 uart1_pins_a: uart1@0 {
409 sirf,pins = "uart1grp";
410 sirf,function = "uart1";
413 uart2_pins_a: uart2@0 {
415 sirf,pins = "uart2grp";
416 sirf,function = "uart2";
419 uart2_noflow_pins_a: uart2@1 {
421 sirf,pins = "uart2_nostreamctrlgrp";
422 sirf,function = "uart2_nostreamctrl";
425 spi0_pins_a: spi0@0 {
427 sirf,pins = "spi0grp";
428 sirf,function = "spi0";
431 spi1_pins_a: spi1@0 {
433 sirf,pins = "spi1grp";
434 sirf,function = "spi1";
437 i2c0_pins_a: i2c0@0 {
439 sirf,pins = "i2c0grp";
440 sirf,function = "i2c0";
443 i2c1_pins_a: i2c1@0 {
445 sirf,pins = "i2c1grp";
446 sirf,function = "i2c1";
449 pwm0_pins_a: pwm0@0 {
451 sirf,pins = "pwm0grp";
452 sirf,function = "pwm0";
455 pwm1_pins_a: pwm1@0 {
457 sirf,pins = "pwm1grp";
458 sirf,function = "pwm1";
461 pwm2_pins_a: pwm2@0 {
463 sirf,pins = "pwm2grp";
464 sirf,function = "pwm2";
467 pwm3_pins_a: pwm3@0 {
469 sirf,pins = "pwm3grp";
470 sirf,function = "pwm3";
473 pwm4_pins_a: pwm4@0 {
475 sirf,pins = "pwm4grp";
476 sirf,function = "pwm4";
481 sirf,pins = "gpsgrp";
482 sirf,function = "gps";
487 sirf,pins = "vipgrp";
488 sirf,function = "vip";
491 sdmmc0_pins_a: sdmmc0@0 {
493 sirf,pins = "sdmmc0grp";
494 sirf,function = "sdmmc0";
497 sdmmc1_pins_a: sdmmc1@0 {
499 sirf,pins = "sdmmc1grp";
500 sirf,function = "sdmmc1";
503 sdmmc2_pins_a: sdmmc2@0 {
505 sirf,pins = "sdmmc2grp";
506 sirf,function = "sdmmc2";
509 sdmmc2_nowp_pins_a: sdmmc2_nowp@0 {
511 sirf,pins = "sdmmc2_nowpgrp";
512 sirf,function = "sdmmc2_nowp";
515 sdmmc3_pins_a: sdmmc3@0 {
517 sirf,pins = "sdmmc3grp";
518 sirf,function = "sdmmc3";
521 sdmmc5_pins_a: sdmmc5@0 {
523 sirf,pins = "sdmmc5grp";
524 sirf,function = "sdmmc5";
527 i2s_mclk_pins_a: i2s_mclk@0 {
529 sirf,pins = "i2smclkgrp";
530 sirf,function = "i2s_mclk";
533 i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 {
535 sirf,pins = "i2s_ext_clk_inputgrp";
536 sirf,function = "i2s_ext_clk_input";
541 sirf,pins = "i2sgrp";
542 sirf,function = "i2s";
545 i2s_no_din_pins_a: i2s_no_din@0 {
547 sirf,pins = "i2s_no_dingrp";
548 sirf,function = "i2s_no_din";
551 i2s_6chn_pins_a: i2s_6chn@0 {
553 sirf,pins = "i2s_6chngrp";
554 sirf,function = "i2s_6chn";
557 ac97_pins_a: ac97@0 {
559 sirf,pins = "ac97grp";
560 sirf,function = "ac97";
563 nand_pins_a: nand@0 {
565 sirf,pins = "nandgrp";
566 sirf,function = "nand";
569 usp0_pins_a: usp0@0 {
571 sirf,pins = "usp0grp";
572 sirf,function = "usp0";
575 usp0_uart_nostreamctrl_pins_a: usp0@1 {
577 sirf,pins = "usp0_uart_nostreamctrl_grp";
578 sirf,function = "usp0_uart_nostreamctrl";
581 usp0_only_utfs_pins_a: usp0@2 {
583 sirf,pins = "usp0_only_utfs_grp";
584 sirf,function = "usp0_only_utfs";
587 usp0_only_urfs_pins_a: usp0@3 {
589 sirf,pins = "usp0_only_urfs_grp";
590 sirf,function = "usp0_only_urfs";
593 usp1_pins_a: usp1@0 {
595 sirf,pins = "usp1grp";
596 sirf,function = "usp1";
599 usp1_uart_nostreamctrl_pins_a: usp1@1 {
601 sirf,pins = "usp1_uart_nostreamctrl_grp";
602 sirf,function = "usp1_uart_nostreamctrl";
605 usb0_upli_drvbus_pins_a: usb0_upli_drvbus@0 {
607 sirf,pins = "usb0_upli_drvbusgrp";
608 sirf,function = "usb0_upli_drvbus";
611 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
613 sirf,pins = "usb1_utmi_drvbusgrp";
614 sirf,function = "usb1_utmi_drvbus";
617 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
619 sirf,pins = "usb1_dp_dngrp";
620 sirf,function = "usb1_dp_dn";
623 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
624 uart1_route_io_usb1 {
625 sirf,pins = "uart1_route_io_usb1grp";
626 sirf,function = "uart1_route_io_usb1";
629 warm_rst_pins_a: warm_rst@0 {
631 sirf,pins = "warm_rstgrp";
632 sirf,function = "warm_rst";
635 pulse_count_pins_a: pulse_count@0 {
637 sirf,pins = "pulse_countgrp";
638 sirf,function = "pulse_count";
641 cko0_pins_a: cko0@0 {
643 sirf,pins = "cko0grp";
644 sirf,function = "cko0";
647 cko1_pins_a: cko1@0 {
649 sirf,pins = "cko1grp";
650 sirf,function = "cko1";
656 compatible = "sirf,prima2-pwm";
657 reg = <0xb0130000 0x10000>;
662 compatible = "sirf,prima2-efuse";
663 reg = <0xb0140000 0x10000>;
668 compatible = "sirf,prima2-pulsec";
669 reg = <0xb0150000 0x10000>;
675 compatible = "sirf,prima2-pciiobg", "simple-bus";
676 #address-cells = <1>;
678 ranges = <0x56000000 0x56000000 0x1b00000>;
680 sd0: sdhci@56000000 {
682 compatible = "sirf,prima2-sdhc";
683 reg = <0x56000000 0x100000>;
689 sd1: sdhci@56100000 {
691 compatible = "sirf,prima2-sdhc";
692 reg = <0x56100000 0x100000>;
699 sd2: sdhci@56200000 {
701 compatible = "sirf,prima2-sdhc";
702 reg = <0x56200000 0x100000>;
709 sd3: sdhci@56300000 {
711 compatible = "sirf,prima2-sdhc";
712 reg = <0x56300000 0x100000>;
719 sd5: sdhci@56500000 {
721 compatible = "sirf,prima2-sdhc";
722 reg = <0x56500000 0x100000>;
730 compatible = "sirf,prima2-pcicp";
731 reg = <0x57900000 0x100000>;
735 rom-interface@57a00000 {
736 compatible = "sirf,prima2-romif";
737 reg = <0x57a00000 0x100000>;
743 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
744 #address-cells = <1>;
746 reg = <0x80030000 0x10000>;
749 compatible = "sirf,prima2-gpsrtc";
750 reg = <0x1000 0x1000>;
751 interrupts = <55 56 57>;
755 compatible = "sirf,prima2-sysrtc";
756 reg = <0x2000 0x1000>;
757 interrupts = <52 53 54>;
761 compatible = "sirf,prima2-minigpsrtc";
762 reg = <0x2000 0x1000>;
767 compatible = "sirf,prima2-pwrc";
768 reg = <0x3000 0x1000>;
774 compatible = "simple-bus";
775 #address-cells = <1>;
777 ranges = <0xb8000000 0xb8000000 0x40000>;
780 compatible = "chipidea,ci13611a-prima2";
781 reg = <0xb8000000 0x10000>;
787 compatible = "chipidea,ci13611a-prima2";
788 reg = <0xb8010000 0x10000>;
794 compatible = "sirf,prima2-security";
795 reg = <0xb8030000 0x10000>;