sys/gnu/dts/arm/da850.dtsi

   1 /*
   2  * Copyright 2012 DENX Software Engineering GmbH
   3  * Heiko Schocher <hs@denx.de>
   4  *
   5  * This program is free software; you can redistribute  it and/or modify it
   6  * under  the terms of  the GNU General  Public License as published by the
   7  * Free Software Foundation;  either version 2 of the  License, or (at your
   8  * option) any later version.
   9  */
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11
  12 / {
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15         chosen { };
  16         aliases { };
  17
  18         memory@c0000000 {
  19                 device_type = "memory";
  20                 reg = <0xc0000000 0x0>;
  21         };
  22
  23         arm {
  24                 #address-cells = <1>;
  25                 #size-cells = <1>;
  26                 ranges;
  27                 intc: interrupt-controller@fffee000 {
  28                         compatible = "ti,cp-intc";
  29                         interrupt-controller;
  30                         #interrupt-cells = <1>;
  31                         ti,intc-size = <101>;
  32                         reg = <0xfffee000 0x2000>;
  33                 };
  34         };
  35         dsp: dsp@11800000 {
  36                 compatible = "ti,da850-dsp";
  37                 reg = <0x11800000 0x40000>,
  38                       <0x11e00000 0x8000>,
  39                       <0x11f00000 0x8000>,
  40                       <0x01c14044 0x4>,
  41                       <0x01c14174 0x8>;
  42                 reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
  43                 interrupt-parent = <&intc>;
  44                 interrupts = <28>;
  45                 status = "disabled";
  46         };
  47         soc@1c00000 {
  48                 compatible = "simple-bus";
  49                 model = "da850";
  50                 #address-cells = <1>;
  51                 #size-cells = <1>;
  52                 ranges = <0x0 0x01c00000 0x400000>;
  53                 interrupt-parent = <&intc>;
  54
  55                 pmx_core: pinmux@14120 {
  56                         compatible = "pinctrl-single";
  57                         reg = <0x14120 0x50>;
  58                         #pinctrl-cells = <2>;
  59                         pinctrl-single,bit-per-mux;
  60                         pinctrl-single,register-width = <32>;
  61                         pinctrl-single,function-mask = <0xf>;
  62                         status = "disabled";
  63
  64                         serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
  65                                 pinctrl-single,bits = <
  66                                         /* UART0_RTS UART0_CTS */
  67                                         0x0c 0x22000000 0xff000000
  68                                 >;
  69                         };
  70                         serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
  71                                 pinctrl-single,bits = <
  72                                         /* UART0_TXD UART0_RXD */
  73                                         0x0c 0x00220000 0x00ff0000
  74                                 >;
  75                         };
  76                         serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
  77                                 pinctrl-single,bits = <
  78                                         /* UART1_CTS UART1_RTS */
  79                                         0x00 0x00440000 0x00ff0000
  80                                 >;
  81                         };
  82                         serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
  83                                 pinctrl-single,bits = <
  84                                         /* UART1_TXD UART1_RXD */
  85                                         0x10 0x22000000 0xff000000
  86                                 >;
  87                         };
  88                         serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
  89                                 pinctrl-single,bits = <
  90                                         /* UART2_CTS UART2_RTS */
  91                                         0x00 0x44000000 0xff000000
  92                                 >;
  93                         };
  94                         serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
  95                                 pinctrl-single,bits = <
  96                                         /* UART2_TXD UART2_RXD */
  97                                         0x10 0x00220000 0x00ff0000
  98                                 >;
  99                         };
 100                         i2c0_pins: pinmux_i2c0_pins {
 101                                 pinctrl-single,bits = <
 102                                         /* I2C0_SDA,I2C0_SCL */
 103                                         0x10 0x00002200 0x0000ff00
 104                                 >;
 105                         };
 106                         i2c1_pins: pinmux_i2c1_pins {
 107                                 pinctrl-single,bits = <
 108                                         /* I2C1_SDA, I2C1_SCL */
 109                                         0x10 0x00440000 0x00ff0000
 110                                 >;
 111                         };
 112                         mmc0_pins: pinmux_mmc_pins {
 113                                 pinctrl-single,bits = <
 114                                         /* MMCSD0_DAT[3] MMCSD0_DAT[2]
 115                                          * MMCSD0_DAT[1] MMCSD0_DAT[0]
 116                                          * MMCSD0_CMD    MMCSD0_CLK
 117                                          */
 118                                         0x28 0x00222222  0x00ffffff
 119                                 >;
 120                         };
 121                         ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
 122                                 pinctrl-single,bits = <
 123                                         /* EPWM0A */
 124                                         0xc 0x00000002 0x0000000f
 125                                 >;
 126                         };
 127                         ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
 128                                 pinctrl-single,bits = <
 129                                         /* EPWM0B */
 130                                         0xc 0x00000020 0x000000f0
 131                                 >;
 132                         };
 133                         ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
 134                                 pinctrl-single,bits = <
 135                                         /* EPWM1A */
 136                                         0x14 0x00000002 0x0000000f
 137                                 >;
 138                         };
 139                         ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
 140                                 pinctrl-single,bits = <
 141                                         /* EPWM1B */
 142                                         0x14 0x00000020 0x000000f0
 143                                 >;
 144                         };
 145                         ecap0_pins: pinmux_ecap0_pins {
 146                                 pinctrl-single,bits = <
 147                                         /* ECAP0_APWM0 */
 148                                         0x8 0x20000000 0xf0000000
 149                                 >;
 150                         };
 151                         ecap1_pins: pinmux_ecap1_pins {
 152                                 pinctrl-single,bits = <
 153                                         /* ECAP1_APWM1 */
 154                                         0x4 0x40000000 0xf0000000
 155                                 >;
 156                         };
 157                         ecap2_pins: pinmux_ecap2_pins {
 158                                 pinctrl-single,bits = <
 159                                         /* ECAP2_APWM2 */
 160                                         0x4 0x00000004 0x0000000f
 161                                 >;
 162                         };
 163                         spi0_pins: pinmux_spi0_pins {
 164                                 pinctrl-single,bits = <
 165                                         /* SIMO, SOMI, CLK */
 166                                         0xc 0x00001101 0x0000ff0f
 167                                 >;
 168                         };
 169                         spi0_cs0_pin: pinmux_spi0_cs0 {
 170                                 pinctrl-single,bits = <
 171                                         /* CS0 */
 172                                         0x10 0x00000010 0x000000f0
 173                                 >;
 174                         };
 175                         spi0_cs3_pin: pinmux_spi0_cs3_pin {
 176                                 pinctrl-single,bits = <
 177                                         /* CS3 */
 178                                         0xc 0x01000000 0x0f000000
 179                                 >;
 180                         };
 181                         spi1_pins: pinmux_spi1_pins {
 182                                 pinctrl-single,bits = <
 183                                         /* SIMO, SOMI, CLK */
 184                                         0x14 0x00110100 0x00ff0f00
 185                                 >;
 186                         };
 187                         spi1_cs0_pin: pinmux_spi1_cs0 {
 188                                 pinctrl-single,bits = <
 189                                         /* CS0 */
 190                                         0x14 0x00000010 0x000000f0
 191                                 >;
 192                         };
 193                         mdio_pins: pinmux_mdio_pins {
 194                                 pinctrl-single,bits = <
 195                                         /* MDIO_CLK, MDIO_D */
 196                                         0x10 0x00000088 0x000000ff
 197                                 >;
 198                         };
 199                         mii_pins: pinmux_mii_pins {
 200                                 pinctrl-single,bits = <
 201                                         /*
 202                                          * MII_TXEN, MII_TXCLK, MII_COL
 203                                          * MII_TXD_3, MII_TXD_2, MII_TXD_1
 204                                          * MII_TXD_0
 205                                          */
 206                                         0x8 0x88888880 0xfffffff0
 207                                         /*
 208                                          * MII_RXER, MII_CRS, MII_RXCLK
 209                                          * MII_RXDV, MII_RXD_3, MII_RXD_2
 210                                          * MII_RXD_1, MII_RXD_0
 211                                          */
 212                                         0xc 0x88888888 0xffffffff
 213                                 >;
 214                         };
 215                         lcd_pins: pinmux_lcd_pins {
 216                                 pinctrl-single,bits = <
 217                                         /*
 218                                          * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
 219                                          * LCD_D[6], LCD_D[7]
 220                                          */
 221                                         0x40 0x22222200 0xffffff00
 222                                         /*
 223                                          * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
 224                                          * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
 225                                          */
 226                                         0x44 0x22222222 0xffffffff
 227                                         /* LCD_D[8], LCD_D[9] */
 228                                         0x48 0x00000022 0x000000ff
 229
 230                                         /* LCD_PCLK */
 231                                         0x48 0x02000000 0x0f000000
 232                                         /* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
 233                                         0x4c 0x02000022 0x0f0000ff
 234                                 >;
 235                         };
 236                         vpif_capture_pins: vpif_capture_pins {
 237                                 pinctrl-single,bits = <
 238                                         /* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */
 239                                         0x38 0x11111111 0xffffffff
 240                                         /* VP_DIN[10..15,0..1] */
 241                                         0x3c 0x11111111 0xffffffff
 242                                         /* VP_DIN[8..9] */
 243                                         0x40 0x00000011 0x000000ff
 244                                 >;
 245                         };
 246                         vpif_display_pins: vpif_display_pins {
 247                                 pinctrl-single,bits = <
 248                                         /* VP_DOUT[2..7] */
 249                                         0x40 0x11111100 0xffffff00
 250                                         /* VP_DOUT[10..15,0..1] */
 251                                         0x44 0x11111111 0xffffffff
 252                                         /*  VP_DOUT[8..9] */
 253                                         0x48 0x00000011 0x000000ff
 254                                         /*
 255                                          * VP_CLKOUT3, VP_CLKIN3,
 256                                          * VP_CLKOUT2, VP_CLKIN2
 257                                          */
 258                                         0x4c 0x00111100 0x00ffff00
 259                                 >;
 260                         };
 261                 };
 262                 prictrl: priority-controller@14110 {
 263                         compatible = "ti,da850-mstpri";
 264                         reg = <0x14110 0x0c>;
 265                         status = "disabled";
 266                 };
 267                 cfgchip: chip-controller@1417c {
 268                         compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
 269                         reg = <0x1417c 0x14>;
 270
 271                         usb_phy: usb-phy {
 272                                 compatible = "ti,da830-usb-phy";
 273                                 #phy-cells = <1>;
 274                                 status = "disabled";
 275                         };
 276                 };
 277                 edma0: edma@0 {
 278                         compatible = "ti,edma3-tpcc";
 279                         /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
 280                         reg =   <0x0 0x8000>;
 281                         reg-names = "edma3_cc";
 282                         interrupts = <11 12>;
 283                         interrupt-names = "edma3_ccint", "edma3_ccerrint";
 284                         #dma-cells = <2>;
 285
 286                         ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
 287                 };
 288                 edma0_tptc0: tptc@8000 {
 289                         compatible = "ti,edma3-tptc";
 290                         reg =   <0x8000 0x400>;
 291                         interrupts = <13>;
 292                         interrupt-names = "edm3_tcerrint";
 293                 };
 294                 edma0_tptc1: tptc@8400 {
 295                         compatible = "ti,edma3-tptc";
 296                         reg =   <0x8400 0x400>;
 297                         interrupts = <32>;
 298                         interrupt-names = "edm3_tcerrint";
 299                 };
 300                 edma1: edma@230000 {
 301                         compatible = "ti,edma3-tpcc";
 302                         /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
 303                         reg =   <0x230000 0x8000>;
 304                         reg-names = "edma3_cc";
 305                         interrupts = <93 94>;
 306                         interrupt-names = "edma3_ccint", "edma3_ccerrint";
 307                         #dma-cells = <2>;
 308
 309                         ti,tptcs = <&edma1_tptc0 7>;
 310                 };
 311                 edma1_tptc0: tptc@238000 {
 312                         compatible = "ti,edma3-tptc";
 313                         reg =   <0x238000 0x400>;
 314                         interrupts = <95>;
 315                         interrupt-names = "edm3_tcerrint";
 316                 };
 317                 serial0: serial@42000 {
 318                         compatible = "ti,da830-uart", "ns16550a";
 319                         reg = <0x42000 0x100>;
 320                         reg-io-width = <4>;
 321                         reg-shift = <2>;
 322                         interrupts = <25>;
 323                         status = "disabled";
 324                 };
 325                 serial1: serial@10c000 {
 326                         compatible = "ti,da830-uart", "ns16550a";
 327                         reg = <0x10c000 0x100>;
 328                         reg-io-width = <4>;
 329                         reg-shift = <2>;
 330                         interrupts = <53>;
 331                         status = "disabled";
 332                 };
 333                 serial2: serial@10d000 {
 334                         compatible = "ti,da830-uart", "ns16550a";
 335                         reg = <0x10d000 0x100>;
 336                         reg-io-width = <4>;
 337                         reg-shift = <2>;
 338                         interrupts = <61>;
 339                         status = "disabled";
 340                 };
 341                 rtc0: rtc@23000 {
 342                         compatible = "ti,da830-rtc";
 343                         reg = <0x23000 0x1000>;
 344                         interrupts = <19
 345                                       19>;
 346                         status = "disabled";
 347                 };
 348                 i2c0: i2c@22000 {
 349                         compatible = "ti,davinci-i2c";
 350                         reg = <0x22000 0x1000>;
 351                         interrupts = <15>;
 352                         #address-cells = <1>;
 353                         #size-cells = <0>;
 354                         status = "disabled";
 355                 };
 356                 i2c1: i2c@228000 {
 357                         compatible = "ti,davinci-i2c";
 358                         reg = <0x228000 0x1000>;
 359                         interrupts = <51>;
 360                         #address-cells = <1>;
 361                         #size-cells = <0>;
 362                         status = "disabled";
 363                 };
 364                 wdt: wdt@21000 {
 365                         compatible = "ti,davinci-wdt";
 366                         reg = <0x21000 0x1000>;
 367                         status = "disabled";
 368                 };
 369                 mmc0: mmc@40000 {
 370                         compatible = "ti,da830-mmc";
 371                         reg = <0x40000 0x1000>;
 372                         cap-sd-highspeed;
 373                         cap-mmc-highspeed;
 374                         interrupts = <16>;
 375                         dmas = <&edma0 16 0>, <&edma0 17 0>;
 376                         dma-names = "rx", "tx";
 377                         status = "disabled";
 378                 };
 379                 vpif: video@217000 {
 380                         compatible = "ti,da850-vpif";
 381                         reg = <0x217000 0x1000>;
 382                         interrupts = <92>;
 383                         status = "disabled";
 384
 385                         /* VPIF capture port */
 386                         port@0 {
 387                                 #address-cells = <1>;
 388                                 #size-cells = <0>;
 389                         };
 390
 391                         /* VPIF display port */
 392                         port@1 {
 393                                 #address-cells = <1>;
 394                                 #size-cells = <0>;
 395                         };
 396                 };
 397                 mmc1: mmc@21b000 {
 398                         compatible = "ti,da830-mmc";
 399                         reg = <0x21b000 0x1000>;
 400                         cap-sd-highspeed;
 401                         cap-mmc-highspeed;
 402                         interrupts = <72>;
 403                         dmas = <&edma1 28 0>, <&edma1 29 0>;
 404                         dma-names = "rx", "tx";
 405                         status = "disabled";
 406                 };
 407                 ehrpwm0: pwm@300000 {
 408                         compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
 409                                      "ti,am33xx-ehrpwm";
 410                         #pwm-cells = <3>;
 411                         reg = <0x300000 0x2000>;
 412                         status = "disabled";
 413                 };
 414                 ehrpwm1: pwm@302000 {
 415                         compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
 416                                      "ti,am33xx-ehrpwm";
 417                         #pwm-cells = <3>;
 418                         reg = <0x302000 0x2000>;
 419                         status = "disabled";
 420                 };
 421                 ecap0: ecap@306000 {
 422                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 423                                      "ti,am33xx-ecap";
 424                         #pwm-cells = <3>;
 425                         reg = <0x306000 0x80>;
 426                         status = "disabled";
 427                 };
 428                 ecap1: ecap@307000 {
 429                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 430                                      "ti,am33xx-ecap";
 431                         #pwm-cells = <3>;
 432                         reg = <0x307000 0x80>;
 433                         status = "disabled";
 434                 };
 435                 ecap2: ecap@308000 {
 436                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 437                                      "ti,am33xx-ecap";
 438                         #pwm-cells = <3>;
 439                         reg = <0x308000 0x80>;
 440                         status = "disabled";
 441                 };
 442                 spi0: spi@41000 {
 443                         #address-cells = <1>;
 444                         #size-cells = <0>;
 445                         compatible = "ti,da830-spi";
 446                         reg = <0x41000 0x1000>;
 447                         num-cs = <6>;
 448                         ti,davinci-spi-intr-line = <1>;
 449                         interrupts = <20>;
 450                         dmas = <&edma0 14 0>, <&edma0 15 0>;
 451                         dma-names = "rx", "tx";
 452                         status = "disabled";
 453                 };
 454                 spi1: spi@30e000 {
 455                         #address-cells = <1>;
 456                         #size-cells = <0>;
 457                         compatible = "ti,da830-spi";
 458                         reg = <0x30e000 0x1000>;
 459                         num-cs = <4>;
 460                         ti,davinci-spi-intr-line = <1>;
 461                         interrupts = <56>;
 462                         dmas = <&edma0 18 0>, <&edma0 19 0>;
 463                         dma-names = "rx", "tx";
 464                         status = "disabled";
 465                 };
 466                 usb0: usb@200000 {
 467                         compatible = "ti,da830-musb";
 468                         reg = <0x200000 0x1000>;
 469                         ranges;
 470                         interrupts = <58>;
 471                         interrupt-names = "mc";
 472                         dr_mode = "otg";
 473                         phys = <&usb_phy 0>;
 474                         phy-names = "usb-phy";
 475                         status = "disabled";
 476
 477                         #address-cells = <1>;
 478                         #size-cells = <1>;
 479
 480                         dmas = <&cppi41dma 0 0 &cppi41dma 1 0
 481                                 &cppi41dma 2 0 &cppi41dma 3 0
 482                                 &cppi41dma 0 1 &cppi41dma 1 1
 483                                 &cppi41dma 2 1 &cppi41dma 3 1>;
 484                         dma-names =
 485                                 "rx1", "rx2", "rx3", "rx4",
 486                                 "tx1", "tx2", "tx3", "tx4";
 487
 488                         cppi41dma: dma-controller@201000 {
 489                                 compatible = "ti,da830-cppi41";
 490                                 reg =  <0x201000 0x1000
 491                                         0x202000 0x1000
 492                                         0x204000 0x4000>;
 493                                 reg-names = "controller",
 494                                             "scheduler", "queuemgr";
 495                                 interrupts = <58>;
 496                                 #dma-cells = <2>;
 497                                 #dma-channels = <4>;
 498                                 status = "okay";
 499                         };
 500                 };
 501                 sata: sata@218000 {
 502                         compatible = "ti,da850-ahci";
 503                         reg = <0x218000 0x2000>, <0x22c018 0x4>;
 504                         interrupts = <67>;
 505                         status = "disabled";
 506                 };
 507                 mdio: mdio@224000 {
 508                         compatible = "ti,davinci_mdio";
 509                         #address-cells = <1>;
 510                         #size-cells = <0>;
 511                         reg = <0x224000 0x1000>;
 512                         status = "disabled";
 513                 };
 514                 eth0: ethernet@220000 {
 515                         compatible = "ti,davinci-dm6467-emac";
 516                         reg = <0x220000 0x4000>;
 517                         ti,davinci-ctrl-reg-offset = <0x3000>;
 518                         ti,davinci-ctrl-mod-reg-offset = <0x2000>;
 519                         ti,davinci-ctrl-ram-offset = <0>;
 520                         ti,davinci-ctrl-ram-size = <0x2000>;
 521                         local-mac-address = [ 00 00 00 00 00 00 ];
 522                         interrupts = <33
 523                                         34
 524                                         35
 525                                         36
 526                                         >;
 527                         status = "disabled";
 528                 };
 529                 usb1: usb@225000 {
 530                         compatible = "ti,da830-ohci";
 531                         reg = <0x225000 0x1000>;
 532                         interrupts = <59>;
 533                         phys = <&usb_phy 1>;
 534                         phy-names = "usb-phy";
 535                         status = "disabled";
 536                 };
 537                 gpio: gpio@226000 {
 538                         compatible = "ti,dm6441-gpio";
 539                         gpio-controller;
 540                         #gpio-cells = <2>;
 541                         reg = <0x226000 0x1000>;
 542                         interrupts = <42 IRQ_TYPE_EDGE_BOTH
 543                                 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
 544                                 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
 545                                 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
 546                                 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
 547                         ti,ngpio = <144>;
 548                         ti,davinci-gpio-unbanked = <0>;
 549                         status = "disabled";
 550                         interrupt-controller;
 551                         #interrupt-cells = <2>;
 552                 };
 553                 pinconf: pin-controller@22c00c {
 554                         compatible = "ti,da850-pupd";
 555                         reg = <0x22c00c 0x8>;
 556                         status = "disabled";
 557                 };
 558
 559                 mcasp0: mcasp@100000 {
 560                         compatible = "ti,da830-mcasp-audio";
 561                         reg = <0x100000 0x2000>,
 562                               <0x102000 0x400000>;
 563                         reg-names = "mpu", "dat";
 564                         interrupts = <54>;
 565                         interrupt-names = "common";
 566                         status = "disabled";
 567                         dmas = <&edma0 1 1>,
 568                                 <&edma0 0 1>;
 569                         dma-names = "tx", "rx";
 570                 };
 571
 572                 lcdc: display@213000 {
 573                         compatible = "ti,da850-tilcdc";
 574                         reg = <0x213000 0x1000>;
 575                         interrupts = <52>;
 576                         max-pixelclock = <37500>;
 577                         status = "disabled";
 578                 };
 579         };
 580         aemif: aemif@68000000 {
 581                 compatible = "ti,da850-aemif";
 582                 #address-cells = <2>;
 583                 #size-cells = <1>;
 584
 585                 reg = <0x68000000 0x00008000>;
 586                 ranges = <0 0 0x60000000 0x08000000
 587                           1 0 0x68000000 0x00008000>;
 588                 status = "disabled";
 589         };
 590         memctrl: memory-controller@b0000000 {
 591                 compatible = "ti,da850-ddr-controller";
 592                 reg = <0xb0000000 0xe8>;
 593                 status = "disabled";
 594         };
 595 };