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1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
4
5 / {
6         #address-cells = <1>;
7         #size-cells = <1>;
8         /*
9          * The decompressor and also some bootloaders rely on a
10          * pre-existing /chosen node to be available to insert the
11          * command line and merge other ATAGS info.
12          * Also for U-Boot there must be a pre-existing /memory node.
13          */
14         chosen {};
15         memory { device_type = "memory"; };
16
17         aliases {
18                 serial0 = &uart1;
19                 serial1 = &uart2;
20                 serial2 = &uart3;
21                 serial3 = &uart4;
22                 serial4 = &uart5;
23         };
24
25         cpus {
26                 #address-cells = <1>;
27                 #size-cells = <0>;
28
29                 cpu@0 {
30                         compatible = "arm,arm1136jf-s";
31                         device_type = "cpu";
32                         reg = <0>;
33                 };
34         };
35
36         avic: interrupt-controller@68000000 {
37                 compatible = "fsl,imx31-avic", "fsl,avic";
38                 interrupt-controller;
39                 #interrupt-cells = <1>;
40                 reg = <0x68000000 0x100000>;
41         };
42
43         soc {
44                 #address-cells = <1>;
45                 #size-cells = <1>;
46                 compatible = "simple-bus";
47                 interrupt-parent = <&avic>;
48                 ranges;
49
50                 aips@43f00000 { /* AIPS1 */
51                         compatible = "fsl,aips-bus", "simple-bus";
52                         #address-cells = <1>;
53                         #size-cells = <1>;
54                         reg = <0x43f00000 0x100000>;
55                         ranges;
56
57                         uart1: serial@43f90000 {
58                                 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
59                                 reg = <0x43f90000 0x4000>;
60                                 interrupts = <45>;
61                                 clocks = <&clks 10>, <&clks 30>;
62                                 clock-names = "ipg", "per";
63                                 status = "disabled";
64                         };
65
66                         uart2: serial@43f94000 {
67                                 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
68                                 reg = <0x43f94000 0x4000>;
69                                 interrupts = <32>;
70                                 clocks = <&clks 10>, <&clks 31>;
71                                 clock-names = "ipg", "per";
72                                 status = "disabled";
73                         };
74
75                         kpp: kpp@43fa8000 {
76                                 compatible = "fsl,imx31-kpp", "fsl,imx21-kpp";
77                                 reg = <0x43fa8000 0x4000>;
78                                 interrupts = <24>;
79                                 clocks = <&clks 46>;
80                                 status = "disabled";
81                         };
82
83                         uart4: serial@43fb0000 {
84                                 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
85                                 reg = <0x43fb0000 0x4000>;
86                                 clocks = <&clks 10>, <&clks 49>;
87                                 clock-names = "ipg", "per";
88                                 interrupts = <46>;
89                                 status = "disabled";
90                         };
91
92                         uart5: serial@43fb4000 {
93                                 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
94                                 reg = <0x43fb4000 0x4000>;
95                                 interrupts = <47>;
96                                 clocks = <&clks 10>, <&clks 50>;
97                                 clock-names = "ipg", "per";
98                                 status = "disabled";
99                         };
100                 };
101
102                 spba@50000000 {
103                         compatible = "fsl,spba-bus", "simple-bus";
104                         #address-cells = <1>;
105                         #size-cells = <1>;
106                         reg = <0x50000000 0x100000>;
107                         ranges;
108
109                         uart3: serial@5000c000 {
110                                 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
111                                 reg = <0x5000c000 0x4000>;
112                                 interrupts = <18>;
113                                 clocks = <&clks 10>, <&clks 48>;
114                                 clock-names = "ipg", "per";
115                                 status = "disabled";
116                         };
117
118                         iim: iim@5001c000 {
119                                 compatible = "fsl,imx31-iim", "fsl,imx27-iim";
120                                 reg = <0x5001c000 0x1000>;
121                                 interrupts = <19>;
122                                 clocks = <&clks 25>;
123                         };
124                 };
125
126                 aips@53f00000 { /* AIPS2 */
127                         compatible = "fsl,aips-bus", "simple-bus";
128                         #address-cells = <1>;
129                         #size-cells = <1>;
130                         reg = <0x53f00000 0x100000>;
131                         ranges;
132
133                         clks: ccm@53f80000{
134                                 compatible = "fsl,imx31-ccm";
135                                 reg = <0x53f80000 0x4000>;
136                                 interrupts = <31>, <53>;
137                                 #clock-cells = <1>;
138                         };
139
140                         gpt: timer@53f90000 {
141                                 compatible = "fsl,imx31-gpt";
142                                 reg = <0x53f90000 0x4000>;
143                                 interrupts = <29>;
144                                 clocks = <&clks 10>, <&clks 22>;
145                                 clock-names = "ipg", "per";
146                         };
147                 };
148         };
149 };