sys/gnu/dts/arm/imx51-zii-rdu1.dts

   1 /*
   2  * Copyright (C) 2017 Zodiac Inflight Innovations
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License
  11  *     version 2 as published by the Free Software Foundation.
  12  *
  13  *     This file is distributed in the hope that it will be useful,
  14  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *     GNU General Public License for more details.
  17  *
  18  * Or, alternatively,
  19  *
  20  *  b) Permission is hereby granted, free of charge, to any person
  21  *     obtaining a copy of this software and associated documentation
  22  *     files (the "Software"), to deal in the Software without
  23  *     restriction, including without limitation the rights to use,
  24  *     copy, modify, merge, publish, distribute, sublicense, and/or
  25  *     sell copies of the Software, and to permit persons to whom the
  26  *     Software is furnished to do so, subject to the following
  27  *     conditions:
  28  *
  29  *     The above copyright notice and this permission notice shall be
  30  *     included in all copies or substantial portions of the Software.
  31  *
  32  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
  33  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  34  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  35  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  36  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  37  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  38  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  39  *     OTHER DEALINGS IN THE SOFTWARE.
  40  */
  41
  42 /dts-v1/;
  43 #include "imx51.dtsi"
  44 #include <dt-bindings/sound/fsl-imx-audmux.h>
  45
  46 / {
  47         model = "ZII RDU1 Board";
  48         compatible = "zii,imx51-rdu1", "fsl,imx51";
  49
  50         chosen {
  51                 stdout-path = &uart1;
  52         };
  53
  54         /* Will be filled by the bootloader */
  55         memory@90000000 {
  56                 reg = <0x90000000 0>;
  57         };
  58
  59         aliases {
  60                 mdio-gpio0 = &mdio_gpio;
  61                 rtc0 = &ds1341;
  62         };
  63
  64         clk_26M_osc: 26M_osc {
  65                 compatible = "fixed-clock";
  66                 #clock-cells = <0>;
  67                 clock-frequency = <26000000>;
  68         };
  69
  70         clk_26M_osc_gate: 26M_gate {
  71                 compatible = "gpio-gate-clock";
  72                 pinctrl-names = "default";
  73                 pinctrl-0 = <&pinctrl_clk26mhz>;
  74                 clocks = <&clk_26M_osc>;
  75                 #clock-cells = <0>;
  76                 enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
  77         };
  78
  79         clk_26M_usb: usbhost_gate {
  80                 compatible = "gpio-gate-clock";
  81                 pinctrl-names = "default";
  82                 pinctrl-0 = <&pinctrl_usbgate26mhz>;
  83                 clocks = <&clk_26M_osc_gate>;
  84                 #clock-cells = <0>;
  85                 enable-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
  86         };
  87
  88         clk_26M_snd: snd_gate {
  89                 compatible = "gpio-gate-clock";
  90                 pinctrl-names = "default";
  91                 pinctrl-0 = <&pinctrl_sndgate26mhz>;
  92                 clocks = <&clk_26M_osc_gate>;
  93                 #clock-cells = <0>;
  94                 enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
  95         };
  96
  97         reg_5p0v_main: regulator-5p0v-main {
  98                 compatible = "regulator-fixed";
  99                 regulator-name = "5V_MAIN";
 100                 regulator-min-microvolt = <5000000>;
 101                 regulator-max-microvolt = <5000000>;
 102                 regulator-always-on;
 103         };
 104
 105         reg_3p3v: regulator-3p3v {
 106                 compatible = "regulator-fixed";
 107                 regulator-name = "3.3V";
 108                 regulator-min-microvolt = <3300000>;
 109                 regulator-max-microvolt = <3300000>;
 110                 regulator-always-on;
 111         };
 112
 113         disp0 {
 114                 compatible = "fsl,imx-parallel-display";
 115                 pinctrl-names = "default";
 116                 pinctrl-0 = <&pinctrl_ipu_disp1>;
 117
 118                 #address-cells = <1>;
 119                 #size-cells = <0>;
 120
 121                 port@0 {
 122                         reg = <0>;
 123
 124                         display_in: endpoint {
 125                                 remote-endpoint = <&ipu_di0_disp1>;
 126                         };
 127                 };
 128
 129                 port@1 {
 130                         reg = <1>;
 131
 132                         display_out: endpoint {
 133                                 remote-endpoint = <&panel_in>;
 134                         };
 135                 };
 136         };
 137
 138         panel {
 139                 /* no compatible here, bootloader will patch in correct one */
 140                 pinctrl-names = "default";
 141                 pinctrl-0 = <&pinctrl_panel>;
 142                 power-supply = <&reg_3p3v>;
 143                 enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
 144                 status = "disabled";
 145
 146                 port {
 147                         panel_in: endpoint {
 148                                 remote-endpoint = <&display_out>;
 149                         };
 150                 };
 151         };
 152
 153         i2c_gpio: i2c-gpio {
 154                 compatible = "i2c-gpio";
 155                 pinctrl-names = "default";
 156                 pinctrl-0 = <&pinctrl_swi2c>;
 157                 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>, /* sda */
 158                         <&gpio3 4 GPIO_ACTIVE_HIGH>; /* scl */
 159                 i2c-gpio,delay-us = <50>;
 160                 status = "okay";
 161
 162                 #address-cells = <1>;
 163                 #size-cells = <0>;
 164
 165                 sgtl5000: codec@a {
 166                         compatible = "fsl,sgtl5000";
 167                         reg = <0x0a>;
 168                         clocks = <&clk_26M_snd>;
 169                         VDDA-supply = <&vdig_reg>;
 170                         VDDIO-supply = <&vvideo_reg>;
 171                         #sound-dai-cells = <0>;
 172                 };
 173         };
 174
 175         spi_gpio: spi-gpio {
 176                 compatible = "spi-gpio";
 177                 #address-cells = <1>;
 178                 #size-cells = <0>;
 179                 pinctrl-names = "default";
 180                 pinctrl-0 = <&pinctrl_gpiospi0>;
 181                 status = "okay";
 182
 183                 gpio-sck = <&gpio4 15 GPIO_ACTIVE_HIGH>;
 184                 gpio-mosi = <&gpio4 12 GPIO_ACTIVE_HIGH>;
 185                 gpio-miso = <&gpio4 11 GPIO_ACTIVE_HIGH>;
 186                 num-chipselects = <1>;
 187                 cs-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
 188
 189                 eeprom@0 {
 190                         compatible = "eeprom-93xx46";
 191                         reg = <0>;
 192                         spi-max-frequency = <1000000>;
 193                         spi-cs-high;
 194                         data-size = <8>;
 195                 };
 196         };
 197
 198         mdio_gpio: mdio-gpio {
 199                 compatible = "virtual,mdio-gpio";
 200                 pinctrl-names = "default";
 201                 pinctrl-0 = <&pinctrl_swmdio>;
 202                 gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>, /* mdc */
 203                         <&gpio3 25 GPIO_ACTIVE_HIGH>; /* mdio */
 204
 205                 #address-cells = <1>;
 206                 #size-cells = <0>;
 207
 208                 switch@0 {
 209                         compatible = "marvell,mv88e6085";
 210                         #address-cells = <1>;
 211                         #size-cells = <0>;
 212                         reg = <0>;
 213                         dsa,member = <0 0>;
 214
 215                         ports {
 216                                 #address-cells = <1>;
 217                                 #size-cells = <0>;
 218
 219                                 port@0 {
 220                                         reg = <0>;
 221                                         label = "cpu";
 222                                         ethernet = <&fec>;
 223
 224                                         fixed-link {
 225                                                 speed = <100>;
 226                                                 full-duplex;
 227                                         };
 228                                 };
 229
 230                                 port@1 {
 231                                         reg = <1>;
 232                                         label = "netaux";
 233                                 };
 234
 235                                 port@3 {
 236                                         reg = <3>;
 237                                         label = "netright";
 238                                 };
 239
 240                                 port@4 {
 241                                         reg = <4>;
 242                                         label = "netleft";
 243                                 };
 244                         };
 245                 };
 246         };
 247
 248         sound {
 249                 compatible = "simple-audio-card";
 250                 simple-audio-card,name = "Front";
 251                 simple-audio-card,format = "i2s";
 252                 simple-audio-card,bitclock-master = <&sound_codec>;
 253                 simple-audio-card,frame-master = <&sound_codec>;
 254                 simple-audio-card,widgets =
 255                         "Headphone", "Headphone Jack";
 256                 simple-audio-card,routing =
 257                         "Headphone Jack", "HPLEFT",
 258                         "Headphone Jack", "HPRIGHT";
 259                 simple-audio-card,aux-devs = <&hpa1>;
 260
 261                 sound_cpu: simple-audio-card,cpu {
 262                         sound-dai = <&ssi2>;
 263                 };
 264
 265                 sound_codec: simple-audio-card,codec {
 266                         sound-dai = <&sgtl5000>;
 267                         clocks = <&clk_26M_snd>;
 268                 };
 269         };
 270
 271         usbh1phy: usbphy1 {
 272                 compatible = "usb-nop-xceiv";
 273                 pinctrl-names = "default";
 274                 pinctrl-0 = <&pinctrl_usbh1phy>;
 275                 clocks = <&clk_26M_usb>;
 276                 clock-names = "main_clk";
 277                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
 278                 vcc-supply = <&vusb_reg>;
 279                 #phy-cells = <0>;
 280         };
 281
 282         usbh2phy: usbphy2 {
 283                 compatible = "usb-nop-xceiv";
 284                 pinctrl-names = "default";
 285                 pinctrl-0 = <&pinctrl_usbh2phy>;
 286                 clocks = <&clk_26M_usb>;
 287                 clock-names = "main_clk";
 288                 reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
 289                 vcc-supply = <&vusb_reg>;
 290                 #phy-cells = <0>;
 291         };
 292 };
 293
 294 &audmux {
 295         pinctrl-names = "default";
 296         pinctrl-0 = <&pinctrl_audmux>;
 297         status = "okay";
 298
 299         ssi2 {
 300                 fsl,audmux-port = <1>;
 301                 fsl,port-config = <
 302                         (IMX_AUDMUX_V2_PTCR_SYN |
 303                          IMX_AUDMUX_V2_PTCR_TFSEL(2) |
 304                          IMX_AUDMUX_V2_PTCR_TCSEL(2) |
 305                          IMX_AUDMUX_V2_PTCR_TFSDIR |
 306                          IMX_AUDMUX_V2_PTCR_TCLKDIR)
 307                         IMX_AUDMUX_V2_PDCR_RXDSEL(2)
 308                 >;
 309         };
 310
 311         aud3 {
 312                 fsl,audmux-port = <2>;
 313                 fsl,port-config = <
 314                         IMX_AUDMUX_V2_PTCR_SYN
 315                         IMX_AUDMUX_V2_PDCR_RXDSEL(1)
 316                 >;
 317         };
 318 };
 319
 320 &cpu {
 321         cpu-supply = <&sw1_reg>;
 322 };
 323
 324 &ecspi1 {
 325         pinctrl-names = "default";
 326         pinctrl-0 = <&pinctrl_ecspi1>;
 327         cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
 328                    <&gpio4 25 GPIO_ACTIVE_LOW>;
 329         status = "okay";
 330
 331         pmic@0 {
 332                 compatible = "fsl,mc13892";
 333                 pinctrl-names = "default";
 334                 pinctrl-0 = <&pinctrl_pmic>;
 335                 spi-max-frequency = <6000000>;
 336                 spi-cs-high;
 337                 reg = <0>;
 338                 interrupt-parent = <&gpio1>;
 339                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
 340                 fsl,mc13xxx-uses-adc;
 341
 342                 regulators {
 343                         sw1_reg: sw1 {
 344                                 regulator-min-microvolt = <600000>;
 345                                 regulator-max-microvolt = <1375000>;
 346                                 regulator-boot-on;
 347                                 regulator-always-on;
 348                         };
 349
 350                         sw2_reg: sw2 {
 351                                 regulator-min-microvolt = <900000>;
 352                                 regulator-max-microvolt = <1850000>;
 353                                 regulator-boot-on;
 354                                 regulator-always-on;
 355                         };
 356
 357                         sw3_reg: sw3 {
 358                                 regulator-min-microvolt = <1100000>;
 359                                 regulator-max-microvolt = <1850000>;
 360                                 regulator-boot-on;
 361                                 regulator-always-on;
 362                         };
 363
 364                         sw4_reg: sw4 {
 365                                 regulator-min-microvolt = <1100000>;
 366                                 regulator-max-microvolt = <1850000>;
 367                                 regulator-boot-on;
 368                                 regulator-always-on;
 369                         };
 370
 371                         vpll_reg: vpll {
 372                                 regulator-min-microvolt = <1050000>;
 373                                 regulator-max-microvolt = <1800000>;
 374                                 regulator-boot-on;
 375                                 regulator-always-on;
 376                         };
 377
 378                         vdig_reg: vdig {
 379                                 regulator-min-microvolt = <1650000>;
 380                                 regulator-max-microvolt = <1650000>;
 381                                 regulator-boot-on;
 382                         };
 383
 384                         vsd_reg: vsd {
 385                                 regulator-min-microvolt = <1800000>;
 386                                 regulator-max-microvolt = <3150000>;
 387                         };
 388
 389                         vusb_reg: vusb {
 390                                 regulator-always-on;
 391                         };
 392
 393                         vusb2_reg: vusb2 {
 394                                 regulator-min-microvolt = <2400000>;
 395                                 regulator-max-microvolt = <2775000>;
 396                                 regulator-boot-on;
 397                                 regulator-always-on;
 398                         };
 399
 400                         vvideo_reg: vvideo {
 401                                 regulator-min-microvolt = <2775000>;
 402                                 regulator-max-microvolt = <2775000>;
 403                         };
 404
 405                         vaudio_reg: vaudio {
 406                                 regulator-min-microvolt = <2300000>;
 407                                 regulator-max-microvolt = <3000000>;
 408                         };
 409
 410                         vcam_reg: vcam {
 411                                 regulator-min-microvolt = <2500000>;
 412                                 regulator-max-microvolt = <3000000>;
 413                         };
 414
 415                         vgen1_reg: vgen1 {
 416                                 regulator-min-microvolt = <1200000>;
 417                                 regulator-max-microvolt = <1200000>;
 418                         };
 419
 420                         vgen2_reg: vgen2 {
 421                                 regulator-min-microvolt = <1200000>;
 422                                 regulator-max-microvolt = <3150000>;
 423                                 regulator-always-on;
 424                         };
 425
 426                         vgen3_reg: vgen3 {
 427                                 regulator-min-microvolt = <1800000>;
 428                                 regulator-max-microvolt = <2900000>;
 429                                 regulator-always-on;
 430                         };
 431                 };
 432
 433                 leds {
 434                         #address-cells = <1>;
 435                         #size-cells = <0>;
 436                         led-control = <0x0 0x0 0x3f83f8 0x0>;
 437
 438                         sysled0@3 {
 439                                 reg = <3>;
 440                                 label = "system:green:status";
 441                                 linux,default-trigger = "default-on";
 442                         };
 443
 444                         sysled1@4 {
 445                                 reg = <4>;
 446                                 label = "system:green:act";
 447                                 linux,default-trigger = "heartbeat";
 448                         };
 449                 };
 450         };
 451
 452         flash@1 {
 453                 #address-cells = <1>;
 454                 #size-cells = <1>;
 455                 compatible = "atmel,at45db642d", "atmel,at45", "atmel,dataflash";
 456                 spi-max-frequency = <25000000>;
 457                 reg = <1>;
 458         };
 459 };
 460
 461 &esdhc1 {
 462         pinctrl-names = "default";
 463         pinctrl-0 = <&pinctrl_esdhc1>;
 464         bus-width = <4>;
 465         non-removable;
 466         status = "okay";
 467 };
 468
 469 &fec {
 470         pinctrl-names = "default";
 471         pinctrl-0 = <&pinctrl_fec>;
 472         phy-mode = "mii";
 473         phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
 474         phy-supply = <&vgen3_reg>;
 475         status = "okay";
 476 };
 477
 478 &i2c2 {
 479         pinctrl-names = "default";
 480         pinctrl-0 = <&pinctrl_i2c2>;
 481         status = "okay";
 482
 483         eeprom@50 {
 484                 compatible = "atmel,24c04";
 485                 pagesize = <16>;
 486                 reg = <0x50>;
 487         };
 488
 489         hpa1: amp@60 {
 490                 compatible = "ti,tpa6130a2";
 491                 reg = <0x60>;
 492                 pinctrl-names = "default";
 493                 pinctrl-0 = <&pinctrl_ampgpio>;
 494                 power-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
 495                 Vdd-supply = <&reg_3p3v>;
 496         };
 497
 498         ds1341: rtc@68 {
 499                 compatible = "maxim,ds1341";
 500                 reg = <0x68>;
 501         };
 502
 503         /* touch nodes default disabled, bootloader will enable the right one */
 504
 505         touchscreen@4b {
 506                 compatible = "atmel,maxtouch";
 507                 reg = <0x4b>;
 508                 pinctrl-names = "default";
 509                 pinctrl-0 = <&pinctrl_ts>;
 510                 interrupt-parent = <&gpio3>;
 511                 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
 512                 status = "disabled";
 513         };
 514
 515         touchscreen@4c {
 516                 compatible = "atmel,maxtouch";
 517                 reg = <0x4c>;
 518                 pinctrl-names = "default";
 519                 pinctrl-0 = <&pinctrl_ts>;
 520                 interrupt-parent = <&gpio3>;
 521                 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
 522                 status = "disabled";
 523         };
 524
 525         touchscreen@20 {
 526                 compatible = "syna,rmi4-i2c";
 527                 reg = <0x20>;
 528                 pinctrl-names = "default";
 529                 pinctrl-0 = <&pinctrl_ts>;
 530                 interrupt-parent = <&gpio3>;
 531                 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
 532                 status = "disabled";
 533
 534                 #address-cells = <1>;
 535                 #size-cells = <0>;
 536
 537                 rmi4-f01@1 {
 538                         reg = <0x1>;
 539                         syna,nosleep-mode = <2>;
 540                 };
 541
 542                 rmi4-f11@11 {
 543                         reg = <0x11>;
 544                         touchscreen-inverted-y;
 545                         touchscreen-swapped-x-y;
 546                         syna,sensor-type = <1>;
 547                 };
 548         };
 549
 550 };
 551
 552 &ipu_di0_disp1 {
 553         remote-endpoint = <&display_in>;
 554 };
 555
 556 &ssi2 {
 557         status = "okay";
 558 };
 559
 560 &uart1 {
 561         pinctrl-names = "default";
 562         pinctrl-0 = <&pinctrl_uart1>;
 563         status = "okay";
 564 };
 565
 566 &uart2 {
 567         pinctrl-names = "default";
 568         pinctrl-0 = <&pinctrl_uart2>;
 569         status = "okay";
 570 };
 571
 572 &uart3 {
 573         pinctrl-names = "default";
 574         pinctrl-0 = <&pinctrl_uart3>;
 575         status = "okay";
 576
 577         rave-sp {
 578                 compatible = "zii,rave-sp-rdu1";
 579                 current-speed = <38400>;
 580
 581                 watchdog {
 582                         compatible = "zii,rave-sp-watchdog";
 583                 };
 584         };
 585 };
 586
 587 &usbh1 {
 588         pinctrl-names = "default";
 589         pinctrl-0 = <&pinctrl_usbh1>;
 590         dr_mode = "host";
 591         phy_type = "ulpi";
 592         fsl,usbphy = <&usbh1phy>;
 593         disable-over-current;
 594         vbus-supply = <&reg_5p0v_main>;
 595         status = "okay";
 596 };
 597
 598 &usbh2 {
 599         pinctrl-names = "default";
 600         pinctrl-0 = <&pinctrl_usbh2>;
 601         dr_mode = "host";
 602         phy_type = "ulpi";
 603         fsl,usbphy = <&usbh2phy>;
 604         disable-over-current;
 605         vbus-supply = <&reg_5p0v_main>;
 606         status = "okay";
 607 };
 608
 609 &usbphy0 {
 610         vcc-supply = <&vusb_reg>;
 611 };
 612
 613 &usbotg {
 614         dr_mode = "host";
 615         disable-over-current;
 616         phy_type = "utmi_wide";
 617         vbus-supply = <&reg_5p0v_main>;
 618         status = "okay";
 619 };
 620
 621 &iomuxc {
 622         pinctrl_ampgpio: ampgpiogrp {
 623                 fsl,pins = <
 624                         MX51_PAD_GPIO1_9__GPIO1_9               0x5e
 625                 >;
 626         };
 627
 628         pinctrl_audmux: audmuxgrp {
 629                 fsl,pins = <
 630                         MX51_PAD_AUD3_BB_TXD__AUD3_TXD          0xa5
 631                         MX51_PAD_AUD3_BB_RXD__AUD3_RXD          0x85
 632                         MX51_PAD_AUD3_BB_CK__AUD3_TXC           0xa5
 633                         MX51_PAD_AUD3_BB_FS__AUD3_TXFS          0x85
 634                 >;
 635         };
 636
 637         pinctrl_clk26mhz: clk26mhzgrp {
 638                 fsl,pins = <
 639                         MX51_PAD_DI1_PIN12__GPIO3_1             0x85
 640                 >;
 641         };
 642
 643         pinctrl_ecspi1: ecspi1grp {
 644                 fsl,pins = <
 645                         MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
 646                         MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
 647                         MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
 648                         MX51_PAD_CSPI1_SS0__GPIO4_24            0x85
 649                         MX51_PAD_CSPI1_SS1__GPIO4_25            0x85
 650                 >;
 651         };
 652
 653         pinctrl_esdhc1: esdhc1grp {
 654                 fsl,pins = <
 655                         MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
 656                         MX51_PAD_SD1_CLK__SD1_CLK               0x20d5
 657                         MX51_PAD_SD1_DATA0__SD1_DATA0           0x20d5
 658                         MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
 659                         MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
 660                         MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
 661                 >;
 662         };
 663
 664         pinctrl_fec: fecgrp {
 665                 fsl,pins = <
 666                         MX51_PAD_EIM_EB2__FEC_MDIO              0x1f5
 667                         MX51_PAD_NANDF_D9__FEC_RDATA0           0x2180
 668                         MX51_PAD_EIM_EB3__FEC_RDATA1            0x180
 669                         MX51_PAD_EIM_CS2__FEC_RDATA2            0x180
 670                         MX51_PAD_EIM_CS3__FEC_RDATA3            0x180
 671                         MX51_PAD_EIM_CS4__FEC_RX_ER             0x180
 672                         MX51_PAD_NANDF_D11__FEC_RX_DV           0x2084
 673                         MX51_PAD_EIM_CS5__FEC_CRS               0x180
 674                         MX51_PAD_NANDF_RB2__FEC_COL             0x2180
 675                         MX51_PAD_NANDF_RB3__FEC_RX_CLK          0x2180
 676                         MX51_PAD_NANDF_CS2__FEC_TX_ER           0x2004
 677                         MX51_PAD_NANDF_CS3__FEC_MDC             0x2004
 678                         MX51_PAD_NANDF_D8__FEC_TDATA0           0x2180
 679                         MX51_PAD_NANDF_CS4__FEC_TDATA1          0x2004
 680                         MX51_PAD_NANDF_CS5__FEC_TDATA2          0x2004
 681                         MX51_PAD_NANDF_CS6__FEC_TDATA3          0x2004
 682                         MX51_PAD_DISP2_DAT9__FEC_TX_EN          0x2004
 683                         MX51_PAD_DISP2_DAT13__FEC_TX_CLK        0x2180
 684                         MX51_PAD_EIM_A20__GPIO2_14              0x85
 685                 >;
 686         };
 687
 688         pinctrl_gpiospi0: gpiospi0grp {
 689                 fsl,pins = <
 690                         MX51_PAD_CSI2_D18__GPIO4_11             0x85
 691                         MX51_PAD_CSI2_D19__GPIO4_12             0x85
 692                         MX51_PAD_CSI2_HSYNC__GPIO4_14           0x85
 693                         MX51_PAD_CSI2_PIXCLK__GPIO4_15          0x85
 694                 >;
 695         };
 696
 697         pinctrl_i2c2: i2c2grp {
 698                 fsl,pins = <
 699                         MX51_PAD_KEY_COL4__I2C2_SCL             0x400001ed
 700                         MX51_PAD_KEY_COL5__I2C2_SDA             0x400001ed
 701                 >;
 702         };
 703
 704         pinctrl_ipu_disp1: ipudisp1grp {
 705                 fsl,pins = <
 706                         MX51_PAD_DISP1_DAT0__DISP1_DAT0         0x5
 707                         MX51_PAD_DISP1_DAT1__DISP1_DAT1         0x5
 708                         MX51_PAD_DISP1_DAT2__DISP1_DAT2         0x5
 709                         MX51_PAD_DISP1_DAT3__DISP1_DAT3         0x5
 710                         MX51_PAD_DISP1_DAT4__DISP1_DAT4         0x5
 711                         MX51_PAD_DISP1_DAT5__DISP1_DAT5         0x5
 712                         MX51_PAD_DISP1_DAT6__DISP1_DAT6         0x5
 713                         MX51_PAD_DISP1_DAT7__DISP1_DAT7         0x5
 714                         MX51_PAD_DISP1_DAT8__DISP1_DAT8         0x5
 715                         MX51_PAD_DISP1_DAT9__DISP1_DAT9         0x5
 716                         MX51_PAD_DISP1_DAT10__DISP1_DAT10       0x5
 717                         MX51_PAD_DISP1_DAT11__DISP1_DAT11       0x5
 718                         MX51_PAD_DISP1_DAT12__DISP1_DAT12       0x5
 719                         MX51_PAD_DISP1_DAT13__DISP1_DAT13       0x5
 720                         MX51_PAD_DISP1_DAT14__DISP1_DAT14       0x5
 721                         MX51_PAD_DISP1_DAT15__DISP1_DAT15       0x5
 722                         MX51_PAD_DISP1_DAT16__DISP1_DAT16       0x5
 723                         MX51_PAD_DISP1_DAT17__DISP1_DAT17       0x5
 724                         MX51_PAD_DISP1_DAT18__DISP1_DAT18       0x5
 725                         MX51_PAD_DISP1_DAT19__DISP1_DAT19       0x5
 726                         MX51_PAD_DISP1_DAT20__DISP1_DAT20       0x5
 727                         MX51_PAD_DISP1_DAT21__DISP1_DAT21       0x5
 728                         MX51_PAD_DISP1_DAT22__DISP1_DAT22       0x5
 729                         MX51_PAD_DISP1_DAT23__DISP1_DAT23       0x5
 730                         MX51_PAD_DI1_PIN2__DI1_PIN2             0x5
 731                         MX51_PAD_DI1_PIN3__DI1_PIN3             0x5
 732                         MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK     0x5
 733                 >;
 734         };
 735
 736         pinctrl_panel: panelgrp {
 737                 fsl,pins = <
 738                         MX51_PAD_DI1_D0_CS__GPIO3_3             0x85
 739                 >;
 740         };
 741
 742         pinctrl_pmic: pmicgrp {
 743                 fsl,pins = <
 744                         MX51_PAD_GPIO1_4__GPIO1_4               0x1e0
 745                         MX51_PAD_GPIO1_8__GPIO1_8               0x21e2
 746                 >;
 747         };
 748
 749         pinctrl_sndgate26mhz: sndgate26mhzgrp {
 750                 fsl,pins = <
 751                         MX51_PAD_CSPI1_RDY__GPIO4_26            0x85
 752                 >;
 753         };
 754
 755         pinctrl_swi2c: swi2cgrp {
 756                 fsl,pins = <
 757                         MX51_PAD_GPIO1_2__GPIO1_2               0xc5
 758                         MX51_PAD_DI1_D1_CS__GPIO3_4             0x400001f5
 759                 >;
 760         };
 761
 762         pinctrl_swmdio: swmdiogrp {
 763                 fsl,pins = <
 764                         MX51_PAD_NANDF_D14__GPIO3_26            0x21e6
 765                         MX51_PAD_NANDF_D15__GPIO3_25            0x21e6
 766                 >;
 767         };
 768
 769         pinctrl_ts: tsgrp {
 770                 fsl,pins = <
 771                         MX51_PAD_CSI1_D8__GPIO3_12              0x85
 772                         MX51_PAD_CSI1_D9__GPIO3_13              0x85
 773                 >;
 774         };
 775
 776         pinctrl_uart1: uart1grp {
 777                 fsl,pins = <
 778                         MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
 779                         MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
 780                         MX51_PAD_UART1_RTS__UART1_RTS           0x1c4
 781                         MX51_PAD_UART1_CTS__UART1_CTS           0x1c4
 782                 >;
 783         };
 784
 785         pinctrl_uart2: uart2grp {
 786                 fsl,pins = <
 787                         MX51_PAD_UART2_RXD__UART2_RXD           0xc5
 788                         MX51_PAD_UART2_TXD__UART2_TXD           0xc5
 789                 >;
 790         };
 791
 792         pinctrl_uart3: uart3grp {
 793                 fsl,pins = <
 794                         MX51_PAD_EIM_D25__UART3_RXD             0x1c5
 795                         MX51_PAD_EIM_D26__UART3_TXD             0x1c5
 796                 >;
 797         };
 798
 799         pinctrl_usbgate26mhz: usbgate26mhzgrp {
 800                 fsl,pins = <
 801                         MX51_PAD_DISP2_DAT6__GPIO1_19           0x85
 802                 >;
 803         };
 804
 805         pinctrl_usbh1: usbh1grp {
 806                 fsl,pins = <
 807                         MX51_PAD_USBH1_STP__USBH1_STP           0x0
 808                         MX51_PAD_USBH1_CLK__USBH1_CLK           0x0
 809                         MX51_PAD_USBH1_DIR__USBH1_DIR           0x0
 810                         MX51_PAD_USBH1_NXT__USBH1_NXT           0x0
 811                         MX51_PAD_USBH1_DATA0__USBH1_DATA0       0x0
 812                         MX51_PAD_USBH1_DATA1__USBH1_DATA1       0x0
 813                         MX51_PAD_USBH1_DATA2__USBH1_DATA2       0x0
 814                         MX51_PAD_USBH1_DATA3__USBH1_DATA3       0x0
 815                         MX51_PAD_USBH1_DATA4__USBH1_DATA4       0x0
 816                         MX51_PAD_USBH1_DATA5__USBH1_DATA5       0x0
 817                         MX51_PAD_USBH1_DATA6__USBH1_DATA6       0x0
 818                         MX51_PAD_USBH1_DATA7__USBH1_DATA7       0x0
 819                 >;
 820         };
 821
 822         pinctrl_usbh1phy: usbh1phygrp {
 823                 fsl,pins = <
 824                         MX51_PAD_NANDF_D0__GPIO4_8              0x85
 825                 >;
 826         };
 827
 828         pinctrl_usbh2: usbh2grp {
 829                 fsl,pins = <
 830                         MX51_PAD_EIM_A26__USBH2_STP             0x0
 831                         MX51_PAD_EIM_A24__USBH2_CLK             0x0
 832                         MX51_PAD_EIM_A25__USBH2_DIR             0x0
 833                         MX51_PAD_EIM_A27__USBH2_NXT             0x0
 834                         MX51_PAD_EIM_D16__USBH2_DATA0           0x0
 835                         MX51_PAD_EIM_D17__USBH2_DATA1           0x0
 836                         MX51_PAD_EIM_D18__USBH2_DATA2           0x0
 837                         MX51_PAD_EIM_D19__USBH2_DATA3           0x0
 838                         MX51_PAD_EIM_D20__USBH2_DATA4           0x0
 839                         MX51_PAD_EIM_D21__USBH2_DATA5           0x0
 840                         MX51_PAD_EIM_D22__USBH2_DATA6           0x0
 841                         MX51_PAD_EIM_D23__USBH2_DATA7           0x0
 842                 >;
 843         };
 844
 845         pinctrl_usbh2phy: usbh2phygrp {
 846                 fsl,pins = <
 847                         MX51_PAD_NANDF_D1__GPIO4_7              0x85
 848                 >;
 849         };
 850 };