2 * Copyright (C) 2017 Zodiac Inflight Innovations
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/sound/fsl-imx-audmux.h>
47 model = "ZII RDU1 Board";
48 compatible = "zii,imx51-rdu1", "fsl,imx51";
55 mdio-gpio0 = &mdio_gpio;
59 clk_26M_osc: 26M_osc {
60 compatible = "fixed-clock";
62 clock-frequency = <26000000>;
65 clk_26M_osc_gate: 26M_gate {
66 compatible = "gpio-gate-clock";
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_clk26mhz>;
69 clocks = <&clk_26M_osc>;
71 enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
74 clk_26M_usb: usbhost_gate {
75 compatible = "gpio-gate-clock";
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_usbgate26mhz>;
78 clocks = <&clk_26M_osc_gate>;
80 enable-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
83 clk_26M_snd: snd_gate {
84 compatible = "gpio-gate-clock";
85 pinctrl-names = "default";
86 pinctrl-0 = <&pinctrl_sndgate26mhz>;
87 clocks = <&clk_26M_osc_gate>;
89 enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
92 reg_5p0v_main: regulator-5p0v-main {
93 compatible = "regulator-fixed";
94 regulator-name = "5V_MAIN";
95 regulator-min-microvolt = <5000000>;
96 regulator-max-microvolt = <5000000>;
100 reg_3p3v: regulator-3p3v {
101 compatible = "regulator-fixed";
102 regulator-name = "3.3V";
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
109 compatible = "fsl,imx-parallel-display";
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_ipu_disp1>;
113 #address-cells = <1>;
119 display_in: endpoint {
120 remote-endpoint = <&ipu_di0_disp1>;
127 display_out: endpoint {
128 remote-endpoint = <&panel_in>;
134 /* no compatible here, bootloader will patch in correct one */
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_panel>;
137 power-supply = <®_3p3v>;
138 enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
143 remote-endpoint = <&display_out>;
149 compatible = "i2c-gpio";
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_swi2c>;
152 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>, /* sda */
153 <&gpio3 4 GPIO_ACTIVE_HIGH>; /* scl */
154 i2c-gpio,delay-us = <50>;
157 #address-cells = <1>;
161 compatible = "fsl,sgtl5000";
163 clocks = <&clk_26M_snd>;
164 VDDA-supply = <&vdig_reg>;
165 VDDIO-supply = <&vvideo_reg>;
166 #sound-dai-cells = <0>;
171 compatible = "spi-gpio";
172 #address-cells = <1>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_gpiospi0>;
178 gpio-sck = <&gpio4 15 GPIO_ACTIVE_HIGH>;
179 gpio-mosi = <&gpio4 12 GPIO_ACTIVE_HIGH>;
180 gpio-miso = <&gpio4 11 GPIO_ACTIVE_HIGH>;
181 num-chipselects = <1>;
182 cs-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
185 compatible = "eeprom-93xx46";
187 spi-max-frequency = <1000000>;
193 mdio_gpio: mdio-gpio {
194 compatible = "virtual,mdio-gpio";
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_swmdio>;
197 gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>, /* mdc */
198 <&gpio3 25 GPIO_ACTIVE_HIGH>; /* mdio */
200 #address-cells = <1>;
204 compatible = "marvell,mv88e6085";
205 #address-cells = <1>;
211 #address-cells = <1>;
244 compatible = "simple-audio-card";
245 simple-audio-card,name = "RDU1 audio";
246 simple-audio-card,format = "i2s";
247 simple-audio-card,bitclock-master = <&sound_codec>;
248 simple-audio-card,frame-master = <&sound_codec>;
249 simple-audio-card,widgets =
250 "Headphone", "Headphone Jack";
251 simple-audio-card,routing =
252 "Headphone Jack", "HPLEFT",
253 "Headphone Jack", "HPRIGHT";
254 simple-audio-card,aux-devs = <&tpa6130a2>;
256 sound_cpu: simple-audio-card,cpu {
260 sound_codec: simple-audio-card,codec {
261 sound-dai = <&sgtl5000>;
262 clocks = <&clk_26M_snd>;
267 compatible = "usb-nop-xceiv";
268 pinctrl-names = "default";
269 pinctrl-0 = <&pinctrl_usbh1phy>;
270 clocks = <&clk_26M_usb>;
271 clock-names = "main_clk";
272 reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
273 vcc-supply = <&vusb_reg>;
277 compatible = "usb-nop-xceiv";
278 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_usbh2phy>;
280 clocks = <&clk_26M_usb>;
281 clock-names = "main_clk";
282 reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
283 vcc-supply = <&vusb_reg>;
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_audmux>;
293 fsl,audmux-port = <1>;
295 (IMX_AUDMUX_V2_PTCR_SYN |
296 IMX_AUDMUX_V2_PTCR_TFSEL(2) |
297 IMX_AUDMUX_V2_PTCR_TCSEL(2) |
298 IMX_AUDMUX_V2_PTCR_TFSDIR |
299 IMX_AUDMUX_V2_PTCR_TCLKDIR)
300 IMX_AUDMUX_V2_PDCR_RXDSEL(2)
305 fsl,audmux-port = <2>;
307 IMX_AUDMUX_V2_PTCR_SYN
308 IMX_AUDMUX_V2_PDCR_RXDSEL(1)
314 cpu-supply = <&sw1_reg>;
318 pinctrl-names = "default";
319 pinctrl-0 = <&pinctrl_ecspi1>;
320 cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
321 <&gpio4 25 GPIO_ACTIVE_LOW>;
325 compatible = "fsl,mc13892";
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_pmic>;
328 spi-max-frequency = <6000000>;
331 interrupt-parent = <&gpio1>;
332 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
333 fsl,mc13xxx-uses-adc;
337 regulator-min-microvolt = <600000>;
338 regulator-max-microvolt = <1375000>;
344 regulator-min-microvolt = <900000>;
345 regulator-max-microvolt = <1850000>;
351 regulator-min-microvolt = <1100000>;
352 regulator-max-microvolt = <1850000>;
358 regulator-min-microvolt = <1100000>;
359 regulator-max-microvolt = <1850000>;
365 regulator-min-microvolt = <1050000>;
366 regulator-max-microvolt = <1800000>;
372 regulator-min-microvolt = <1650000>;
373 regulator-max-microvolt = <1650000>;
378 regulator-min-microvolt = <1800000>;
379 regulator-max-microvolt = <3150000>;
387 regulator-min-microvolt = <2400000>;
388 regulator-max-microvolt = <2775000>;
394 regulator-min-microvolt = <2775000>;
395 regulator-max-microvolt = <2775000>;
399 regulator-min-microvolt = <2300000>;
400 regulator-max-microvolt = <3000000>;
404 regulator-min-microvolt = <2500000>;
405 regulator-max-microvolt = <3000000>;
409 regulator-min-microvolt = <1200000>;
410 regulator-max-microvolt = <1200000>;
414 regulator-min-microvolt = <1200000>;
415 regulator-max-microvolt = <3150000>;
420 regulator-min-microvolt = <1800000>;
421 regulator-max-microvolt = <2900000>;
427 #address-cells = <1>;
429 led-control = <0x0 0x0 0x3f83f8 0x0>;
433 label = "system:green:status";
434 linux,default-trigger = "default-on";
439 label = "system:green:act";
440 linux,default-trigger = "heartbeat";
446 #address-cells = <1>;
448 compatible = "atmel,at45db642d", "atmel,at45", "atmel,dataflash";
449 spi-max-frequency = <25000000>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&pinctrl_esdhc1>;
463 pinctrl-names = "default";
464 pinctrl-0 = <&pinctrl_fec>;
466 phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
467 phy-supply = <&vgen3_reg>;
472 pinctrl-names = "default";
473 pinctrl-0 = <&pinctrl_i2c2>;
477 compatible = "atmel,24c04";
483 compatible = "ti,tpa6130a2";
485 pinctrl-names = "default";
486 pinctrl-0 = <&pinctrl_ampgpio>;
487 power-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
488 Vdd-supply = <®_3p3v>;
492 compatible = "maxim,ds1341";
496 /* touch nodes default disabled, bootloader will enable the right one */
499 compatible = "atmel,maxtouch";
501 pinctrl-names = "default";
502 pinctrl-0 = <&pinctrl_ts>;
503 interrupt-parent = <&gpio3>;
504 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
509 compatible = "atmel,maxtouch";
511 pinctrl-names = "default";
512 pinctrl-0 = <&pinctrl_ts>;
513 interrupt-parent = <&gpio3>;
514 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
519 compatible = "syna,rmi4_i2c";
521 pinctrl-names = "default";
522 pinctrl-0 = <&pinctrl_ts>;
523 interrupt-parent = <&gpio3>;
524 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
527 #address-cells = <1>;
532 syna,nosleep-mode = <2>;
539 syna,sensor-type = <1>;
546 remote-endpoint = <&display_in>;
554 pinctrl-names = "default";
555 pinctrl-0 = <&pinctrl_uart1>;
560 pinctrl-names = "default";
561 pinctrl-0 = <&pinctrl_uart2>;
566 pinctrl-names = "default";
567 pinctrl-0 = <&pinctrl_uart3>;
572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_usbh1>;
576 fsl,usbphy = <&usbh1phy>;
577 disable-over-current;
578 vbus-supply = <®_5p0v_main>;
583 pinctrl-names = "default";
584 pinctrl-0 = <&pinctrl_usbh2>;
587 fsl,usbphy = <&usbh2phy>;
588 disable-over-current;
589 vbus-supply = <®_5p0v_main>;
594 vcc-supply = <&vusb_reg>;
599 disable-over-current;
600 phy_type = "utmi_wide";
601 vbus-supply = <®_5p0v_main>;
606 pinctrl_ampgpio: ampgpiogrp {
608 MX51_PAD_GPIO1_9__GPIO1_9 0x5e
612 pinctrl_audmux: audmuxgrp {
614 MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0xa5
615 MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x85
616 MX51_PAD_AUD3_BB_CK__AUD3_TXC 0xa5
617 MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x85
621 pinctrl_clk26mhz: clk26mhzgrp {
623 MX51_PAD_DI1_PIN12__GPIO3_1 0x85
627 pinctrl_ecspi1: ecspi1grp {
629 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
630 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
631 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
632 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
633 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
637 pinctrl_esdhc1: esdhc1grp {
639 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
640 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
641 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
642 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
643 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
644 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
648 pinctrl_fec: fecgrp {
650 MX51_PAD_EIM_EB2__FEC_MDIO 0x1f5
651 MX51_PAD_NANDF_D9__FEC_RDATA0 0x2180
652 MX51_PAD_EIM_EB3__FEC_RDATA1 0x180
653 MX51_PAD_EIM_CS2__FEC_RDATA2 0x180
654 MX51_PAD_EIM_CS3__FEC_RDATA3 0x180
655 MX51_PAD_EIM_CS4__FEC_RX_ER 0x180
656 MX51_PAD_NANDF_D11__FEC_RX_DV 0x2084
657 MX51_PAD_EIM_CS5__FEC_CRS 0x180
658 MX51_PAD_NANDF_RB2__FEC_COL 0x2180
659 MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x2180
660 MX51_PAD_NANDF_CS2__FEC_TX_ER 0x2004
661 MX51_PAD_NANDF_CS3__FEC_MDC 0x2004
662 MX51_PAD_NANDF_D8__FEC_TDATA0 0x2180
663 MX51_PAD_NANDF_CS4__FEC_TDATA1 0x2004
664 MX51_PAD_NANDF_CS5__FEC_TDATA2 0x2004
665 MX51_PAD_NANDF_CS6__FEC_TDATA3 0x2004
666 MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x2004
667 MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x2180
668 MX51_PAD_EIM_A20__GPIO2_14 0x85
672 pinctrl_gpiospi0: gpiospi0grp {
674 MX51_PAD_CSI2_D18__GPIO4_11 0x85
675 MX51_PAD_CSI2_D19__GPIO4_12 0x85
676 MX51_PAD_CSI2_HSYNC__GPIO4_14 0x85
677 MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x85
681 pinctrl_i2c2: i2c2grp {
683 MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
684 MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed
688 pinctrl_ipu_disp1: ipudisp1grp {
690 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
691 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
692 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
693 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
694 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
695 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
696 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
697 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
698 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
699 MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
700 MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
701 MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
702 MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
703 MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
704 MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
705 MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
706 MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
707 MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
708 MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
709 MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
710 MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
711 MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
712 MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
713 MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
714 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
715 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
716 MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK 0x5
720 pinctrl_panel: panelgrp {
722 MX51_PAD_DI1_D0_CS__GPIO3_3 0x85
726 pinctrl_pmic: pmicgrp {
728 MX51_PAD_GPIO1_4__GPIO1_4 0x1e0
729 MX51_PAD_GPIO1_8__GPIO1_8 0x21e2
733 pinctrl_sndgate26mhz: sndgate26mhzgrp {
735 MX51_PAD_CSPI1_RDY__GPIO4_26 0x85
739 pinctrl_swi2c: swi2cgrp {
741 MX51_PAD_GPIO1_2__GPIO1_2 0xc5
742 MX51_PAD_DI1_D1_CS__GPIO3_4 0x400001f5
746 pinctrl_swmdio: swmdiogrp {
748 MX51_PAD_NANDF_D14__GPIO3_26 0x21e6
749 MX51_PAD_NANDF_D15__GPIO3_25 0x21e6
755 MX51_PAD_CSI1_D8__GPIO3_12 0x85
756 MX51_PAD_CSI1_D9__GPIO3_13 0x85
760 pinctrl_uart1: uart1grp {
762 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
763 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
764 MX51_PAD_UART1_RTS__UART1_RTS 0x1c4
765 MX51_PAD_UART1_CTS__UART1_CTS 0x1c4
769 pinctrl_uart2: uart2grp {
771 MX51_PAD_UART2_RXD__UART2_RXD 0xc5
772 MX51_PAD_UART2_TXD__UART2_TXD 0xc5
776 pinctrl_uart3: uart3grp {
778 MX51_PAD_EIM_D25__UART3_RXD 0x1c5
779 MX51_PAD_EIM_D26__UART3_TXD 0x1c5
783 pinctrl_usbgate26mhz: usbgate26mhzgrp {
785 MX51_PAD_DISP2_DAT6__GPIO1_19 0x85
789 pinctrl_usbh1: usbh1grp {
791 MX51_PAD_USBH1_STP__USBH1_STP 0x0
792 MX51_PAD_USBH1_CLK__USBH1_CLK 0x0
793 MX51_PAD_USBH1_DIR__USBH1_DIR 0x0
794 MX51_PAD_USBH1_NXT__USBH1_NXT 0x0
795 MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x0
796 MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x0
797 MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x0
798 MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x0
799 MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x0
800 MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x0
801 MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x0
802 MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x0
806 pinctrl_usbh1phy: usbh1phygrp {
808 MX51_PAD_NANDF_D0__GPIO4_8 0x85
812 pinctrl_usbh2: usbh2grp {
814 MX51_PAD_EIM_A26__USBH2_STP 0x0
815 MX51_PAD_EIM_A24__USBH2_CLK 0x0
816 MX51_PAD_EIM_A25__USBH2_DIR 0x0
817 MX51_PAD_EIM_A27__USBH2_NXT 0x0
818 MX51_PAD_EIM_D16__USBH2_DATA0 0x0
819 MX51_PAD_EIM_D17__USBH2_DATA1 0x0
820 MX51_PAD_EIM_D18__USBH2_DATA2 0x0
821 MX51_PAD_EIM_D19__USBH2_DATA3 0x0
822 MX51_PAD_EIM_D20__USBH2_DATA4 0x0
823 MX51_PAD_EIM_D21__USBH2_DATA5 0x0
824 MX51_PAD_EIM_D22__USBH2_DATA6 0x0
825 MX51_PAD_EIM_D23__USBH2_DATA7 0x0
829 pinctrl_usbh2phy: usbh2phygrp {
831 MX51_PAD_NANDF_D1__GPIO4_7 0x85