2 * Copyright 2014-2017 Toradex AG
3 * Copyright 2012 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd.
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/gpio/gpio.h>
47 model = "Toradex Apalis iMX6Q/D Module";
48 compatible = "toradex,apalis_imx6q", "fsl,imx6q";
50 /* Will be filled by the bootloader */
52 device_type = "memory";
56 backlight: backlight {
57 compatible = "pwm-backlight";
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_gpio_bl_on>;
60 pwms = <&pwm4 0 5000000>;
61 enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
65 reg_module_3v3: regulator-module-3v3 {
66 compatible = "regulator-fixed";
67 regulator-name = "+V3.3";
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
73 reg_module_3v3_audio: regulator-module-3v3-audio {
74 compatible = "regulator-fixed";
75 regulator-name = "+V3.3_AUDIO";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
81 reg_usb_otg_vbus: regulator-usb-otg-vbus {
82 compatible = "regulator-fixed";
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_regulator_usbotg_pwr>;
85 regulator-name = "usb_otg_vbus";
86 regulator-min-microvolt = <5000000>;
87 regulator-max-microvolt = <5000000>;
88 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
93 /* on module USB hub */
94 reg_usb_host_vbus_hub: regulator-usb-host-vbus-hub {
95 compatible = "regulator-fixed";
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_regulator_usbhub_pwr>;
98 regulator-name = "usb_host_vbus_hub";
99 regulator-min-microvolt = <5000000>;
100 regulator-max-microvolt = <5000000>;
101 gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>;
102 startup-delay-us = <2000>;
107 reg_usb_host_vbus: regulator-usb-host-vbus {
108 compatible = "regulator-fixed";
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
111 regulator-name = "usb_host_vbus";
112 regulator-min-microvolt = <5000000>;
113 regulator-max-microvolt = <5000000>;
114 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
116 vin-supply = <®_usb_host_vbus_hub>;
121 compatible = "fsl,imx-audio-sgtl5000";
122 model = "imx6q-apalis-sgtl5000";
123 ssi-controller = <&ssi1>;
124 audio-codec = <&codec>;
126 "LINE_IN", "Line In Jack",
127 "MIC_IN", "Mic Jack",
128 "Mic Jack", "Mic Bias",
129 "Headphone Jack", "HP_OUT";
134 sound_spdif: sound-spdif {
135 compatible = "fsl,imx-audio-spdif";
137 spdif-controller = <&spdif>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_audmux>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_flexcan1>;
157 pinctrl-names = "default";
158 pinctrl-0 = <&pinctrl_flexcan2>;
164 cs-gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_ecspi1>;
172 cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_ecspi2>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_enet>;
182 phy-handle = <ðphy>;
183 phy-reset-duration = <10>;
184 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
188 #address-cells = <1>;
191 ethphy: ethernet-phy@7 {
192 interrupt-parent = <&gpio1>;
193 interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_hdmi_ddc>;
205 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
207 clock-frequency = <100000>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&pinctrl_i2c1>;
214 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
215 * touch screen controller
218 clock-frequency = <100000>;
219 pinctrl-names = "default";
220 pinctrl-0 = <&pinctrl_i2c2>;
224 compatible = "fsl,pfuze100";
229 regulator-min-microvolt = <300000>;
230 regulator-max-microvolt = <1875000>;
233 regulator-ramp-delay = <6250>;
237 regulator-min-microvolt = <300000>;
238 regulator-max-microvolt = <1875000>;
241 regulator-ramp-delay = <6250>;
245 regulator-min-microvolt = <400000>;
246 regulator-max-microvolt = <1975000>;
252 regulator-min-microvolt = <5000000>;
253 regulator-max-microvolt = <5150000>;
259 regulator-min-microvolt = <1000000>;
260 regulator-max-microvolt = <3000000>;
271 regulator-min-microvolt = <800000>;
272 regulator-max-microvolt = <1550000>;
278 regulator-min-microvolt = <800000>;
279 regulator-max-microvolt = <1550000>;
285 regulator-min-microvolt = <1800000>;
286 regulator-max-microvolt = <3300000>;
292 regulator-min-microvolt = <1800000>;
293 regulator-max-microvolt = <1800000>;
299 regulator-min-microvolt = <1800000>;
300 regulator-max-microvolt = <3300000>;
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <3300000>;
315 compatible = "fsl,sgtl5000";
317 clocks = <&clks IMX6QDL_CLK_CKO>;
318 VDDA-supply = <®_module_3v3_audio>;
319 VDDIO-supply = <®_module_3v3>;
320 VDDD-supply = <&vgen4_reg>;
323 /* STMPE811 touch screen controller */
325 compatible = "st,stmpe811";
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_touch_int>;
329 interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
330 interrupt-parent = <&gpio4>;
331 interrupt-controller;
337 compatible = "st,stmpe-ts";
338 /* 3.25 MHz ADC clock speed */
340 /* 8 sample average control */
342 /* 7 length fractional part in z */
345 * 50 mA typical 80 mA max touchscreen drivers
346 * current limit value
351 /* internal ADC reference */
353 /* ADC converstion time: 80 clocks */
354 st,sample-time = <4>;
355 /* 1 ms panel driver settling time */
357 /* 5 ms touch detect interrupt delay */
358 st,touch-det-delay = <5>;
364 * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
368 clock-frequency = <100000>;
369 pinctrl-names = "default", "recovery";
370 pinctrl-0 = <&pinctrl_i2c3>;
371 pinctrl-1 = <&pinctrl_i2c3_recovery>;
372 scl-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
373 sda-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
378 pinctrl-names = "default";
379 pinctrl-0 = <&pinctrl_pwm1>;
384 pinctrl-names = "default";
385 pinctrl-0 = <&pinctrl_pwm2>;
390 pinctrl-names = "default";
391 pinctrl-0 = <&pinctrl_pwm3>;
396 pinctrl-names = "default";
397 pinctrl-0 = <&pinctrl_pwm4>;
402 pinctrl-names = "default";
403 pinctrl-0 = <&pinctrl_spdif>;
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
420 pinctrl-names = "default";
421 pinctrl-0 = <&pinctrl_uart2_dte>;
428 pinctrl-names = "default";
429 pinctrl-0 = <&pinctrl_uart4_dte>;
435 pinctrl-names = "default";
436 pinctrl-0 = <&pinctrl_uart5_dte>;
442 pinctrl-names = "default";
443 pinctrl-0 = <&pinctrl_usbotg>;
444 disable-over-current;
450 pinctrl-names = "default";
451 pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit>;
452 vqmmc-supply = <®_module_3v3>;
461 pinctrl-names = "default";
462 pinctrl-0 = <&pinctrl_usdhc2>;
463 vqmmc-supply = <®_module_3v3>;
472 pinctrl-names = "default";
473 pinctrl-0 = <&pinctrl_usdhc3>;
474 vqmmc-supply = <®_module_3v3>;
486 pinctrl_apalis_gpio1: gpio2io04grp {
488 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0
492 pinctrl_apalis_gpio2: gpio2io05grp {
494 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x130b0
498 pinctrl_apalis_gpio3: gpio2io06grp {
500 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x130b0
504 pinctrl_apalis_gpio4: gpio2io07grp {
506 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x130b0
510 pinctrl_apalis_gpio5: gpio6io10grp {
512 MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x130b0
516 pinctrl_apalis_gpio6: gpio6io09grp {
518 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x130b0
522 pinctrl_apalis_gpio7: gpio1io02grp {
524 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b0
528 pinctrl_apalis_gpio8: gpio1io06grp {
530 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x130b0
534 pinctrl_audmux: audmuxgrp {
536 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
537 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
538 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
539 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
540 /* SGTL5000 sys_mclk */
541 MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
545 pinctrl_cam_mclk: cammclkgrp {
548 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x00b0
552 pinctrl_ecspi1: ecspi1grp {
554 MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x100b1
555 MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x100b1
556 MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x100b1
558 MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 0x000b1
562 pinctrl_ecspi2: ecspi2grp {
564 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
565 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
566 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
568 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1
572 pinctrl_enet: enetgrp {
574 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
575 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
576 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
577 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
578 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
579 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
580 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
581 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
582 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
583 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
584 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
585 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
586 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
587 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
588 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
589 /* Ethernet PHY reset */
590 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0
591 /* Ethernet PHY interrupt */
592 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x000b1
596 pinctrl_flexcan1: flexcan1grp {
598 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
599 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
603 pinctrl_flexcan2: flexcan2grp {
605 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
606 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
610 pinctrl_gpio_bl_on: gpioblon {
612 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0
616 pinctrl_gpio_keys: gpio1io04grp {
619 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
623 pinctrl_hdmi_cec: hdmicecgrp {
625 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
629 pinctrl_hdmi_ddc: hdmiddcgrp {
631 MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1
632 MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1
636 pinctrl_i2c1: i2c1grp {
638 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
639 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
643 pinctrl_i2c2: i2c2grp {
645 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
646 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
650 pinctrl_i2c3: i2c3grp {
652 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
653 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
657 pinctrl_i2c3_recovery: i2c3recoverygrp {
659 MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x4001b8b1
660 MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x4001b8b1
664 pinctrl_ipu1_csi0: ipu1csi0grp { /* parallel camera */
666 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0xb0b1
667 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0xb0b1
668 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0xb0b1
669 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0xb0b1
670 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0xb0b1
671 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0xb0b1
672 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0xb0b1
673 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0xb0b1
674 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0xb0b1
675 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0xb0b1
676 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0xb0b1
680 pinctrl_ipu1_lcdif: ipu1lcdifgrp {
682 MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK 0x61
684 MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15 0x61
686 MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02 0x61
688 MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03 0x61
689 MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00 0x61
690 MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01 0x61
691 MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02 0x61
692 MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03 0x61
693 MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04 0x61
694 MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05 0x61
695 MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06 0x61
696 MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07 0x61
697 MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08 0x61
698 MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09 0x61
699 MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10 0x61
700 MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11 0x61
701 MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12 0x61
702 MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13 0x61
703 MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14 0x61
704 MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15 0x61
705 MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16 0x61
706 MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17 0x61
707 MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18 0x61
708 MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19 0x61
709 MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20 0x61
710 MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21 0x61
711 MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22 0x61
712 MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23 0x61
716 pinctrl_ipu2_vdac: ipu2vdacgrp {
718 MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0xd1
719 MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15 0xd1
720 MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02 0xd1
721 MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03 0xd1
722 MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 0xf9
723 MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 0xf9
724 MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 0xf9
725 MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 0xf9
726 MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 0xf9
727 MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 0xf9
728 MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 0xf9
729 MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 0xf9
730 MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 0xf9
731 MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 0xf9
732 MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 0xf9
733 MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 0xf9
734 MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 0xf9
735 MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 0xf9
736 MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 0xf9
737 MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 0xf9
741 pinctrl_mmc_cd: gpiommccdgrp {
744 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x000b0
748 pinctrl_pwm1: pwm1grp {
750 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
754 pinctrl_pwm2: pwm2grp {
756 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
760 pinctrl_pwm3: pwm3grp {
762 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
766 pinctrl_pwm4: pwm4grp {
768 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
772 pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp {
775 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x0f058
779 pinctrl_regulator_usbhub_pwr: gpioregusbhubpwrgrp {
782 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0f058
786 pinctrl_regulator_usbotg_pwr: gpioregusbotgpwrgrp {
789 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0f058
793 pinctrl_reset_moci: gpioresetmocigrp {
795 /* RESET_MOCI control */
796 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x0f058
800 pinctrl_sd_cd: gpiosdcdgrp {
803 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x000b0
807 pinctrl_spdif: spdifgrp {
809 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
810 MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
814 pinctrl_touch_int: gpiotouchintgrp {
816 /* STMPE811 interrupt */
817 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
821 pinctrl_uart1_dce: uart1dcegrp {
823 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
824 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
829 pinctrl_uart1_dte: uart1dtegrp {
831 MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
832 MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
833 MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
834 MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
838 /* Additional DTR, DSR, DCD */
839 pinctrl_uart1_ctrl: uart1ctrlgrp {
841 MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
842 MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
843 MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
847 pinctrl_uart2_dce: uart2dcegrp {
849 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
850 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
855 pinctrl_uart2_dte: uart2dtegrp {
857 MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1
858 MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
859 MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
860 MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
864 pinctrl_uart4_dce: uart4dcegrp {
866 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
867 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
872 pinctrl_uart4_dte: uart4dtegrp {
874 MX6QDL_PAD_KEY_COL0__UART4_RX_DATA 0x1b0b1
875 MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA 0x1b0b1
879 pinctrl_uart5_dce: uart5dcegrp {
881 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
882 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
887 pinctrl_uart5_dte: uart5dtegrp {
889 MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x1b0b1
890 MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x1b0b1
894 pinctrl_usbotg: usbotggrp {
896 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
900 pinctrl_usdhc1_4bit: usdhc1grp_4bit {
902 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
903 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
904 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
905 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
906 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
907 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
911 pinctrl_usdhc1_8bit: usdhc1grp_8bit {
913 MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071
914 MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071
915 MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17071
916 MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17071
920 pinctrl_usdhc2: usdhc2grp {
922 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
923 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
924 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
925 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
926 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
927 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
931 pinctrl_usdhc3: usdhc3grp {
933 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
934 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
935 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
936 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
937 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
938 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
939 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
940 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
941 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
942 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
944 MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059