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1 /*
2  * Copyright 2014 Gateworks Corporation
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of
12  *     the License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  *     You should have received a copy of the GNU General Public
20  *     License along with this file; if not, write to the Free
21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22  *     MA 02110-1301 USA
23  *
24  * Or, alternatively,
25  *
26  *  b) Permission is hereby granted, free of charge, to any person
27  *     obtaining a copy of this software and associated documentation
28  *     files (the "Software"), to deal in the Software without
29  *     restriction, including without limitation the rights to use,
30  *     copy, modify, merge, publish, distribute, sublicense, and/or
31  *     sell copies of the Software, and to permit persons to whom the
32  *     Software is furnished to do so, subject to the following
33  *     conditions:
34  *
35  *     The above copyright notice and this permission notice shall be
36  *     included in all copies or substantial portions of the Software.
37  *
38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45  *     OTHER DEALINGS IN THE SOFTWARE.
46  */
47
48 #include <dt-bindings/gpio/gpio.h>
49
50 / {
51         /* these are used by bootloader for disabling nodes */
52         aliases {
53                 led0 = &led0;
54                 nand = &gpmi;
55                 ssi0 = &ssi1;
56                 usb0 = &usbh1;
57                 usb1 = &usbotg;
58         };
59
60         chosen {
61                 bootargs = "console=ttymxc1,115200";
62         };
63
64         leds {
65                 compatible = "gpio-leds";
66                 pinctrl-names = "default";
67                 pinctrl-0 = <&pinctrl_gpio_leds>;
68
69                 led0: user1 {
70                         label = "user1";
71                         gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
72                         default-state = "on";
73                         linux,default-trigger = "heartbeat";
74                 };
75         };
76
77         memory@10000000 {
78                 device_type = "memory";
79                 reg = <0x10000000 0x20000000>;
80         };
81
82         reg_5p0v: regulator-5p0v {
83                 compatible = "regulator-fixed";
84                 regulator-name = "5P0V";
85                 regulator-min-microvolt = <5000000>;
86                 regulator-max-microvolt = <5000000>;
87         };
88
89         reg_usb_h1_vbus: regulator-usb-h1-vbus {
90                 compatible = "regulator-fixed";
91                 regulator-name = "usb_h1_vbus";
92                 regulator-min-microvolt = <5000000>;
93                 regulator-max-microvolt = <5000000>;
94         };
95
96         reg_usb_otg_vbus: regulator-usb-otg-vbus {
97                 compatible = "regulator-fixed";
98                 regulator-name = "usb_otg_vbus";
99                 regulator-min-microvolt = <5000000>;
100                 regulator-max-microvolt = <5000000>;
101         };
102 };
103
104 &can1 {
105         pinctrl-names = "default";
106         pinctrl-0 = <&pinctrl_flexcan1>;
107         status = "okay";
108 };
109
110 &gpmi {
111         pinctrl-names = "default";
112         pinctrl-0 = <&pinctrl_gpmi_nand>;
113         status = "okay";
114 };
115
116 &hdmi {
117         ddc-i2c-bus = <&i2c3>;
118         status = "okay";
119 };
120
121 &i2c1 {
122         clock-frequency = <100000>;
123         pinctrl-names = "default";
124         pinctrl-0 = <&pinctrl_i2c1>;
125         status = "okay";
126
127         eeprom1: eeprom@50 {
128                 compatible = "atmel,24c02";
129                 reg = <0x50>;
130                 pagesize = <16>;
131         };
132
133         eeprom2: eeprom@51 {
134                 compatible = "atmel,24c02";
135                 reg = <0x51>;
136                 pagesize = <16>;
137         };
138
139         eeprom3: eeprom@52 {
140                 compatible = "atmel,24c02";
141                 reg = <0x52>;
142                 pagesize = <16>;
143         };
144
145         eeprom4: eeprom@53 {
146                 compatible = "atmel,24c02";
147                 reg = <0x53>;
148                 pagesize = <16>;
149         };
150
151         gpio: pca9555@23 {
152                 compatible = "nxp,pca9555";
153                 reg = <0x23>;
154                 gpio-controller;
155                 #gpio-cells = <2>;
156         };
157
158         rtc: ds1672@68 {
159                 compatible = "dallas,ds1672";
160                 reg = <0x68>;
161         };
162 };
163
164 &i2c2 {
165         clock-frequency = <100000>;
166         pinctrl-names = "default";
167         pinctrl-0 = <&pinctrl_i2c2>;
168         status = "okay";
169
170         ltc3676: pmic@3c {
171                 compatible = "lltc,ltc3676";
172                 reg = <0x3c>;
173                 pinctrl-names = "default";
174                 pinctrl-0 = <&pinctrl_pmic>;
175                 interrupt-parent = <&gpio1>;
176                 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
177
178                 regulators {
179                         /* VDD_SOC (1+R1/R2 = 1.635) */
180                         reg_vdd_soc: sw1 {
181                                 regulator-name = "vddsoc";
182                                 regulator-min-microvolt = <674400>;
183                                 regulator-max-microvolt = <1308000>;
184                                 lltc,fb-voltage-divider = <127000 200000>;
185                                 regulator-ramp-delay = <7000>;
186                                 regulator-boot-on;
187                                 regulator-always-on;
188                         };
189
190                         /* VDD_DDR (1+R1/R2 = 2.105) */
191                         reg_vdd_ddr: sw2 {
192                                 regulator-name = "vddddr";
193                                 regulator-min-microvolt = <868310>;
194                                 regulator-max-microvolt = <1684000>;
195                                 lltc,fb-voltage-divider = <221000 200000>;
196                                 regulator-ramp-delay = <7000>;
197                                 regulator-boot-on;
198                                 regulator-always-on;
199                         };
200
201                         /* VDD_ARM (1+R1/R2 = 1.635) */
202                         reg_vdd_arm: sw3 {
203                                 regulator-name = "vddarm";
204                                 regulator-min-microvolt = <674400>;
205                                 regulator-max-microvolt = <1308000>;
206                                 lltc,fb-voltage-divider = <127000 200000>;
207                                 regulator-ramp-delay = <7000>;
208                                 regulator-boot-on;
209                                 regulator-always-on;
210                         };
211
212                         /* VDD_3P3 (1+R1/R2 = 1.281) */
213                         reg_3p3: sw4 {
214                                 regulator-name = "vdd3p3";
215                                 regulator-min-microvolt = <1880000>;
216                                 regulator-max-microvolt = <3647000>;
217                                 lltc,fb-voltage-divider = <200000 56200>;
218                                 regulator-ramp-delay = <7000>;
219                                 regulator-boot-on;
220                                 regulator-always-on;
221                         };
222
223                         /* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */
224                         reg_1p8a: ldo2 {
225                                 regulator-name = "vdd1p8a";
226                                 regulator-min-microvolt = <1816125>;
227                                 regulator-max-microvolt = <1816125>;
228                                 lltc,fb-voltage-divider = <301000 200000>;
229                                 regulator-boot-on;
230                                 regulator-always-on;
231                         };
232
233                         /* VDD_1P8b: HDMI In analog */
234                         reg_1p8b: ldo3 {
235                                 regulator-name = "vdd1p8b";
236                                 regulator-min-microvolt = <1800000>;
237                                 regulator-max-microvolt = <1800000>;
238                                 regulator-boot-on;
239                         };
240
241                         /* VDD_HIGH (1+R1/R2 = 4.17) */
242                         reg_3p0: ldo4 {
243                                 regulator-name = "vdd3p0";
244                                 regulator-min-microvolt = <3023250>;
245                                 regulator-max-microvolt = <3023250>;
246                                 lltc,fb-voltage-divider = <634000 200000>;
247                                 regulator-boot-on;
248                                 regulator-always-on;
249                         };
250                 };
251         };
252 };
253
254 &i2c3 {
255         clock-frequency = <100000>;
256         pinctrl-names = "default";
257         pinctrl-0 = <&pinctrl_i2c3>;
258         status = "okay";
259
260         gpio_exp: pca9555@24 {
261                 compatible = "nxp,pca9555";
262                 reg = <0x24>;
263                 gpio-controller;
264                 #gpio-cells = <2>;
265         };
266
267 };
268
269 &pcie {
270         pinctrl-names = "default";
271         pinctrl-0 = <&pinctrl_pcie>;
272         reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
273         status = "okay";
274 };
275
276 &pwm2 {
277         pinctrl-names = "default";
278         pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
279         status = "disabled";
280 };
281
282 &pwm3 {
283         pinctrl-names = "default";
284         pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
285         status = "disabled";
286 };
287
288 &ssi1 {
289         status = "okay";
290 };
291
292 &uart2 {
293         pinctrl-names = "default";
294         pinctrl-0 = <&pinctrl_uart2>;
295         status = "okay";
296 };
297
298 &uart3 {
299         pinctrl-names = "default";
300         pinctrl-0 = <&pinctrl_uart3>;
301         status = "okay";
302 };
303
304 &usbotg {
305         vbus-supply = <&reg_usb_otg_vbus>;
306         pinctrl-names = "default";
307         pinctrl-0 = <&pinctrl_usbotg>;
308         disable-over-current;
309         status = "okay";
310 };
311
312 &usbh1 {
313         vbus-supply = <&reg_usb_h1_vbus>;
314         status = "okay";
315 };
316
317 &wdog1 {
318         pinctrl-names = "default";
319         pinctrl-0 = <&pinctrl_wdog>;
320         fsl,ext-reset-output;
321 };
322
323 &iomuxc {
324         pinctrl_flexcan1: flexcan1grp {
325                 fsl,pins = <
326                         MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b1
327                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b1
328                         MX6QDL_PAD_GPIO_9__GPIO1_IO09           0x4001b0b0 /* CAN_STBY */
329                 >;
330         };
331
332         pinctrl_gpio_leds: gpioledsgrp {
333                 fsl,pins = <
334                         MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x1b0b0
335                 >;
336         };
337
338         pinctrl_gpmi_nand: gpminandgrp {
339                 fsl,pins = <
340                         MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
341                         MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
342                         MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
343                         MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
344                         MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
345                         MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
346                         MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
347                         MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
348                         MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
349                         MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
350                         MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
351                         MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
352                         MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
353                         MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
354                         MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
355                 >;
356         };
357
358         pinctrl_i2c1: i2c1grp {
359                 fsl,pins = <
360                         MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
361                         MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
362                 >;
363         };
364
365         pinctrl_i2c2: i2c2grp {
366                 fsl,pins = <
367                         MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
368                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
369                 >;
370         };
371
372         pinctrl_i2c3: i2c3grp {
373                 fsl,pins = <
374                         MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
375                         MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
376                 >;
377         };
378
379         pinctrl_pcie: pciegrp {
380                 fsl,pins = <
381                         MX6QDL_PAD_GPIO_0__GPIO1_IO00           0x1b0b0 /* PCIE RST */
382                 >;
383         };
384
385         pinctrl_pmic: pmicgrp {
386                 fsl,pins = <
387                         MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0001b0b0 /* PMIC_IRQ# */
388                 >;
389         };
390
391         pinctrl_pwm2: pwm2grp {
392                 fsl,pins = <
393                         MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
394                 >;
395         };
396
397         pinctrl_pwm3: pwm3grp {
398                 fsl,pins = <
399                         MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
400                 >;
401         };
402
403         pinctrl_uart2: uart2grp {
404                 fsl,pins = <
405                         MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
406                         MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
407                 >;
408         };
409
410         pinctrl_uart3: uart3grp {
411                 fsl,pins = <
412                         MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
413                         MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
414                 >;
415         };
416
417         pinctrl_usbotg: usbotggrp {
418                 fsl,pins = <
419                         MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
420                 >;
421         };
422
423         pinctrl_wdog: wdoggrp {
424                 fsl,pins = <
425                         MX6QDL_PAD_DISP0_DAT8__WDOG1_B          0x1b0b0
426                 >;
427         };
428 };