2 * Copyright (C) 2014 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "imx6sx.dtsi"
16 model = "Freescale i.MX6 SoloX SDB Board";
17 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
24 reg = <0x80000000 0x40000000>;
27 backlight_display: backlight-display {
28 compatible = "pwm-backlight";
29 pwms = <&pwm3 0 5000000>;
30 brightness-levels = <0 4 8 16 32 64 128 255>;
31 default-brightness-level = <6>;
35 compatible = "gpio-keys";
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_gpio_keys>;
41 gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_VOLUMEUP>;
47 label = "Volume Down";
48 gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
49 linux,code = <KEY_VOLUMEDOWN>;
54 vcc_sd3: regulator-vcc-sd3 {
55 compatible = "regulator-fixed";
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_vcc_sd3>;
58 regulator-name = "VCC_SD3";
59 regulator-min-microvolt = <3000000>;
60 regulator-max-microvolt = <3000000>;
61 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
65 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
66 compatible = "regulator-fixed";
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_usb_otg1>;
69 regulator-name = "usb_otg1_vbus";
70 regulator-min-microvolt = <5000000>;
71 regulator-max-microvolt = <5000000>;
72 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
76 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
77 compatible = "regulator-fixed";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pinctrl_usb_otg2>;
80 regulator-name = "usb_otg2_vbus";
81 regulator-min-microvolt = <5000000>;
82 regulator-max-microvolt = <5000000>;
83 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
87 reg_psu_5v: regulator-psu-5v {
88 compatible = "regulator-fixed";
89 regulator-name = "PSU-5V0";
90 regulator-min-microvolt = <5000000>;
91 regulator-max-microvolt = <5000000>;
94 reg_lcd_3v3: regulator-lcd-3v3 {
95 compatible = "regulator-fixed";
96 regulator-name = "lcd-3v3";
101 reg_peri_3v3: regulator-peri-3v3 {
102 compatible = "regulator-fixed";
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_peri_3v3>;
105 regulator-name = "peri_3v3";
106 regulator-min-microvolt = <3300000>;
107 regulator-max-microvolt = <3300000>;
108 gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
113 reg_enet_3v3: regulator-enet-3v3 {
114 compatible = "regulator-fixed";
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_enet_3v3>;
117 regulator-name = "enet_3v3";
118 regulator-min-microvolt = <3300000>;
119 regulator-max-microvolt = <3300000>;
120 gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
125 reg_pcie_gpio: regulator-pcie-gpio {
126 compatible = "regulator-fixed";
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_pcie_reg>;
129 regulator-name = "MPCIE_3V3";
130 regulator-min-microvolt = <3300000>;
131 regulator-max-microvolt = <3300000>;
132 gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>;
136 reg_lcd_5v: regulator-lcd-5v {
137 compatible = "regulator-fixed";
138 regulator-name = "lcd-5v0";
139 regulator-min-microvolt = <5000000>;
140 regulator-max-microvolt = <5000000>;
144 compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962";
145 model = "wm8962-audio";
146 ssi-controller = <&ssi2>;
147 audio-codec = <&codec>;
149 "Headphone Jack", "HPOUTL",
150 "Headphone Jack", "HPOUTR",
151 "Ext Spk", "SPKOUTL",
152 "Ext Spk", "SPKOUTR",
160 compatible = "sii,43wvf1g";
161 backlight = <&backlight_display>;
162 dvdd-supply = <®_lcd_3v3>;
163 avdd-supply = <®_lcd_5v>;
167 remote-endpoint = <&display_out>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_audmux>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_enet1>;
182 phy-supply = <®_enet_3v3>;
184 phy-handle = <ðphy1>;
185 phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
189 #address-cells = <1>;
192 ethphy1: ethernet-phy@1 {
196 ethphy2: ethernet-phy@2 {
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_enet2>;
206 phy-handle = <ðphy2>;
211 clock-frequency = <100000>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_i2c3>;
218 clock-frequency = <100000>;
219 pinctrl-names = "default";
220 pinctrl-0 = <&pinctrl_i2c4>;
224 compatible = "wlf,wm8962";
226 clocks = <&clks IMX6SX_CLK_AUDIO>;
227 DCVDD-supply = <&vgen4_reg>;
228 DBVDD-supply = <&vgen4_reg>;
229 AVDD-supply = <&vgen4_reg>;
230 CPVDD-supply = <&vgen4_reg>;
231 MICVDD-supply = <&vgen3_reg>;
232 PLLVDD-supply = <&vgen4_reg>;
233 SPKVDD1-supply = <®_psu_5v>;
234 SPKVDD2-supply = <®_psu_5v>;
239 pinctrl-names = "default";
240 pinctrl-0 = <&pinctrl_pcie>;
241 reset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>;
242 vpcie-supply = <®_pcie_gpio>;
247 pinctrl-names = "default";
248 pinctrl-0 = <&pinctrl_lcd>;
252 display_out: endpoint {
253 remote-endpoint = <&panel_in>;
259 pinctrl-names = "default";
260 pinctrl-0 = <&pinctrl_pwm3>;
269 pinctrl-names = "default";
270 pinctrl-0 = <&pinctrl_sai1>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&pinctrl_uart1>;
284 &uart5 { /* for bluetooth */
285 pinctrl-names = "default";
286 pinctrl-0 = <&pinctrl_uart5>;
292 vbus-supply = <®_usb_otg1_vbus>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&pinctrl_usb_otg1_id>;
299 vbus-supply = <®_usb_otg2_vbus>;
305 fsl,tx-d-cal = <106>;
309 fsl,tx-d-cal = <106>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&pinctrl_usdhc2>;
317 keep-power-in-suspend;
323 pinctrl-names = "default", "state_100mhz", "state_200mhz";
324 pinctrl-0 = <&pinctrl_usdhc3>;
325 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
326 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
328 cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
329 wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
330 keep-power-in-suspend;
332 vmmc-supply = <&vcc_sd3>;
337 pinctrl-names = "default";
338 pinctrl-0 = <&pinctrl_usdhc4>;
339 cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;
340 wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
345 pinctrl-names = "default";
346 pinctrl-0 = <&pinctrl_wdog>;
347 fsl,ext-reset-output;
352 pinctrl_audmux: audmuxgrp {
354 MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC 0x130b0
355 MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS 0x130b0
356 MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD 0x120b0
357 MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x130b0
358 MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0
362 pinctrl_enet1: enet1grp {
364 MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
365 MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
366 MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1
367 MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
368 MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
369 MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
370 MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
371 MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
372 MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
373 MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
374 MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
375 MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
376 MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
377 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
378 MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91
380 MX6SX_PAD_ENET2_CRS__GPIO2_IO_7 0x10b0
384 pinctrl_enet_3v3: enet3v3grp {
386 MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0x80000000
390 pinctrl_enet2: enet2grp {
392 MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b9
393 MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1
394 MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b1
395 MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b1
396 MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b1
397 MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b1
398 MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081
399 MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081
400 MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081
401 MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081
402 MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081
403 MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081
407 pinctrl_gpio_keys: gpio_keysgrp {
409 MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059
410 MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059
414 pinctrl_i2c1: i2c1grp {
416 MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1
417 MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1
421 pinctrl_i2c3: i2c3grp {
423 MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
424 MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
428 pinctrl_i2c4: i2c4grp {
430 MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x4001b8b1
431 MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1
435 pinctrl_lcd: lcdgrp {
437 MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
438 MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0
439 MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0
440 MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0
441 MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0
442 MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0
443 MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0
444 MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0
445 MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0
446 MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0
447 MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0
448 MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0
449 MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0
450 MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0
451 MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0
452 MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0
453 MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0
454 MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0
455 MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0
456 MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0
457 MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0
458 MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0
459 MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0
460 MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0
461 MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0
462 MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0
463 MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0
464 MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0
465 MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
469 pinctrl_pcie: pciegrp {
471 MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0
475 pinctrl_pcie_reg: pciereggrp {
477 MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x10b0
481 pinctrl_peri_3v3: peri3v3grp {
483 MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000
487 pinctrl_pwm3: pwm3grp-1 {
489 MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0
493 pinctrl_qspi2: qspi2grp {
495 MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0 0x70f1
496 MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1 0x70f1
497 MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2 0x70f1
498 MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3 0x70f1
499 MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK 0x70f1
500 MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B 0x70f1
501 MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0 0x70f1
502 MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1 0x70f1
503 MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2 0x70f1
504 MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3 0x70f1
505 MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK 0x70f1
506 MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B 0x70f1
510 pinctrl_vcc_sd3: vccsd3grp {
512 MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
516 pinctrl_sai1: sai1grp {
518 MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK 0x130b0
519 MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC 0x130b0
520 MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0 0x120b0
521 MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0 0x130b0
522 MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0
526 pinctrl_uart1: uart1grp {
528 MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
529 MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
533 pinctrl_uart5: uart5grp {
535 MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1
536 MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1
537 MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1
538 MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1
542 pinctrl_usb_otg1: usbotg1grp {
544 MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0
548 pinctrl_usb_otg1_id: usbotg1idgrp {
550 MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059
554 pinctrl_usb_otg2: usbot2ggrp {
556 MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12 0x10b0
560 pinctrl_usdhc2: usdhc2grp {
562 MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
563 MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
564 MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
565 MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
566 MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
567 MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
571 pinctrl_usdhc3: usdhc3grp {
573 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
574 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
575 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
576 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
577 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
578 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
579 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
580 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
581 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
582 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
583 MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
584 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
588 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
590 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
591 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
592 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
593 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
594 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
595 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
596 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
597 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
598 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
599 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
603 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
605 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
606 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
607 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
608 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
609 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
610 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
611 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
612 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
613 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
614 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
618 pinctrl_usdhc4: usdhc4grp {
620 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
621 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
622 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
623 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
624 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
625 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
626 MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
627 MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
631 pinctrl_wdog: wdoggrp {
633 MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0