1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright 2015 Freescale Semiconductor, Inc.
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
15 * The decompressor and also some bootloaders rely on a
16 * pre-existing /chosen node to be available to insert the
17 * command line and merge other ATAGS info.
18 * Also for U-Boot there must be a pre-existing /memory node.
21 memory { device_type = "memory"; };
61 compatible = "arm,cortex-a7";
64 clock-latency = <61036>; /* two CLK32 periods */
72 fsl,soc-operating-points = <
79 clocks = <&clks IMX6UL_CLK_ARM>,
80 <&clks IMX6UL_CLK_PLL2_BUS>,
81 <&clks IMX6UL_CLK_PLL2_PFD2>,
82 <&clks IMX6UL_CA7_SECONDARY_SEL>,
83 <&clks IMX6UL_CLK_STEP>,
84 <&clks IMX6UL_CLK_PLL1_SW>,
85 <&clks IMX6UL_CLK_PLL1_SYS>;
86 clock-names = "arm", "pll2_bus", "pll2_pfd2_396m",
87 "secondary_sel", "step", "pll1_sw",
89 arm-supply = <®_arm>;
90 soc-supply = <®_soc>;
94 intc: interrupt-controller@a01000 {
95 compatible = "arm,gic-400", "arm,cortex-a7-gic";
96 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
97 #interrupt-cells = <3>;
99 interrupt-parent = <&intc>;
100 reg = <0x00a01000 0x1000>,
107 compatible = "arm,armv7-timer";
108 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
109 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
110 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
111 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
112 interrupt-parent = <&intc>;
117 compatible = "fixed-clock";
119 clock-frequency = <32768>;
120 clock-output-names = "ckil";
124 compatible = "fixed-clock";
126 clock-frequency = <24000000>;
127 clock-output-names = "osc";
131 compatible = "fixed-clock";
133 clock-frequency = <0>;
134 clock-output-names = "ipp_di0";
138 compatible = "fixed-clock";
140 clock-frequency = <0>;
141 clock-output-names = "ipp_di1";
145 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
146 interrupt-parent = <&gpc>;
147 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
148 fsl,tempmon = <&anatop>;
149 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
150 nvmem-cell-names = "calib", "temp_grade";
151 clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
155 compatible = "arm,cortex-a7-pmu";
156 interrupt-parent = <&gpc>;
157 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
162 #address-cells = <1>;
164 compatible = "simple-bus";
165 interrupt-parent = <&gpc>;
169 compatible = "mmio-sram";
170 reg = <0x00900000 0x20000>;
173 dma_apbh: dma-apbh@1804000 {
174 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
175 reg = <0x01804000 0x2000>;
176 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
177 <0 13 IRQ_TYPE_LEVEL_HIGH>,
178 <0 13 IRQ_TYPE_LEVEL_HIGH>,
179 <0 13 IRQ_TYPE_LEVEL_HIGH>;
180 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
183 clocks = <&clks IMX6UL_CLK_APBHDMA>;
186 gpmi: gpmi-nand@1806000 {
187 compatible = "fsl,imx6q-gpmi-nand";
188 #address-cells = <1>;
190 reg = <0x01806000 0x2000>, <0x01808000 0x2000>;
191 reg-names = "gpmi-nand", "bch";
192 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
193 interrupt-names = "bch";
194 clocks = <&clks IMX6UL_CLK_GPMI_IO>,
195 <&clks IMX6UL_CLK_GPMI_APB>,
196 <&clks IMX6UL_CLK_GPMI_BCH>,
197 <&clks IMX6UL_CLK_GPMI_BCH_APB>,
198 <&clks IMX6UL_CLK_PER_BCH>;
199 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
200 "gpmi_bch_apb", "per1_bch";
201 dmas = <&dma_apbh 0>;
206 aips1: aips-bus@2000000 {
207 compatible = "fsl,aips-bus", "simple-bus";
208 #address-cells = <1>;
210 reg = <0x02000000 0x100000>;
214 compatible = "fsl,spba-bus", "simple-bus";
215 #address-cells = <1>;
217 reg = <0x02000000 0x40000>;
220 ecspi1: ecspi@2008000 {
221 #address-cells = <1>;
223 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
224 reg = <0x02008000 0x4000>;
225 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
226 clocks = <&clks IMX6UL_CLK_ECSPI1>,
227 <&clks IMX6UL_CLK_ECSPI1>;
228 clock-names = "ipg", "per";
232 ecspi2: ecspi@200c000 {
233 #address-cells = <1>;
235 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
236 reg = <0x0200c000 0x4000>;
237 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
238 clocks = <&clks IMX6UL_CLK_ECSPI2>,
239 <&clks IMX6UL_CLK_ECSPI2>;
240 clock-names = "ipg", "per";
244 ecspi3: ecspi@2010000 {
245 #address-cells = <1>;
247 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
248 reg = <0x02010000 0x4000>;
249 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
250 clocks = <&clks IMX6UL_CLK_ECSPI3>,
251 <&clks IMX6UL_CLK_ECSPI3>;
252 clock-names = "ipg", "per";
256 ecspi4: ecspi@2014000 {
257 #address-cells = <1>;
259 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
260 reg = <0x02014000 0x4000>;
261 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
262 clocks = <&clks IMX6UL_CLK_ECSPI4>,
263 <&clks IMX6UL_CLK_ECSPI4>;
264 clock-names = "ipg", "per";
268 uart7: serial@2018000 {
269 compatible = "fsl,imx6ul-uart",
271 reg = <0x02018000 0x4000>;
272 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
273 clocks = <&clks IMX6UL_CLK_UART7_IPG>,
274 <&clks IMX6UL_CLK_UART7_SERIAL>;
275 clock-names = "ipg", "per";
279 uart1: serial@2020000 {
280 compatible = "fsl,imx6ul-uart",
282 reg = <0x02020000 0x4000>;
283 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
284 clocks = <&clks IMX6UL_CLK_UART1_IPG>,
285 <&clks IMX6UL_CLK_UART1_SERIAL>;
286 clock-names = "ipg", "per";
290 uart8: serial@2024000 {
291 compatible = "fsl,imx6ul-uart",
293 reg = <0x02024000 0x4000>;
294 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
295 clocks = <&clks IMX6UL_CLK_UART8_IPG>,
296 <&clks IMX6UL_CLK_UART8_SERIAL>;
297 clock-names = "ipg", "per";
302 #sound-dai-cells = <0>;
303 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
304 reg = <0x02028000 0x4000>;
305 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
306 clocks = <&clks IMX6UL_CLK_SAI1_IPG>,
307 <&clks IMX6UL_CLK_SAI1>,
308 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
309 clock-names = "bus", "mclk1", "mclk2", "mclk3";
310 dmas = <&sdma 35 24 0>,
312 dma-names = "rx", "tx";
317 #sound-dai-cells = <0>;
318 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
319 reg = <0x0202c000 0x4000>;
320 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
321 clocks = <&clks IMX6UL_CLK_SAI2_IPG>,
322 <&clks IMX6UL_CLK_SAI2>,
323 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
324 clock-names = "bus", "mclk1", "mclk2", "mclk3";
325 dmas = <&sdma 37 24 0>,
327 dma-names = "rx", "tx";
332 #sound-dai-cells = <0>;
333 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
334 reg = <0x02030000 0x4000>;
335 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
336 clocks = <&clks IMX6UL_CLK_SAI3_IPG>,
337 <&clks IMX6UL_CLK_SAI3>,
338 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
339 clock-names = "bus", "mclk1", "mclk2", "mclk3";
340 dmas = <&sdma 39 24 0>,
342 dma-names = "rx", "tx";
348 compatible = "fsl,imx6ul-tsc";
349 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
350 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
351 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
352 clocks = <&clks IMX6UL_CLK_IPG>,
353 <&clks IMX6UL_CLK_ADC2>;
354 clock-names = "tsc", "adc";
359 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
360 reg = <0x02080000 0x4000>;
361 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
362 clocks = <&clks IMX6UL_CLK_PWM1>,
363 <&clks IMX6UL_CLK_PWM1>;
364 clock-names = "ipg", "per";
370 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
371 reg = <0x02084000 0x4000>;
372 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
373 clocks = <&clks IMX6UL_CLK_PWM2>,
374 <&clks IMX6UL_CLK_PWM2>;
375 clock-names = "ipg", "per";
381 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
382 reg = <0x02088000 0x4000>;
383 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
384 clocks = <&clks IMX6UL_CLK_PWM3>,
385 <&clks IMX6UL_CLK_PWM3>;
386 clock-names = "ipg", "per";
392 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
393 reg = <0x0208c000 0x4000>;
394 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
395 clocks = <&clks IMX6UL_CLK_PWM4>,
396 <&clks IMX6UL_CLK_PWM4>;
397 clock-names = "ipg", "per";
402 can1: flexcan@2090000 {
403 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
404 reg = <0x02090000 0x4000>;
405 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
406 clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
407 <&clks IMX6UL_CLK_CAN1_SERIAL>;
408 clock-names = "ipg", "per";
412 can2: flexcan@2094000 {
413 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
414 reg = <0x02094000 0x4000>;
415 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
416 clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
417 <&clks IMX6UL_CLK_CAN2_SERIAL>;
418 clock-names = "ipg", "per";
423 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
424 reg = <0x02098000 0x4000>;
425 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
426 clocks = <&clks IMX6UL_CLK_GPT1_BUS>,
427 <&clks IMX6UL_CLK_GPT1_SERIAL>;
428 clock-names = "ipg", "per";
431 gpio1: gpio@209c000 {
432 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
433 reg = <0x0209c000 0x4000>;
434 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
435 <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
438 interrupt-controller;
439 #interrupt-cells = <2>;
440 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
444 gpio2: gpio@20a0000 {
445 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
446 reg = <0x020a0000 0x4000>;
447 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
448 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
451 interrupt-controller;
452 #interrupt-cells = <2>;
453 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
456 gpio3: gpio@20a4000 {
457 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
458 reg = <0x020a4000 0x4000>;
459 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
460 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
463 interrupt-controller;
464 #interrupt-cells = <2>;
465 gpio-ranges = <&iomuxc 0 65 29>;
468 gpio4: gpio@20a8000 {
469 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
470 reg = <0x020a8000 0x4000>;
471 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
472 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
475 interrupt-controller;
476 #interrupt-cells = <2>;
477 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
480 gpio5: gpio@20ac000 {
481 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
482 reg = <0x020ac000 0x4000>;
483 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
484 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
487 interrupt-controller;
488 #interrupt-cells = <2>;
489 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
492 fec2: ethernet@20b4000 {
493 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
494 reg = <0x020b4000 0x4000>;
495 interrupt-names = "int0", "pps";
496 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
497 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
498 clocks = <&clks IMX6UL_CLK_ENET>,
499 <&clks IMX6UL_CLK_ENET_AHB>,
500 <&clks IMX6UL_CLK_ENET_PTP>,
501 <&clks IMX6UL_CLK_ENET2_REF_125M>,
502 <&clks IMX6UL_CLK_ENET2_REF_125M>;
503 clock-names = "ipg", "ahb", "ptp",
504 "enet_clk_ref", "enet_out";
505 fsl,num-tx-queues=<1>;
506 fsl,num-rx-queues=<1>;
511 compatible = "fsl,imx6ul-kpp", "fsl,imx6q-kpp", "fsl,imx21-kpp";
512 reg = <0x020b8000 0x4000>;
513 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
514 clocks = <&clks IMX6UL_CLK_KPP>;
518 wdog1: wdog@20bc000 {
519 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
520 reg = <0x020bc000 0x4000>;
521 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
522 clocks = <&clks IMX6UL_CLK_WDOG1>;
525 wdog2: wdog@20c0000 {
526 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
527 reg = <0x020c0000 0x4000>;
528 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
529 clocks = <&clks IMX6UL_CLK_WDOG2>;
534 compatible = "fsl,imx6ul-ccm";
535 reg = <0x020c4000 0x4000>;
536 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
537 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
539 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
540 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
543 anatop: anatop@20c8000 {
544 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
545 "syscon", "simple-bus";
546 reg = <0x020c8000 0x1000>;
547 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
548 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
549 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
551 reg_3p0: regulator-3p0 {
552 compatible = "fsl,anatop-regulator";
553 regulator-name = "vdd3p0";
554 regulator-min-microvolt = <2625000>;
555 regulator-max-microvolt = <3400000>;
556 anatop-reg-offset = <0x120>;
557 anatop-vol-bit-shift = <8>;
558 anatop-vol-bit-width = <5>;
559 anatop-min-bit-val = <0>;
560 anatop-min-voltage = <2625000>;
561 anatop-max-voltage = <3400000>;
562 anatop-enable-bit = <0>;
565 reg_arm: regulator-vddcore {
566 compatible = "fsl,anatop-regulator";
567 regulator-name = "cpu";
568 regulator-min-microvolt = <725000>;
569 regulator-max-microvolt = <1450000>;
571 anatop-reg-offset = <0x140>;
572 anatop-vol-bit-shift = <0>;
573 anatop-vol-bit-width = <5>;
574 anatop-delay-reg-offset = <0x170>;
575 anatop-delay-bit-shift = <24>;
576 anatop-delay-bit-width = <2>;
577 anatop-min-bit-val = <1>;
578 anatop-min-voltage = <725000>;
579 anatop-max-voltage = <1450000>;
582 reg_soc: regulator-vddsoc {
583 compatible = "fsl,anatop-regulator";
584 regulator-name = "vddsoc";
585 regulator-min-microvolt = <725000>;
586 regulator-max-microvolt = <1450000>;
588 anatop-reg-offset = <0x140>;
589 anatop-vol-bit-shift = <18>;
590 anatop-vol-bit-width = <5>;
591 anatop-delay-reg-offset = <0x170>;
592 anatop-delay-bit-shift = <28>;
593 anatop-delay-bit-width = <2>;
594 anatop-min-bit-val = <1>;
595 anatop-min-voltage = <725000>;
596 anatop-max-voltage = <1450000>;
600 usbphy1: usbphy@20c9000 {
601 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
602 reg = <0x020c9000 0x1000>;
603 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
604 clocks = <&clks IMX6UL_CLK_USBPHY1>;
605 phy-3p0-supply = <®_3p0>;
606 fsl,anatop = <&anatop>;
609 usbphy2: usbphy@20ca000 {
610 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
611 reg = <0x020ca000 0x1000>;
612 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
613 clocks = <&clks IMX6UL_CLK_USBPHY2>;
614 phy-3p0-supply = <®_3p0>;
615 fsl,anatop = <&anatop>;
619 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
620 reg = <0x020cc000 0x4000>;
622 snvs_rtc: snvs-rtc-lp {
623 compatible = "fsl,sec-v4.0-mon-rtc-lp";
626 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
627 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
630 snvs_poweroff: snvs-poweroff {
631 compatible = "syscon-poweroff";
639 snvs_pwrkey: snvs-powerkey {
640 compatible = "fsl,sec-v4.0-pwrkey";
642 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
643 linux,keycode = <KEY_POWER>;
647 snvs_lpgpr: snvs-lpgpr {
648 compatible = "fsl,imx6ul-snvs-lpgpr";
652 epit1: epit@20d0000 {
653 reg = <0x020d0000 0x4000>;
654 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
657 epit2: epit@20d4000 {
658 reg = <0x020d4000 0x4000>;
659 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
663 compatible = "fsl,imx6ul-src", "fsl,imx51-src";
664 reg = <0x020d8000 0x4000>;
665 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
666 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
671 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
672 reg = <0x020dc000 0x4000>;
673 interrupt-controller;
674 #interrupt-cells = <3>;
675 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
676 interrupt-parent = <&intc>;
679 iomuxc: iomuxc@20e0000 {
680 compatible = "fsl,imx6ul-iomuxc";
681 reg = <0x020e0000 0x4000>;
684 gpr: iomuxc-gpr@20e4000 {
685 compatible = "fsl,imx6ul-iomuxc-gpr",
686 "fsl,imx6q-iomuxc-gpr", "syscon";
687 reg = <0x020e4000 0x4000>;
691 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
692 reg = <0x020e8000 0x4000>;
693 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
694 clocks = <&clks IMX6UL_CLK_GPT2_BUS>,
695 <&clks IMX6UL_CLK_GPT2_SERIAL>;
696 clock-names = "ipg", "per";
700 compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma",
702 reg = <0x020ec000 0x4000>;
703 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
704 clocks = <&clks IMX6UL_CLK_SDMA>,
705 <&clks IMX6UL_CLK_SDMA>;
706 clock-names = "ipg", "ahb";
708 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
712 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
713 reg = <0x020f0000 0x4000>;
714 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
715 clocks = <&clks IMX6UL_CLK_PWM5>,
716 <&clks IMX6UL_CLK_PWM5>;
717 clock-names = "ipg", "per";
723 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
724 reg = <0x020f4000 0x4000>;
725 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&clks IMX6UL_CLK_PWM6>,
727 <&clks IMX6UL_CLK_PWM6>;
728 clock-names = "ipg", "per";
734 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
735 reg = <0x020f8000 0x4000>;
736 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
737 clocks = <&clks IMX6UL_CLK_PWM7>,
738 <&clks IMX6UL_CLK_PWM7>;
739 clock-names = "ipg", "per";
745 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
746 reg = <0x020fc000 0x4000>;
747 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
748 clocks = <&clks IMX6UL_CLK_PWM8>,
749 <&clks IMX6UL_CLK_PWM8>;
750 clock-names = "ipg", "per";
756 aips2: aips-bus@2100000 {
757 compatible = "fsl,aips-bus", "simple-bus";
758 #address-cells = <1>;
760 reg = <0x02100000 0x100000>;
763 crypto: caam@2140000 {
764 compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
765 #address-cells = <1>;
767 reg = <0x2140000 0x3c000>;
768 ranges = <0 0x2140000 0x3c000>;
769 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
770 clocks = <&clks IMX6UL_CLK_CAAM_IPG>, <&clks IMX6UL_CLK_CAAM_ACLK>,
771 <&clks IMX6UL_CLK_CAAM_MEM>;
772 clock-names = "ipg", "aclk", "mem";
775 compatible = "fsl,sec-v4.0-job-ring";
776 reg = <0x1000 0x1000>;
777 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
781 compatible = "fsl,sec-v4.0-job-ring";
782 reg = <0x2000 0x1000>;
783 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
787 compatible = "fsl,sec-v4.0-job-ring";
788 reg = <0x3000 0x1000>;
789 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
793 usbotg1: usb@2184000 {
794 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
795 reg = <0x02184000 0x200>;
796 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
797 clocks = <&clks IMX6UL_CLK_USBOH3>;
798 fsl,usbphy = <&usbphy1>;
799 fsl,usbmisc = <&usbmisc 0>;
800 fsl,anatop = <&anatop>;
801 ahb-burst-config = <0x0>;
802 tx-burst-size-dword = <0x10>;
803 rx-burst-size-dword = <0x10>;
807 usbotg2: usb@2184200 {
808 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
809 reg = <0x02184200 0x200>;
810 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
811 clocks = <&clks IMX6UL_CLK_USBOH3>;
812 fsl,usbphy = <&usbphy2>;
813 fsl,usbmisc = <&usbmisc 1>;
814 ahb-burst-config = <0x0>;
815 tx-burst-size-dword = <0x10>;
816 rx-burst-size-dword = <0x10>;
820 usbmisc: usbmisc@2184800 {
822 compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc";
823 reg = <0x02184800 0x200>;
826 fec1: ethernet@2188000 {
827 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
828 reg = <0x02188000 0x4000>;
829 interrupt-names = "int0", "pps";
830 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
831 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
832 clocks = <&clks IMX6UL_CLK_ENET>,
833 <&clks IMX6UL_CLK_ENET_AHB>,
834 <&clks IMX6UL_CLK_ENET_PTP>,
835 <&clks IMX6UL_CLK_ENET_REF>,
836 <&clks IMX6UL_CLK_ENET_REF>;
837 clock-names = "ipg", "ahb", "ptp",
838 "enet_clk_ref", "enet_out";
839 fsl,num-tx-queues=<1>;
840 fsl,num-rx-queues=<1>;
844 usdhc1: usdhc@2190000 {
845 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
846 reg = <0x02190000 0x4000>;
847 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
848 clocks = <&clks IMX6UL_CLK_USDHC1>,
849 <&clks IMX6UL_CLK_USDHC1>,
850 <&clks IMX6UL_CLK_USDHC1>;
851 clock-names = "ipg", "ahb", "per";
856 usdhc2: usdhc@2194000 {
857 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
858 reg = <0x02194000 0x4000>;
859 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
860 clocks = <&clks IMX6UL_CLK_USDHC2>,
861 <&clks IMX6UL_CLK_USDHC2>,
862 <&clks IMX6UL_CLK_USDHC2>;
863 clock-names = "ipg", "ahb", "per";
869 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
870 reg = <0x02198000 0x4000>;
871 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
872 clocks = <&clks IMX6UL_CLK_ADC1>;
875 fsl,adck-max-frequency = <30000000>, <40000000>,
881 #address-cells = <1>;
883 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
884 reg = <0x021a0000 0x4000>;
885 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
886 clocks = <&clks IMX6UL_CLK_I2C1>;
891 #address-cells = <1>;
893 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
894 reg = <0x021a4000 0x4000>;
895 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
896 clocks = <&clks IMX6UL_CLK_I2C2>;
901 #address-cells = <1>;
903 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
904 reg = <0x021a8000 0x4000>;
905 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
906 clocks = <&clks IMX6UL_CLK_I2C3>;
911 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
912 reg = <0x021b0000 0x4000>;
915 ocotp: ocotp-ctrl@21bc000 {
916 #address-cells = <1>;
918 compatible = "fsl,imx6ul-ocotp", "syscon";
919 reg = <0x021bc000 0x4000>;
920 clocks = <&clks IMX6UL_CLK_OCOTP>;
922 tempmon_calib: calib@38 {
926 tempmon_temp_grade: temp-grade@20 {
931 lcdif: lcdif@21c8000 {
932 compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
933 reg = <0x021c8000 0x4000>;
934 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
935 clocks = <&clks IMX6UL_CLK_LCDIF_PIX>,
936 <&clks IMX6UL_CLK_LCDIF_APB>,
937 <&clks IMX6UL_CLK_DUMMY>;
938 clock-names = "pix", "axi", "disp_axi";
943 #address-cells = <1>;
945 compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi";
946 reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
947 reg-names = "QuadSPI", "QuadSPI-memory";
948 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
949 clocks = <&clks IMX6UL_CLK_QSPI>,
950 <&clks IMX6UL_CLK_QSPI>;
951 clock-names = "qspi_en", "qspi";
955 wdog3: wdog@21e4000 {
956 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
957 reg = <0x021e4000 0x4000>;
958 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
959 clocks = <&clks IMX6UL_CLK_WDOG3>;
963 uart2: serial@21e8000 {
964 compatible = "fsl,imx6ul-uart",
966 reg = <0x021e8000 0x4000>;
967 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
968 clocks = <&clks IMX6UL_CLK_UART2_IPG>,
969 <&clks IMX6UL_CLK_UART2_SERIAL>;
970 clock-names = "ipg", "per";
974 uart3: serial@21ec000 {
975 compatible = "fsl,imx6ul-uart",
977 reg = <0x021ec000 0x4000>;
978 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
979 clocks = <&clks IMX6UL_CLK_UART3_IPG>,
980 <&clks IMX6UL_CLK_UART3_SERIAL>;
981 clock-names = "ipg", "per";
985 uart4: serial@21f0000 {
986 compatible = "fsl,imx6ul-uart",
988 reg = <0x021f0000 0x4000>;
989 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
990 clocks = <&clks IMX6UL_CLK_UART4_IPG>,
991 <&clks IMX6UL_CLK_UART4_SERIAL>;
992 clock-names = "ipg", "per";
996 uart5: serial@21f4000 {
997 compatible = "fsl,imx6ul-uart",
999 reg = <0x021f4000 0x4000>;
1000 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1001 clocks = <&clks IMX6UL_CLK_UART5_IPG>,
1002 <&clks IMX6UL_CLK_UART5_SERIAL>;
1003 clock-names = "ipg", "per";
1004 status = "disabled";
1008 #address-cells = <1>;
1010 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
1011 reg = <0x021f8000 0x4000>;
1012 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1013 clocks = <&clks IMX6UL_CLK_I2C4>;
1014 status = "disabled";
1017 uart6: serial@21fc000 {
1018 compatible = "fsl,imx6ul-uart",
1020 reg = <0x021fc000 0x4000>;
1021 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1022 clocks = <&clks IMX6UL_CLK_UART6_IPG>,
1023 <&clks IMX6UL_CLK_UART6_SERIAL>;
1024 clock-names = "ipg", "per";
1025 status = "disabled";