2 * Copyright 2017 Sean Wang <sean.wang@mediatek.com>
4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
10 #include "mt6323.dtsi"
13 model = "Bananapi BPI-R2";
14 compatible = "bananapi,bpi-r2", "mediatek,mt7623";
21 stdout-path = "serial2:115200n8";
26 proc-supply = <&mt6323_vproc_reg>;
30 proc-supply = <&mt6323_vproc_reg>;
34 proc-supply = <&mt6323_vproc_reg>;
38 proc-supply = <&mt6323_vproc_reg>;
42 reg_1p8v: regulator-1p8v {
43 compatible = "regulator-fixed";
44 regulator-name = "fixed-1.8V";
45 regulator-min-microvolt = <1800000>;
46 regulator-max-microvolt = <1800000>;
51 reg_3p3v: regulator-3p3v {
52 compatible = "regulator-fixed";
53 regulator-name = "fixed-3.3V";
54 regulator-min-microvolt = <3300000>;
55 regulator-max-microvolt = <3300000>;
60 reg_5v: regulator-5v {
61 compatible = "regulator-fixed";
62 regulator-name = "fixed-5V";
63 regulator-min-microvolt = <5000000>;
64 regulator-max-microvolt = <5000000>;
70 compatible = "gpio-keys";
71 pinctrl-names = "default";
72 pinctrl-0 = <&key_pins_a>;
77 gpios = <&pio 256 GPIO_ACTIVE_LOW>;
82 linux,code = <KEY_WPS_BUTTON>;
83 gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
88 compatible = "gpio-leds";
89 pinctrl-names = "default";
90 pinctrl-0 = <&led_pins_a>;
93 label = "bpi-r2:pio:blue";
94 gpios = <&pio 241 GPIO_ACTIVE_HIGH>;
95 default-state = "off";
99 label = "bpi-r2:pio:green";
100 gpios = <&pio 240 GPIO_ACTIVE_HIGH>;
101 default-state = "off";
105 label = "bpi-r2:pio:red";
106 gpios = <&pio 239 GPIO_ACTIVE_HIGH>;
107 default-state = "off";
112 reg = <0 0x80000000 0 0x40000000>;
117 pinctrl-names = "default";
118 pinctrl-0 = <&cir_pins_a>;
130 compatible = "mediatek,eth-mac";
142 #address-cells = <1>;
146 compatible = "mediatek,mt7530";
147 #address-cells = <1>;
150 reset-gpios = <&pio 33 0>;
151 core-supply = <&mt6323_vpa_reg>;
152 io-supply = <&mt6323_vemc3v3_reg>;
155 #address-cells = <1>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&i2c0_pins_a>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&i2c1_pins_a>;
213 pinctrl-names = "default", "state_uhs";
214 pinctrl-0 = <&mmc0_pins_default>;
215 pinctrl-1 = <&mmc0_pins_uhs>;
218 max-frequency = <50000000>;
220 vmmc-supply = <®_3p3v>;
221 vqmmc-supply = <®_1p8v>;
226 pinctrl-names = "default", "state_uhs";
227 pinctrl-0 = <&mmc1_pins_default>;
228 pinctrl-1 = <&mmc1_pins_uhs>;
231 max-frequency = <50000000>;
233 cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
234 vmmc-supply = <®_3p3v>;
235 vqmmc-supply = <®_3p3v>;
239 pinctrl-names = "default";
240 pinctrl-0 = <&pcie_default>;
263 pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
270 pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
271 <MT7623_PIN_76_SCL0_FUNC_SCL0>;
278 pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
279 <MT7623_PIN_58_SCL1_FUNC_SCL1>;
286 pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
287 <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
288 <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
289 <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
290 <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
291 drive-strength = <MTK_DRIVE_12mA>;
298 pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
299 <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
300 <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
301 <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
302 <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
303 drive-strength = <MTK_DRIVE_12mA>;
310 pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
311 <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
318 pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
319 <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
320 <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>;
324 mmc0_pins_default: mmc0default {
326 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
327 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
328 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
329 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
330 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
331 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
332 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
333 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
334 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
340 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
345 pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
350 mmc0_pins_uhs: mmc0 {
352 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
353 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
354 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
355 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
356 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
357 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
358 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
359 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
360 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
362 drive-strength = <MTK_DRIVE_2mA>;
363 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
367 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
368 drive-strength = <MTK_DRIVE_2mA>;
369 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
373 pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
378 mmc1_pins_default: mmc1default {
380 pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
381 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
382 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
383 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
384 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
386 drive-strength = <MTK_DRIVE_4mA>;
387 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
391 pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
393 drive-strength = <MTK_DRIVE_4mA>;
397 pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
403 pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
408 mmc1_pins_uhs: mmc1 {
410 pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
411 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
412 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
413 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
414 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
416 drive-strength = <MTK_DRIVE_4mA>;
417 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
421 pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
422 drive-strength = <MTK_DRIVE_4mA>;
423 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
427 pcie_default: pcie_pin_default {
429 pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
430 <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
437 pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
438 <MT7623_PIN_204_PWM1_FUNC_PWM1>,
439 <MT7623_PIN_205_PWM2_FUNC_PWM2>,
440 <MT7623_PIN_206_PWM3_FUNC_PWM3>,
441 <MT7623_PIN_207_PWM4_FUNC_PWM4>;
447 pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
448 <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
449 <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
450 <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
455 uart0_pins_a: uart@0 {
457 pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
458 <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
462 uart1_pins_a: uart@1 {
464 pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
465 <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
469 uart2_pins_a: uart@2 {
471 pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
472 <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
478 pinctrl-names = "default";
479 pinctrl-0 = <&pwm_pins_a>;
486 compatible = "mediatek,mt6323-led";
487 #address-cells = <1>;
492 label = "bpi-r2:isink:green";
493 default-state = "off";
498 label = "bpi-r2:isink:red";
499 default-state = "off";
504 label = "bpi-r2:isink:blue";
505 default-state = "off";
512 pinctrl-names = "default";
513 pinctrl-0 = <&spi0_pins_a>;
518 pinctrl-names = "default";
519 pinctrl-0 = <&uart0_pins_a>;
524 pinctrl-names = "default";
525 pinctrl-0 = <&uart1_pins_a>;
530 pinctrl-names = "default";
531 pinctrl-0 = <&uart2_pins_a>;
536 vusb33-supply = <®_3p3v>;
537 vbus-supply = <®_5v>;
542 vusb33-supply = <®_3p3v>;
543 vbus-supply = <®_5v>;