1 // SPDX-License-Identifier: GPL-2.0
2 &l4_cfg { /* 0x4a000000 */
3 compatible = "ti,omap4-l4-cfg", "simple-bus";
4 reg = <0x4a000000 0x800>,
7 reg-names = "ap", "la", "ia0";
10 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
11 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
12 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
13 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
14 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
15 <0x00280000 0x4a280000 0x080000>, /* segment 5 */
16 <0x00300000 0x4a300000 0x080000>; /* segment 6 */
18 segment@0 { /* 0x4a000000 */
19 compatible = "simple-bus";
22 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
23 <0x00001000 0x00001000 0x001000>, /* ap 1 */
24 <0x00000800 0x00000800 0x000800>, /* ap 2 */
25 <0x00002000 0x00002000 0x001000>, /* ap 3 */
26 <0x00003000 0x00003000 0x001000>, /* ap 4 */
27 <0x00004000 0x00004000 0x001000>, /* ap 5 */
28 <0x00005000 0x00005000 0x001000>, /* ap 6 */
29 <0x00056000 0x00056000 0x001000>, /* ap 7 */
30 <0x00057000 0x00057000 0x001000>, /* ap 8 */
31 <0x0005c000 0x0005c000 0x001000>, /* ap 9 */
32 <0x00058000 0x00058000 0x004000>, /* ap 10 */
33 <0x00062000 0x00062000 0x001000>, /* ap 11 */
34 <0x00063000 0x00063000 0x001000>, /* ap 12 */
35 <0x00008000 0x00008000 0x002000>, /* ap 23 */
36 <0x0000a000 0x0000a000 0x001000>, /* ap 24 */
37 <0x00066000 0x00066000 0x001000>, /* ap 25 */
38 <0x00067000 0x00067000 0x001000>, /* ap 26 */
39 <0x0005e000 0x0005e000 0x002000>, /* ap 80 */
40 <0x00060000 0x00060000 0x001000>, /* ap 81 */
41 <0x00064000 0x00064000 0x001000>, /* ap 86 */
42 <0x00065000 0x00065000 0x001000>; /* ap 87 */
44 target-module@2000 { /* 0x4a002000, ap 3 06.0 */
45 compatible = "ti,sysc-omap4", "ti,sysc";
46 ti,hwmods = "ctrl_module_core";
49 reg-names = "rev", "sysc";
50 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
53 <SYSC_IDLE_SMART_WKUP>;
54 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
57 ranges = <0x0 0x2000 0x1000>;
59 omap4_scm_core: scm@0 {
60 compatible = "ti,omap4-scm-core", "simple-bus";
64 ranges = <0 0 0x1000>;
66 scm_conf: scm_conf@0 {
67 compatible = "syscon";
73 omap_control_usb2phy: control-phy@300 {
74 compatible = "ti,control-phy-usb2";
79 omap_control_usbotg: control-phy@33c {
80 compatible = "ti,control-phy-otghs";
82 reg-names = "otghs_control";
87 target-module@4000 { /* 0x4a004000, ap 5 02.0 */
88 compatible = "ti,sysc-omap4", "ti,sysc";
93 ranges = <0x0 0x4000 0x1000>;
96 compatible = "ti,omap4-cm1", "simple-bus";
100 ranges = <0 0 0x2000>;
103 #address-cells = <1>;
107 cm1_clockdomains: clockdomains {
112 target-module@8000 { /* 0x4a008000, ap 23 32.0 */
113 compatible = "ti,sysc-omap4", "ti,sysc";
116 #address-cells = <1>;
118 ranges = <0x0 0x8000 0x2000>;
121 compatible = "ti,omap4-cm2", "simple-bus";
123 #address-cells = <1>;
125 ranges = <0 0 0x2000>;
128 #address-cells = <1>;
132 cm2_clockdomains: clockdomains {
137 target-module@56000 { /* 0x4a056000, ap 7 0a.0 */
138 compatible = "ti,sysc-omap2", "ti,sysc";
142 reg-names = "rev", "sysc", "syss";
143 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
145 SYSC_OMAP2_SOFTRESET |
146 SYSC_OMAP2_AUTOIDLE)>;
147 ti,sysc-midle = <SYSC_IDLE_FORCE>,
150 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
154 /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */
155 clocks = <&l3_dma_clkctrl OMAP4_DMA_SYSTEM_CLKCTRL 0>;
157 #address-cells = <1>;
159 ranges = <0x0 0x56000 0x1000>;
161 sdma: dma-controller@0 {
162 compatible = "ti,omap4430-sdma", "ti,omap-sdma";
164 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
165 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
166 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
167 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
170 dma-requests = <127>;
174 target-module@58000 { /* 0x4a058000, ap 10 0e.0 */
175 compatible = "ti,sysc-omap2", "ti,sysc";
179 reg-names = "rev", "sysc", "syss";
180 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
181 SYSC_OMAP2_SOFTRESET |
182 SYSC_OMAP2_AUTOIDLE)>;
183 ti,sysc-midle = <SYSC_IDLE_FORCE>,
186 <SYSC_IDLE_SMART_WKUP>;
187 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
190 <SYSC_IDLE_SMART_WKUP>;
192 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
193 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
195 #address-cells = <1>;
197 ranges = <0x0 0x58000 0x5000>;
200 compatible = "ti,omap4-hsi";
203 reg-names = "sys", "gdd";
205 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
206 clock-names = "hsi_fck";
208 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
209 interrupt-names = "gdd_mpu";
211 #address-cells = <1>;
213 ranges = <0 0 0x4000>;
215 hsi_port1: hsi-port@2000 {
216 compatible = "ti,omap4-hsi-port";
217 reg = <0x2000 0x800>,
219 reg-names = "tx", "rx";
220 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
223 hsi_port2: hsi-port@3000 {
224 compatible = "ti,omap4-hsi-port";
225 reg = <0x3000 0x800>,
227 reg-names = "tx", "rx";
228 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
233 target-module@5e000 { /* 0x4a05e000, ap 80 68.0 */
234 compatible = "ti,sysc";
236 #address-cells = <1>;
238 ranges = <0x0 0x5e000 0x2000>;
241 target-module@62000 { /* 0x4a062000, ap 11 16.0 */
242 compatible = "ti,sysc-omap2", "ti,sysc";
243 ti,hwmods = "usb_tll_hs";
247 reg-names = "rev", "sysc", "syss";
248 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
249 SYSC_OMAP2_ENAWAKEUP |
250 SYSC_OMAP2_SOFTRESET |
251 SYSC_OMAP2_AUTOIDLE)>;
252 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
255 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
256 clocks = <&l3_init_clkctrl OMAP4_USB_TLL_HS_CLKCTRL 0>;
258 #address-cells = <1>;
260 ranges = <0x0 0x62000 0x1000>;
262 usbhstll: usbhstll@0 {
263 compatible = "ti,usbhs-tll";
265 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
269 target-module@64000 { /* 0x4a064000, ap 86 1e.0 */
270 compatible = "ti,sysc-omap4", "ti,sysc";
271 ti,hwmods = "usb_host_hs";
275 reg-names = "rev", "sysc", "syss";
276 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
277 ti,sysc-midle = <SYSC_IDLE_FORCE>,
280 <SYSC_IDLE_SMART_WKUP>;
281 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
284 <SYSC_IDLE_SMART_WKUP>;
285 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
286 clocks = <&l3_init_clkctrl OMAP4_USB_HOST_HS_CLKCTRL 0>;
288 #address-cells = <1>;
290 ranges = <0x0 0x64000 0x1000>;
292 usbhshost: usbhshost@0 {
293 compatible = "ti,usbhs-host";
295 #address-cells = <1>;
297 ranges = <0 0 0x1000>;
298 clocks = <&init_60m_fclk>,
301 clock-names = "refclk_60m_int",
305 usbhsohci: ohci@800 {
306 compatible = "ti,ohci-omap3";
308 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
309 remote-wakeup-connected;
312 usbhsehci: ehci@c00 {
313 compatible = "ti,ehci-omap";
315 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
320 target-module@66000 { /* 0x4a066000, ap 25 26.0 */
321 compatible = "ti,sysc-omap2", "ti,sysc";
325 reg-names = "rev", "sysc", "syss";
326 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
327 SYSC_OMAP2_SOFTRESET |
328 SYSC_OMAP2_AUTOIDLE)>;
329 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
332 /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */
333 clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
335 resets = <&prm_tesla 1>;
336 reset-names = "rstctrl";
337 #address-cells = <1>;
339 ranges = <0x0 0x66000 0x1000>;
342 compatible = "ti,omap4-iommu";
344 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
350 segment@80000 { /* 0x4a080000 */
351 compatible = "simple-bus";
352 #address-cells = <1>;
354 ranges = <0x00059000 0x000d9000 0x001000>, /* ap 13 */
355 <0x0005a000 0x000da000 0x001000>, /* ap 14 */
356 <0x0005b000 0x000db000 0x001000>, /* ap 15 */
357 <0x0005c000 0x000dc000 0x001000>, /* ap 16 */
358 <0x0005d000 0x000dd000 0x001000>, /* ap 17 */
359 <0x0005e000 0x000de000 0x001000>, /* ap 18 */
360 <0x00060000 0x000e0000 0x001000>, /* ap 19 */
361 <0x00061000 0x000e1000 0x001000>, /* ap 20 */
362 <0x00074000 0x000f4000 0x001000>, /* ap 27 */
363 <0x00075000 0x000f5000 0x001000>, /* ap 28 */
364 <0x00076000 0x000f6000 0x001000>, /* ap 29 */
365 <0x00077000 0x000f7000 0x001000>, /* ap 30 */
366 <0x00036000 0x000b6000 0x001000>, /* ap 69 */
367 <0x00037000 0x000b7000 0x001000>, /* ap 70 */
368 <0x0004d000 0x000cd000 0x001000>, /* ap 78 */
369 <0x0004e000 0x000ce000 0x001000>, /* ap 79 */
370 <0x00029000 0x000a9000 0x001000>, /* ap 82 */
371 <0x0002a000 0x000aa000 0x001000>, /* ap 83 */
372 <0x0002b000 0x000ab000 0x001000>, /* ap 84 */
373 <0x0002c000 0x000ac000 0x001000>, /* ap 85 */
374 <0x0002d000 0x000ad000 0x001000>, /* ap 88 */
375 <0x0002e000 0x000ae000 0x001000>; /* ap 89 */
377 target-module@29000 { /* 0x4a0a9000, ap 82 04.0 */
378 compatible = "ti,sysc";
380 #address-cells = <1>;
382 ranges = <0x0 0x29000 0x1000>;
385 target-module@2b000 { /* 0x4a0ab000, ap 84 12.0 */
386 compatible = "ti,sysc-omap2", "ti,sysc";
390 reg-names = "rev", "sysc", "syss";
391 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
392 SYSC_OMAP2_SOFTRESET |
393 SYSC_OMAP2_AUTOIDLE)>;
394 ti,sysc-midle = <SYSC_IDLE_FORCE>,
397 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
400 <SYSC_IDLE_SMART_WKUP>;
402 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
403 clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
405 #address-cells = <1>;
407 ranges = <0x0 0x2b000 0x1000>;
409 usb_otg_hs: usb_otg_hs@0 {
410 compatible = "ti,omap4-musb";
412 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
413 interrupt-names = "mc", "dma";
414 usb-phy = <&usb2_phy>;
416 phy-names = "usb2-phy";
420 ctrl-module = <&omap_control_usbotg>;
424 target-module@2d000 { /* 0x4a0ad000, ap 88 0c.0 */
425 compatible = "ti,sysc-omap2", "ti,sysc";
429 reg-names = "rev", "sysc", "syss";
430 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
431 SYSC_OMAP2_AUTOIDLE)>;
432 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
436 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
437 clocks = <&l3_init_clkctrl OMAP4_OCP2SCP_USB_PHY_CLKCTRL 0>;
439 #address-cells = <1>;
441 ranges = <0x0 0x2d000 0x1000>;
444 compatible = "ti,omap-ocp2scp";
446 #address-cells = <1>;
448 ranges = <0 0 0x1000>;
449 usb2_phy: usb2phy@80 {
450 compatible = "ti,omap-usb2";
452 ctrl-module = <&omap_control_usb2phy>;
453 clocks = <&usb_phy_cm_clk32k>;
454 clock-names = "wkupclk";
461 target-module@36000 { /* 0x4a0b6000, ap 69 60.0 */
462 compatible = "ti,sysc-omap2", "ti,sysc";
466 reg-names = "rev", "sysc", "syss";
467 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
468 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
471 <SYSC_IDLE_SMART_WKUP>;
473 /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
474 clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
476 #address-cells = <1>;
478 ranges = <0x0 0x36000 0x1000>;
482 target-module@4d000 { /* 0x4a0cd000, ap 78 58.0 */
483 compatible = "ti,sysc-omap2", "ti,sysc";
487 reg-names = "rev", "sysc", "syss";
488 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
489 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
492 <SYSC_IDLE_SMART_WKUP>;
494 /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
495 clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
497 #address-cells = <1>;
499 ranges = <0x0 0x4d000 0x1000>;
502 target-module@59000 { /* 0x4a0d9000, ap 13 1a.0 */
503 compatible = "ti,sysc-omap4-sr", "ti,sysc";
506 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
507 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
510 <SYSC_IDLE_SMART_WKUP>;
511 /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
512 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
514 #address-cells = <1>;
516 ranges = <0x0 0x59000 0x1000>;
518 smartreflex_mpu: smartreflex@0 {
519 compatible = "ti,omap4-smartreflex-mpu";
521 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
525 target-module@5b000 { /* 0x4a0db000, ap 15 08.0 */
526 compatible = "ti,sysc-omap4-sr", "ti,sysc";
529 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
530 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
533 <SYSC_IDLE_SMART_WKUP>;
534 /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
535 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
537 #address-cells = <1>;
539 ranges = <0x0 0x5b000 0x1000>;
541 smartreflex_iva: smartreflex@0 {
542 compatible = "ti,omap4-smartreflex-iva";
544 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
548 target-module@5d000 { /* 0x4a0dd000, ap 17 22.0 */
549 compatible = "ti,sysc-omap4-sr", "ti,sysc";
552 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
553 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
556 <SYSC_IDLE_SMART_WKUP>;
557 /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
558 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
560 #address-cells = <1>;
562 ranges = <0x0 0x5d000 0x1000>;
564 smartreflex_core: smartreflex@0 {
565 compatible = "ti,omap4-smartreflex-core";
567 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
571 target-module@60000 { /* 0x4a0e0000, ap 19 1c.0 */
572 compatible = "ti,sysc";
574 #address-cells = <1>;
576 ranges = <0x0 0x60000 0x1000>;
579 target-module@74000 { /* 0x4a0f4000, ap 27 24.0 */
580 compatible = "ti,sysc-omap4", "ti,sysc";
583 reg-names = "rev", "sysc";
584 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
585 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
588 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
589 clocks = <&l4_cfg_clkctrl OMAP4_MAILBOX_CLKCTRL 0>;
591 #address-cells = <1>;
593 ranges = <0x0 0x74000 0x1000>;
596 compatible = "ti,omap4-mailbox";
598 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
600 ti,mbox-num-users = <3>;
601 ti,mbox-num-fifos = <8>;
603 ti,mbox-tx = <0 0 0>;
604 ti,mbox-rx = <1 0 0>;
607 ti,mbox-tx = <3 0 0>;
608 ti,mbox-rx = <2 0 0>;
613 target-module@76000 { /* 0x4a0f6000, ap 29 3a.0 */
614 compatible = "ti,sysc-omap2", "ti,sysc";
618 reg-names = "rev", "sysc", "syss";
619 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
620 SYSC_OMAP2_ENAWAKEUP |
621 SYSC_OMAP2_SOFTRESET |
622 SYSC_OMAP2_AUTOIDLE)>;
623 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
627 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
628 clocks = <&l4_cfg_clkctrl OMAP4_SPINLOCK_CLKCTRL 0>;
630 #address-cells = <1>;
632 ranges = <0x0 0x76000 0x1000>;
634 hwspinlock: spinlock@0 {
635 compatible = "ti,omap4-hwspinlock";
642 segment@100000 { /* 0x4a100000 */
643 compatible = "simple-bus";
644 #address-cells = <1>;
646 ranges = <0x00000000 0x00100000 0x001000>, /* ap 21 */
647 <0x00001000 0x00101000 0x001000>, /* ap 22 */
648 <0x00002000 0x00102000 0x001000>, /* ap 61 */
649 <0x00003000 0x00103000 0x001000>, /* ap 62 */
650 <0x00008000 0x00108000 0x001000>, /* ap 63 */
651 <0x00009000 0x00109000 0x001000>, /* ap 64 */
652 <0x0000a000 0x0010a000 0x001000>, /* ap 65 */
653 <0x0000b000 0x0010b000 0x001000>; /* ap 66 */
655 target-module@0 { /* 0x4a100000, ap 21 2a.0 */
656 compatible = "ti,sysc-omap4", "ti,sysc";
657 ti,hwmods = "ctrl_module_pad_core";
660 reg-names = "rev", "sysc";
661 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
664 <SYSC_IDLE_SMART_WKUP>;
665 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
666 #address-cells = <1>;
668 ranges = <0x0 0x0 0x1000>;
670 omap4_pmx_core: pinmux@40 {
671 compatible = "ti,omap4-padconf",
674 #address-cells = <1>;
676 #pinctrl-cells = <1>;
677 #interrupt-cells = <1>;
678 interrupt-controller;
679 pinctrl-single,register-width = <16>;
680 pinctrl-single,function-mask = <0x7fff>;
683 omap4_padconf_global: omap4_padconf_global@5a0 {
684 compatible = "syscon",
687 #address-cells = <1>;
689 ranges = <0 0x5a0 0x170>;
691 pbias_regulator: pbias_regulator@60 {
692 compatible = "ti,pbias-omap4", "ti,pbias-omap";
694 syscon = <&omap4_padconf_global>;
695 pbias_mmc_reg: pbias_mmc_omap4 {
696 regulator-name = "pbias_mmc_omap4";
697 regulator-min-microvolt = <1800000>;
698 regulator-max-microvolt = <3000000>;
704 target-module@2000 { /* 0x4a102000, ap 61 3c.0 */
705 compatible = "ti,sysc";
707 #address-cells = <1>;
709 ranges = <0x0 0x2000 0x1000>;
712 target-module@8000 { /* 0x4a108000, ap 63 62.0 */
713 compatible = "ti,sysc";
715 #address-cells = <1>;
717 ranges = <0x0 0x8000 0x1000>;
720 target-module@a000 { /* 0x4a10a000, ap 65 50.0 */
721 compatible = "ti,sysc-omap4", "ti,sysc";
724 reg-names = "rev", "sysc";
725 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
726 ti,sysc-midle = <SYSC_IDLE_FORCE>,
729 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
732 ti,sysc-delay-us = <2>;
733 /* Domains (V, P, C): core, cam_pwrdm, iss_clkdm */
734 clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
736 #address-cells = <1>;
738 ranges = <0x0 0xa000 0x1000>;
740 /* No child device binding or driver in mainline */
744 segment@180000 { /* 0x4a180000 */
745 compatible = "simple-bus";
746 #address-cells = <1>;
750 segment@200000 { /* 0x4a200000 */
751 compatible = "simple-bus";
752 #address-cells = <1>;
754 ranges = <0x0001e000 0x0021e000 0x001000>, /* ap 31 */
755 <0x0001f000 0x0021f000 0x001000>, /* ap 32 */
756 <0x0000a000 0x0020a000 0x001000>, /* ap 33 */
757 <0x0000b000 0x0020b000 0x001000>, /* ap 34 */
758 <0x00004000 0x00204000 0x001000>, /* ap 35 */
759 <0x00005000 0x00205000 0x001000>, /* ap 36 */
760 <0x00006000 0x00206000 0x001000>, /* ap 37 */
761 <0x00007000 0x00207000 0x001000>, /* ap 38 */
762 <0x00012000 0x00212000 0x001000>, /* ap 39 */
763 <0x00013000 0x00213000 0x001000>, /* ap 40 */
764 <0x0000c000 0x0020c000 0x001000>, /* ap 41 */
765 <0x0000d000 0x0020d000 0x001000>, /* ap 42 */
766 <0x00010000 0x00210000 0x001000>, /* ap 43 */
767 <0x00011000 0x00211000 0x001000>, /* ap 44 */
768 <0x00016000 0x00216000 0x001000>, /* ap 45 */
769 <0x00017000 0x00217000 0x001000>, /* ap 46 */
770 <0x00014000 0x00214000 0x001000>, /* ap 47 */
771 <0x00015000 0x00215000 0x001000>, /* ap 48 */
772 <0x00018000 0x00218000 0x001000>, /* ap 49 */
773 <0x00019000 0x00219000 0x001000>, /* ap 50 */
774 <0x00020000 0x00220000 0x001000>, /* ap 51 */
775 <0x00021000 0x00221000 0x001000>, /* ap 52 */
776 <0x00026000 0x00226000 0x001000>, /* ap 53 */
777 <0x00027000 0x00227000 0x001000>, /* ap 54 */
778 <0x00028000 0x00228000 0x001000>, /* ap 55 */
779 <0x00029000 0x00229000 0x001000>, /* ap 56 */
780 <0x0002a000 0x0022a000 0x001000>, /* ap 57 */
781 <0x0002b000 0x0022b000 0x001000>, /* ap 58 */
782 <0x0001c000 0x0021c000 0x001000>, /* ap 59 */
783 <0x0001d000 0x0021d000 0x001000>; /* ap 60 */
785 target-module@4000 { /* 0x4a204000, ap 35 42.0 */
786 compatible = "ti,sysc";
788 #address-cells = <1>;
790 ranges = <0x0 0x4000 0x1000>;
793 target-module@6000 { /* 0x4a206000, ap 37 4a.0 */
794 compatible = "ti,sysc";
796 #address-cells = <1>;
798 ranges = <0x0 0x6000 0x1000>;
801 target-module@a000 { /* 0x4a20a000, ap 33 2c.0 */
802 compatible = "ti,sysc";
804 #address-cells = <1>;
806 ranges = <0x0 0xa000 0x1000>;
809 target-module@c000 { /* 0x4a20c000, ap 41 20.0 */
810 compatible = "ti,sysc";
812 #address-cells = <1>;
814 ranges = <0x0 0xc000 0x1000>;
817 target-module@10000 { /* 0x4a210000, ap 43 52.0 */
818 compatible = "ti,sysc";
820 #address-cells = <1>;
822 ranges = <0x0 0x10000 0x1000>;
825 target-module@12000 { /* 0x4a212000, ap 39 18.0 */
826 compatible = "ti,sysc";
828 #address-cells = <1>;
830 ranges = <0x0 0x12000 0x1000>;
833 target-module@14000 { /* 0x4a214000, ap 47 30.0 */
834 compatible = "ti,sysc";
836 #address-cells = <1>;
838 ranges = <0x0 0x14000 0x1000>;
841 target-module@16000 { /* 0x4a216000, ap 45 28.0 */
842 compatible = "ti,sysc";
844 #address-cells = <1>;
846 ranges = <0x0 0x16000 0x1000>;
849 target-module@18000 { /* 0x4a218000, ap 49 38.0 */
850 compatible = "ti,sysc";
852 #address-cells = <1>;
854 ranges = <0x0 0x18000 0x1000>;
857 target-module@1c000 { /* 0x4a21c000, ap 59 5a.0 */
858 compatible = "ti,sysc";
860 #address-cells = <1>;
862 ranges = <0x0 0x1c000 0x1000>;
865 target-module@1e000 { /* 0x4a21e000, ap 31 10.0 */
866 compatible = "ti,sysc";
868 #address-cells = <1>;
870 ranges = <0x0 0x1e000 0x1000>;
873 target-module@20000 { /* 0x4a220000, ap 51 40.0 */
874 compatible = "ti,sysc";
876 #address-cells = <1>;
878 ranges = <0x0 0x20000 0x1000>;
881 target-module@26000 { /* 0x4a226000, ap 53 34.0 */
882 compatible = "ti,sysc";
884 #address-cells = <1>;
886 ranges = <0x0 0x26000 0x1000>;
889 target-module@28000 { /* 0x4a228000, ap 55 2e.0 */
890 compatible = "ti,sysc";
892 #address-cells = <1>;
894 ranges = <0x0 0x28000 0x1000>;
897 target-module@2a000 { /* 0x4a22a000, ap 57 48.0 */
898 compatible = "ti,sysc";
900 #address-cells = <1>;
902 ranges = <0x0 0x2a000 0x1000>;
906 segment@280000 { /* 0x4a280000 */
907 compatible = "simple-bus";
908 #address-cells = <1>;
912 l4_cfg_segment_300000: segment@300000 { /* 0x4a300000 */
913 compatible = "simple-bus";
914 #address-cells = <1>;
916 ranges = <0x00000000 0x00300000 0x020000>, /* ap 67 */
917 <0x00040000 0x00340000 0x001000>, /* ap 68 */
918 <0x00020000 0x00320000 0x004000>, /* ap 71 */
919 <0x00024000 0x00324000 0x002000>, /* ap 72 */
920 <0x00026000 0x00326000 0x001000>, /* ap 73 */
921 <0x00027000 0x00327000 0x001000>, /* ap 74 */
922 <0x00028000 0x00328000 0x001000>, /* ap 75 */
923 <0x00029000 0x00329000 0x001000>, /* ap 76 */
924 <0x00030000 0x00330000 0x010000>, /* ap 77 */
925 <0x0002a000 0x0032a000 0x002000>, /* ap 90 */
926 <0x0002c000 0x0032c000 0x004000>; /* ap 91 */
928 l4_cfg_target_0: target-module@0 { /* 0x4a300000, ap 67 14.0 */
929 compatible = "ti,sysc";
931 #address-cells = <1>;
933 ranges = <0x00000000 0x00000000 0x00020000>,
934 <0x00020000 0x00020000 0x00004000>,
935 <0x00024000 0x00024000 0x00002000>,
936 <0x00026000 0x00026000 0x00001000>,
937 <0x00027000 0x00027000 0x00001000>,
938 <0x00028000 0x00028000 0x00001000>,
939 <0x00029000 0x00029000 0x00001000>,
940 <0x0002a000 0x0002a000 0x00002000>,
941 <0x0002c000 0x0002c000 0x00004000>,
942 <0x00030000 0x00030000 0x00010000>;
947 &l4_wkup { /* 0x4a300000 */
948 compatible = "ti,omap4-l4-wkup", "simple-bus";
949 reg = <0x4a300000 0x800>,
952 reg-names = "ap", "la", "ia0";
953 #address-cells = <1>;
955 ranges = <0x00000000 0x4a300000 0x010000>, /* segment 0 */
956 <0x00010000 0x4a310000 0x010000>, /* segment 1 */
957 <0x00020000 0x4a320000 0x010000>; /* segment 2 */
959 segment@0 { /* 0x4a300000 */
960 compatible = "simple-bus";
961 #address-cells = <1>;
963 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
964 <0x00001000 0x00001000 0x001000>, /* ap 1 */
965 <0x00000800 0x00000800 0x000800>, /* ap 2 */
966 <0x00006000 0x00006000 0x002000>, /* ap 3 */
967 <0x00008000 0x00008000 0x001000>, /* ap 4 */
968 <0x0000a000 0x0000a000 0x001000>, /* ap 15 */
969 <0x0000b000 0x0000b000 0x001000>, /* ap 16 */
970 <0x00004000 0x00004000 0x001000>, /* ap 17 */
971 <0x00005000 0x00005000 0x001000>, /* ap 18 */
972 <0x0000c000 0x0000c000 0x001000>, /* ap 19 */
973 <0x0000d000 0x0000d000 0x001000>; /* ap 20 */
975 target-module@4000 { /* 0x4a304000, ap 17 24.0 */
976 compatible = "ti,sysc-omap2", "ti,sysc";
979 reg-names = "rev", "sysc";
980 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
982 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
983 clocks = <&l4_wkup_clkctrl OMAP4_COUNTER_32K_CLKCTRL 0>;
985 #address-cells = <1>;
987 ranges = <0x0 0x4000 0x1000>;
989 counter32k: counter@0 {
990 compatible = "ti,omap-counter32k";
995 target-module@6000 { /* 0x4a306000, ap 3 08.0 */
996 compatible = "ti,sysc-omap4", "ti,sysc";
999 #address-cells = <1>;
1001 ranges = <0x0 0x6000 0x2000>;
1004 compatible = "ti,omap4-prm", "simple-bus";
1006 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1007 #address-cells = <1>;
1009 ranges = <0 0 0x2000>;
1011 prm_clocks: clocks {
1012 #address-cells = <1>;
1016 prm_clockdomains: clockdomains {
1021 target-module@a000 { /* 0x4a30a000, ap 15 34.0 */
1022 compatible = "ti,sysc-omap4", "ti,sysc";
1025 #address-cells = <1>;
1027 ranges = <0x0 0xa000 0x1000>;
1030 compatible = "ti,omap4-scrm";
1033 scrm_clocks: clocks {
1034 #address-cells = <1>;
1038 scrm_clockdomains: clockdomains {
1043 target-module@c000 { /* 0x4a30c000, ap 19 2c.0 */
1044 compatible = "ti,sysc-omap4", "ti,sysc";
1045 ti,hwmods = "ctrl_module_wkup";
1048 reg-names = "rev", "sysc";
1049 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1052 <SYSC_IDLE_SMART_WKUP>;
1053 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1054 #address-cells = <1>;
1056 ranges = <0x0 0xc000 0x1000>;
1058 omap4_scm_wkup: scm@c000 {
1059 compatible = "ti,omap4-scm-wkup";
1060 reg = <0xc000 0x1000>;
1065 segment@10000 { /* 0x4a310000 */
1066 compatible = "simple-bus";
1067 #address-cells = <1>;
1069 ranges = <0x00000000 0x00010000 0x001000>, /* ap 5 */
1070 <0x00001000 0x00011000 0x001000>, /* ap 6 */
1071 <0x00004000 0x00014000 0x001000>, /* ap 7 */
1072 <0x00005000 0x00015000 0x001000>, /* ap 8 */
1073 <0x00008000 0x00018000 0x001000>, /* ap 9 */
1074 <0x00009000 0x00019000 0x001000>, /* ap 10 */
1075 <0x0000c000 0x0001c000 0x001000>, /* ap 11 */
1076 <0x0000d000 0x0001d000 0x001000>, /* ap 12 */
1077 <0x0000e000 0x0001e000 0x001000>, /* ap 21 */
1078 <0x0000f000 0x0001f000 0x001000>; /* ap 22 */
1080 gpio1_target: target-module@0 { /* 0x4a310000, ap 5 14.0 */
1081 compatible = "ti,sysc-omap2", "ti,sysc";
1085 reg-names = "rev", "sysc", "syss";
1086 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1087 SYSC_OMAP2_SOFTRESET |
1088 SYSC_OMAP2_AUTOIDLE)>;
1089 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1092 <SYSC_IDLE_SMART_WKUP>;
1094 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1095 clocks = <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 0>,
1096 <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 8>;
1097 clock-names = "fck", "dbclk";
1098 #address-cells = <1>;
1100 ranges = <0x0 0x0 0x1000>;
1103 compatible = "ti,omap4-gpio";
1105 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1109 interrupt-controller;
1110 #interrupt-cells = <2>;
1114 target-module@4000 { /* 0x4a314000, ap 7 18.0 */
1115 compatible = "ti,sysc-omap2", "ti,sysc";
1119 reg-names = "rev", "sysc", "syss";
1120 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
1121 SYSC_OMAP2_SOFTRESET)>;
1122 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1125 <SYSC_IDLE_SMART_WKUP>;
1127 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1128 clocks = <&l4_wkup_clkctrl OMAP4_WD_TIMER2_CLKCTRL 0>;
1129 clock-names = "fck";
1130 #address-cells = <1>;
1132 ranges = <0x0 0x4000 0x1000>;
1135 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
1137 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
1141 timer1_target: target-module@8000 { /* 0x4a318000, ap 9 1c.0 */
1142 compatible = "ti,sysc-omap2-timer", "ti,sysc";
1146 reg-names = "rev", "sysc", "syss";
1147 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1148 SYSC_OMAP2_EMUFREE |
1149 SYSC_OMAP2_ENAWAKEUP |
1150 SYSC_OMAP2_SOFTRESET |
1151 SYSC_OMAP2_AUTOIDLE)>;
1152 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1156 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1157 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 0>;
1158 clock-names = "fck";
1159 #address-cells = <1>;
1161 ranges = <0x0 0x8000 0x1000>;
1164 compatible = "ti,omap3430-timer";
1166 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
1167 clock-names = "fck";
1168 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1173 target-module@c000 { /* 0x4a31c000, ap 11 20.0 */
1174 compatible = "ti,sysc-omap2", "ti,sysc";
1178 reg-names = "rev", "sysc", "syss";
1179 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1180 SYSC_OMAP2_EMUFREE |
1181 SYSC_OMAP2_ENAWAKEUP |
1182 SYSC_OMAP2_SOFTRESET |
1183 SYSC_OMAP2_AUTOIDLE)>;
1184 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1188 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1189 clocks = <&l4_wkup_clkctrl OMAP4_KBD_CLKCTRL 0>;
1190 clock-names = "fck";
1191 #address-cells = <1>;
1193 ranges = <0x0 0xc000 0x1000>;
1196 compatible = "ti,omap4-keypad";
1198 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1203 target-module@e000 { /* 0x4a31e000, ap 21 30.0 */
1204 compatible = "ti,sysc-omap4", "ti,sysc";
1205 ti,hwmods = "ctrl_module_pad_wkup";
1208 reg-names = "rev", "sysc";
1209 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1212 <SYSC_IDLE_SMART_WKUP>;
1213 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1214 #address-cells = <1>;
1216 ranges = <0x0 0xe000 0x1000>;
1218 omap4_pmx_wkup: pinmux@40 {
1219 compatible = "ti,omap4-padconf",
1221 reg = <0x40 0x0038>;
1222 #address-cells = <1>;
1224 #pinctrl-cells = <1>;
1225 #interrupt-cells = <1>;
1226 interrupt-controller;
1227 pinctrl-single,register-width = <16>;
1228 pinctrl-single,function-mask = <0x7fff>;
1233 segment@20000 { /* 0x4a320000 */
1234 compatible = "simple-bus";
1235 #address-cells = <1>;
1237 ranges = <0x00006000 0x00026000 0x001000>, /* ap 13 */
1238 <0x0000a000 0x0002a000 0x001000>, /* ap 14 */
1239 <0x00000000 0x00020000 0x001000>, /* ap 23 */
1240 <0x00001000 0x00021000 0x001000>, /* ap 24 */
1241 <0x00002000 0x00022000 0x001000>, /* ap 25 */
1242 <0x00003000 0x00023000 0x001000>, /* ap 26 */
1243 <0x00004000 0x00024000 0x001000>, /* ap 27 */
1244 <0x00005000 0x00025000 0x001000>, /* ap 28 */
1245 <0x00007000 0x00027000 0x000400>, /* ap 29 */
1246 <0x00008000 0x00028000 0x000800>, /* ap 30 */
1247 <0x00009000 0x00029000 0x000400>; /* ap 31 */
1249 target-module@0 { /* 0x4a320000, ap 23 04.0 */
1250 compatible = "ti,sysc";
1251 status = "disabled";
1252 #address-cells = <1>;
1254 ranges = <0x0 0x0 0x1000>;
1257 target-module@2000 { /* 0x4a322000, ap 25 0c.0 */
1258 compatible = "ti,sysc";
1259 status = "disabled";
1260 #address-cells = <1>;
1262 ranges = <0x0 0x2000 0x1000>;
1265 target-module@4000 { /* 0x4a324000, ap 27 10.0 */
1266 compatible = "ti,sysc";
1267 status = "disabled";
1268 #address-cells = <1>;
1270 ranges = <0x0 0x4000 0x1000>;
1273 target-module@6000 { /* 0x4a326000, ap 13 28.0 */
1274 compatible = "ti,sysc";
1275 status = "disabled";
1276 #address-cells = <1>;
1278 ranges = <0x00000000 0x00006000 0x00001000>,
1279 <0x00001000 0x00007000 0x00000400>,
1280 <0x00002000 0x00008000 0x00000800>,
1281 <0x00003000 0x00009000 0x00000400>;
1286 &l4_per { /* 0x48000000 */
1287 compatible = "ti,omap4-l4-per", "simple-bus";
1288 reg = <0x48000000 0x800>,
1294 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
1295 #address-cells = <1>;
1297 ranges = <0x00000000 0x48000000 0x200000>, /* segment 0 */
1298 <0x00200000 0x48200000 0x200000>; /* segment 1 */
1300 segment@0 { /* 0x48000000 */
1301 compatible = "simple-bus";
1302 #address-cells = <1>;
1304 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
1305 <0x00001000 0x00001000 0x000400>, /* ap 1 */
1306 <0x00000800 0x00000800 0x000800>, /* ap 2 */
1307 <0x00020000 0x00020000 0x001000>, /* ap 3 */
1308 <0x00021000 0x00021000 0x001000>, /* ap 4 */
1309 <0x00032000 0x00032000 0x001000>, /* ap 5 */
1310 <0x00033000 0x00033000 0x001000>, /* ap 6 */
1311 <0x00034000 0x00034000 0x001000>, /* ap 7 */
1312 <0x00035000 0x00035000 0x001000>, /* ap 8 */
1313 <0x00036000 0x00036000 0x001000>, /* ap 9 */
1314 <0x00037000 0x00037000 0x001000>, /* ap 10 */
1315 <0x0003e000 0x0003e000 0x001000>, /* ap 11 */
1316 <0x0003f000 0x0003f000 0x001000>, /* ap 12 */
1317 <0x00040000 0x00040000 0x010000>, /* ap 13 */
1318 <0x00050000 0x00050000 0x001000>, /* ap 14 */
1319 <0x00055000 0x00055000 0x001000>, /* ap 15 */
1320 <0x00056000 0x00056000 0x001000>, /* ap 16 */
1321 <0x00057000 0x00057000 0x001000>, /* ap 17 */
1322 <0x00058000 0x00058000 0x001000>, /* ap 18 */
1323 <0x00059000 0x00059000 0x001000>, /* ap 19 */
1324 <0x0005a000 0x0005a000 0x001000>, /* ap 20 */
1325 <0x0005b000 0x0005b000 0x001000>, /* ap 21 */
1326 <0x0005c000 0x0005c000 0x001000>, /* ap 22 */
1327 <0x0005d000 0x0005d000 0x001000>, /* ap 23 */
1328 <0x0005e000 0x0005e000 0x001000>, /* ap 24 */
1329 <0x00060000 0x00060000 0x001000>, /* ap 25 */
1330 <0x0006a000 0x0006a000 0x001000>, /* ap 26 */
1331 <0x0006b000 0x0006b000 0x001000>, /* ap 27 */
1332 <0x0006c000 0x0006c000 0x001000>, /* ap 28 */
1333 <0x0006d000 0x0006d000 0x001000>, /* ap 29 */
1334 <0x0006e000 0x0006e000 0x001000>, /* ap 30 */
1335 <0x0006f000 0x0006f000 0x001000>, /* ap 31 */
1336 <0x00070000 0x00070000 0x001000>, /* ap 32 */
1337 <0x00071000 0x00071000 0x001000>, /* ap 33 */
1338 <0x00072000 0x00072000 0x001000>, /* ap 34 */
1339 <0x00073000 0x00073000 0x001000>, /* ap 35 */
1340 <0x00061000 0x00061000 0x001000>, /* ap 36 */
1341 <0x00096000 0x00096000 0x001000>, /* ap 37 */
1342 <0x00097000 0x00097000 0x001000>, /* ap 38 */
1343 <0x00076000 0x00076000 0x001000>, /* ap 39 */
1344 <0x00077000 0x00077000 0x001000>, /* ap 40 */
1345 <0x00078000 0x00078000 0x001000>, /* ap 41 */
1346 <0x00079000 0x00079000 0x001000>, /* ap 42 */
1347 <0x00086000 0x00086000 0x001000>, /* ap 43 */
1348 <0x00087000 0x00087000 0x001000>, /* ap 44 */
1349 <0x00088000 0x00088000 0x001000>, /* ap 45 */
1350 <0x00089000 0x00089000 0x001000>, /* ap 46 */
1351 <0x000b0000 0x000b0000 0x001000>, /* ap 47 */
1352 <0x000b1000 0x000b1000 0x001000>, /* ap 48 */
1353 <0x00098000 0x00098000 0x001000>, /* ap 49 */
1354 <0x00099000 0x00099000 0x001000>, /* ap 50 */
1355 <0x0009a000 0x0009a000 0x001000>, /* ap 51 */
1356 <0x0009b000 0x0009b000 0x001000>, /* ap 52 */
1357 <0x0009c000 0x0009c000 0x001000>, /* ap 53 */
1358 <0x0009d000 0x0009d000 0x001000>, /* ap 54 */
1359 <0x0009e000 0x0009e000 0x001000>, /* ap 55 */
1360 <0x0009f000 0x0009f000 0x001000>, /* ap 56 */
1361 <0x00090000 0x00090000 0x002000>, /* ap 57 */
1362 <0x00092000 0x00092000 0x001000>, /* ap 58 */
1363 <0x000a4000 0x000a4000 0x001000>, /* ap 59 */
1364 <0x000a6000 0x000a6000 0x001000>, /* ap 60 */
1365 <0x000a8000 0x000a8000 0x004000>, /* ap 61 */
1366 <0x000ac000 0x000ac000 0x001000>, /* ap 62 */
1367 <0x000ad000 0x000ad000 0x001000>, /* ap 63 */
1368 <0x000ae000 0x000ae000 0x001000>, /* ap 64 */
1369 <0x000b2000 0x000b2000 0x001000>, /* ap 65 */
1370 <0x000b3000 0x000b3000 0x001000>, /* ap 66 */
1371 <0x000b4000 0x000b4000 0x001000>, /* ap 67 */
1372 <0x000b5000 0x000b5000 0x001000>, /* ap 68 */
1373 <0x000b8000 0x000b8000 0x001000>, /* ap 69 */
1374 <0x000b9000 0x000b9000 0x001000>, /* ap 70 */
1375 <0x000ba000 0x000ba000 0x001000>, /* ap 71 */
1376 <0x000bb000 0x000bb000 0x001000>, /* ap 72 */
1377 <0x000d1000 0x000d1000 0x001000>, /* ap 73 */
1378 <0x000d2000 0x000d2000 0x001000>, /* ap 74 */
1379 <0x000d5000 0x000d5000 0x001000>, /* ap 75 */
1380 <0x000d6000 0x000d6000 0x001000>, /* ap 76 */
1381 <0x000a2000 0x000a2000 0x001000>, /* ap 79 */
1382 <0x000a3000 0x000a3000 0x001000>, /* ap 80 */
1383 <0x00001400 0x00001400 0x000400>, /* ap 81 */
1384 <0x00001800 0x00001800 0x000400>, /* ap 82 */
1385 <0x00001c00 0x00001c00 0x000400>, /* ap 83 */
1386 <0x000a5000 0x000a5000 0x001000>; /* ap 84 */
1388 target-module@20000 { /* 0x48020000, ap 3 06.0 */
1389 compatible = "ti,sysc-omap2", "ti,sysc";
1390 reg = <0x20050 0x4>,
1393 reg-names = "rev", "sysc", "syss";
1394 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1395 SYSC_OMAP2_SOFTRESET |
1396 SYSC_OMAP2_AUTOIDLE)>;
1397 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1400 <SYSC_IDLE_SMART_WKUP>;
1402 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1403 clocks = <&l4_per_clkctrl OMAP4_UART3_CLKCTRL 0>;
1404 clock-names = "fck";
1405 #address-cells = <1>;
1407 ranges = <0x0 0x20000 0x1000>;
1410 compatible = "ti,omap4-uart";
1412 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1413 clock-frequency = <48000000>;
1417 target-module@32000 { /* 0x48032000, ap 5 02.0 */
1418 compatible = "ti,sysc-omap2-timer", "ti,sysc";
1419 reg = <0x32000 0x4>,
1422 reg-names = "rev", "sysc", "syss";
1423 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1424 SYSC_OMAP2_EMUFREE |
1425 SYSC_OMAP2_ENAWAKEUP |
1426 SYSC_OMAP2_SOFTRESET |
1427 SYSC_OMAP2_AUTOIDLE)>;
1428 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1432 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1433 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 0>;
1434 clock-names = "fck";
1435 #address-cells = <1>;
1437 ranges = <0x0 0x32000 0x1000>;
1440 compatible = "ti,omap3430-timer";
1442 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>;
1443 clock-names = "fck";
1444 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1448 target-module@34000 { /* 0x48034000, ap 7 04.0 */
1449 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1450 reg = <0x34000 0x4>,
1452 reg-names = "rev", "sysc";
1453 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1454 SYSC_OMAP4_SOFTRESET)>;
1455 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1458 <SYSC_IDLE_SMART_WKUP>;
1459 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1460 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 0>;
1461 clock-names = "fck";
1462 #address-cells = <1>;
1464 ranges = <0x0 0x34000 0x1000>;
1467 compatible = "ti,omap4430-timer";
1469 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>;
1470 clock-names = "fck";
1471 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1475 target-module@36000 { /* 0x48036000, ap 9 0e.0 */
1476 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1477 reg = <0x36000 0x4>,
1479 reg-names = "rev", "sysc";
1480 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1481 SYSC_OMAP4_SOFTRESET)>;
1482 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1485 <SYSC_IDLE_SMART_WKUP>;
1486 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1487 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 0>;
1488 clock-names = "fck";
1489 #address-cells = <1>;
1491 ranges = <0x0 0x36000 0x1000>;
1494 compatible = "ti,omap4430-timer";
1496 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>;
1497 clock-names = "fck";
1498 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1502 target-module@3e000 { /* 0x4803e000, ap 11 08.0 */
1503 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1504 reg = <0x3e000 0x4>,
1506 reg-names = "rev", "sysc";
1507 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1508 SYSC_OMAP4_SOFTRESET)>;
1509 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1512 <SYSC_IDLE_SMART_WKUP>;
1513 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1514 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 0>;
1515 clock-names = "fck";
1516 #address-cells = <1>;
1518 ranges = <0x0 0x3e000 0x1000>;
1521 compatible = "ti,omap4430-timer";
1523 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
1524 clock-names = "fck";
1525 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1530 /* Unused DSS L4 access, see L3 instead */
1531 target-module@40000 { /* 0x48040000, ap 13 0a.0 */
1532 compatible = "ti,sysc";
1533 status = "disabled";
1534 #address-cells = <1>;
1536 ranges = <0x0 0x40000 0x10000>;
1539 target-module@55000 { /* 0x48055000, ap 15 0c.0 */
1540 compatible = "ti,sysc-omap2", "ti,sysc";
1541 reg = <0x55000 0x4>,
1544 reg-names = "rev", "sysc", "syss";
1545 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1546 SYSC_OMAP2_SOFTRESET |
1547 SYSC_OMAP2_AUTOIDLE)>;
1548 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1551 <SYSC_IDLE_SMART_WKUP>;
1553 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1554 clocks = <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 0>,
1555 <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 8>;
1556 clock-names = "fck", "dbclk";
1557 #address-cells = <1>;
1559 ranges = <0x0 0x55000 0x1000>;
1562 compatible = "ti,omap4-gpio";
1564 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1567 interrupt-controller;
1568 #interrupt-cells = <2>;
1572 target-module@57000 { /* 0x48057000, ap 17 16.0 */
1573 compatible = "ti,sysc-omap2", "ti,sysc";
1574 reg = <0x57000 0x4>,
1577 reg-names = "rev", "sysc", "syss";
1578 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1579 SYSC_OMAP2_SOFTRESET |
1580 SYSC_OMAP2_AUTOIDLE)>;
1581 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1584 <SYSC_IDLE_SMART_WKUP>;
1586 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1587 clocks = <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 0>,
1588 <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 8>;
1589 clock-names = "fck", "dbclk";
1590 #address-cells = <1>;
1592 ranges = <0x0 0x57000 0x1000>;
1595 compatible = "ti,omap4-gpio";
1597 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1600 interrupt-controller;
1601 #interrupt-cells = <2>;
1605 target-module@59000 { /* 0x48059000, ap 19 10.0 */
1606 compatible = "ti,sysc-omap2", "ti,sysc";
1607 reg = <0x59000 0x4>,
1610 reg-names = "rev", "sysc", "syss";
1611 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1612 SYSC_OMAP2_SOFTRESET |
1613 SYSC_OMAP2_AUTOIDLE)>;
1614 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1617 <SYSC_IDLE_SMART_WKUP>;
1619 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1620 clocks = <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 0>,
1621 <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 8>;
1622 clock-names = "fck", "dbclk";
1623 #address-cells = <1>;
1625 ranges = <0x0 0x59000 0x1000>;
1628 compatible = "ti,omap4-gpio";
1630 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1633 interrupt-controller;
1634 #interrupt-cells = <2>;
1638 target-module@5b000 { /* 0x4805b000, ap 21 12.0 */
1639 compatible = "ti,sysc-omap2", "ti,sysc";
1640 reg = <0x5b000 0x4>,
1643 reg-names = "rev", "sysc", "syss";
1644 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1645 SYSC_OMAP2_SOFTRESET |
1646 SYSC_OMAP2_AUTOIDLE)>;
1647 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1650 <SYSC_IDLE_SMART_WKUP>;
1652 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1653 clocks = <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 0>,
1654 <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 8>;
1655 clock-names = "fck", "dbclk";
1656 #address-cells = <1>;
1658 ranges = <0x0 0x5b000 0x1000>;
1661 compatible = "ti,omap4-gpio";
1663 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1666 interrupt-controller;
1667 #interrupt-cells = <2>;
1671 target-module@5d000 { /* 0x4805d000, ap 23 14.0 */
1672 compatible = "ti,sysc-omap2", "ti,sysc";
1673 reg = <0x5d000 0x4>,
1676 reg-names = "rev", "sysc", "syss";
1677 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1678 SYSC_OMAP2_SOFTRESET |
1679 SYSC_OMAP2_AUTOIDLE)>;
1680 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1683 <SYSC_IDLE_SMART_WKUP>;
1685 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1686 clocks = <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 0>,
1687 <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 8>;
1688 clock-names = "fck", "dbclk";
1689 #address-cells = <1>;
1691 ranges = <0x0 0x5d000 0x1000>;
1694 compatible = "ti,omap4-gpio";
1696 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1699 interrupt-controller;
1700 #interrupt-cells = <2>;
1704 target-module@60000 { /* 0x48060000, ap 25 1e.0 */
1705 compatible = "ti,sysc-omap2", "ti,sysc";
1706 reg = <0x60000 0x8>,
1709 reg-names = "rev", "sysc", "syss";
1710 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1711 SYSC_OMAP2_ENAWAKEUP |
1712 SYSC_OMAP2_SOFTRESET |
1713 SYSC_OMAP2_AUTOIDLE)>;
1714 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1717 <SYSC_IDLE_SMART_WKUP>;
1719 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1720 clocks = <&l4_per_clkctrl OMAP4_I2C3_CLKCTRL 0>;
1721 clock-names = "fck";
1722 #address-cells = <1>;
1724 ranges = <0x0 0x60000 0x1000>;
1727 compatible = "ti,omap4-i2c";
1729 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1730 #address-cells = <1>;
1735 target-module@6a000 { /* 0x4806a000, ap 26 18.0 */
1736 compatible = "ti,sysc-omap2", "ti,sysc";
1737 reg = <0x6a050 0x4>,
1740 reg-names = "rev", "sysc", "syss";
1741 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1742 SYSC_OMAP2_SOFTRESET |
1743 SYSC_OMAP2_AUTOIDLE)>;
1744 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1747 <SYSC_IDLE_SMART_WKUP>;
1749 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1750 clocks = <&l4_per_clkctrl OMAP4_UART1_CLKCTRL 0>;
1751 clock-names = "fck";
1752 #address-cells = <1>;
1754 ranges = <0x0 0x6a000 0x1000>;
1757 compatible = "ti,omap4-uart";
1759 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1760 clock-frequency = <48000000>;
1764 target-module@6c000 { /* 0x4806c000, ap 28 20.0 */
1765 compatible = "ti,sysc-omap2", "ti,sysc";
1766 reg = <0x6c050 0x4>,
1769 reg-names = "rev", "sysc", "syss";
1770 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1771 SYSC_OMAP2_SOFTRESET |
1772 SYSC_OMAP2_AUTOIDLE)>;
1773 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1776 <SYSC_IDLE_SMART_WKUP>;
1778 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1779 clocks = <&l4_per_clkctrl OMAP4_UART2_CLKCTRL 0>;
1780 clock-names = "fck";
1781 #address-cells = <1>;
1783 ranges = <0x0 0x6c000 0x1000>;
1786 compatible = "ti,omap4-uart";
1788 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1789 clock-frequency = <48000000>;
1793 target-module@6e000 { /* 0x4806e000, ap 30 1c.1 */
1794 compatible = "ti,sysc-omap2", "ti,sysc";
1795 reg = <0x6e050 0x4>,
1798 reg-names = "rev", "sysc", "syss";
1799 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1800 SYSC_OMAP2_SOFTRESET |
1801 SYSC_OMAP2_AUTOIDLE)>;
1802 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1805 <SYSC_IDLE_SMART_WKUP>;
1807 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1808 clocks = <&l4_per_clkctrl OMAP4_UART4_CLKCTRL 0>;
1809 clock-names = "fck";
1810 #address-cells = <1>;
1812 ranges = <0x0 0x6e000 0x1000>;
1815 compatible = "ti,omap4-uart";
1817 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1818 clock-frequency = <48000000>;
1822 target-module@70000 { /* 0x48070000, ap 32 28.0 */
1823 compatible = "ti,sysc-omap2", "ti,sysc";
1824 reg = <0x70000 0x8>,
1827 reg-names = "rev", "sysc", "syss";
1828 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1829 SYSC_OMAP2_ENAWAKEUP |
1830 SYSC_OMAP2_SOFTRESET |
1831 SYSC_OMAP2_AUTOIDLE)>;
1832 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1835 <SYSC_IDLE_SMART_WKUP>;
1837 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1838 clocks = <&l4_per_clkctrl OMAP4_I2C1_CLKCTRL 0>;
1839 clock-names = "fck";
1840 #address-cells = <1>;
1842 ranges = <0x0 0x70000 0x1000>;
1845 compatible = "ti,omap4-i2c";
1847 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1848 #address-cells = <1>;
1853 target-module@72000 { /* 0x48072000, ap 34 30.0 */
1854 compatible = "ti,sysc-omap2", "ti,sysc";
1855 reg = <0x72000 0x8>,
1858 reg-names = "rev", "sysc", "syss";
1859 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1860 SYSC_OMAP2_ENAWAKEUP |
1861 SYSC_OMAP2_SOFTRESET |
1862 SYSC_OMAP2_AUTOIDLE)>;
1863 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1866 <SYSC_IDLE_SMART_WKUP>;
1868 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1869 clocks = <&l4_per_clkctrl OMAP4_I2C2_CLKCTRL 0>;
1870 clock-names = "fck";
1871 #address-cells = <1>;
1873 ranges = <0x0 0x72000 0x1000>;
1876 compatible = "ti,omap4-i2c";
1878 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1879 #address-cells = <1>;
1884 target-module@76000 { /* 0x48076000, ap 39 38.0 */
1885 compatible = "ti,sysc-omap4", "ti,sysc";
1886 reg = <0x76000 0x4>,
1888 reg-names = "rev", "sysc";
1889 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1890 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1893 <SYSC_IDLE_SMART_WKUP>;
1894 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1895 clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
1896 clock-names = "fck";
1897 #address-cells = <1>;
1899 ranges = <0x0 0x76000 0x1000>;
1901 /* No child device binding or driver in mainline */
1904 target-module@78000 { /* 0x48078000, ap 41 1a.0 */
1905 compatible = "ti,sysc-omap2", "ti,sysc";
1906 reg = <0x78000 0x4>,
1909 reg-names = "rev", "sysc", "syss";
1910 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1911 SYSC_OMAP2_SOFTRESET |
1912 SYSC_OMAP2_AUTOIDLE)>;
1913 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1917 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1918 clocks = <&l4_per_clkctrl OMAP4_ELM_CLKCTRL 0>;
1919 clock-names = "fck";
1920 #address-cells = <1>;
1922 ranges = <0x0 0x78000 0x1000>;
1925 compatible = "ti,am3352-elm";
1927 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1928 status = "disabled";
1932 target-module@86000 { /* 0x48086000, ap 43 24.0 */
1933 compatible = "ti,sysc-omap2-timer", "ti,sysc";
1934 reg = <0x86000 0x4>,
1937 reg-names = "rev", "sysc", "syss";
1938 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1939 SYSC_OMAP2_EMUFREE |
1940 SYSC_OMAP2_ENAWAKEUP |
1941 SYSC_OMAP2_SOFTRESET |
1942 SYSC_OMAP2_AUTOIDLE)>;
1943 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1947 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1948 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 0>;
1949 clock-names = "fck";
1950 #address-cells = <1>;
1952 ranges = <0x0 0x86000 0x1000>;
1955 compatible = "ti,omap3430-timer";
1957 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>;
1958 clock-names = "fck";
1959 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1964 target-module@88000 { /* 0x48088000, ap 45 2e.0 */
1965 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1966 reg = <0x88000 0x4>,
1968 reg-names = "rev", "sysc";
1969 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1970 SYSC_OMAP4_SOFTRESET)>;
1971 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1974 <SYSC_IDLE_SMART_WKUP>;
1975 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1976 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 0>;
1977 clock-names = "fck";
1978 #address-cells = <1>;
1980 ranges = <0x0 0x88000 0x1000>;
1983 compatible = "ti,omap4430-timer";
1985 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>;
1986 clock-names = "fck";
1987 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1992 rng_target: target-module@90000 { /* 0x48090000, ap 57 2a.0 */
1993 compatible = "ti,sysc-omap2", "ti,sysc";
1994 reg = <0x91fe0 0x4>,
1996 reg-names = "rev", "sysc";
1997 ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
1998 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2000 /* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
2001 clocks = <&l4_secure_clkctrl OMAP4_RNG_CLKCTRL 0>;
2002 clock-names = "fck";
2003 #address-cells = <1>;
2005 ranges = <0x0 0x90000 0x2000>;
2008 compatible = "ti,omap4-rng";
2010 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
2014 target-module@96000 { /* 0x48096000, ap 37 26.0 */
2015 compatible = "ti,sysc-omap2", "ti,sysc";
2016 reg = <0x9608c 0x4>;
2018 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2019 SYSC_OMAP2_ENAWAKEUP |
2020 SYSC_OMAP2_SOFTRESET)>;
2021 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2024 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2025 clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 0>;
2026 clock-names = "fck";
2027 #address-cells = <1>;
2029 ranges = <0x0 0x96000 0x1000>;
2032 compatible = "ti,omap4-mcbsp";
2033 reg = <0x0 0xff>; /* L4 Interconnect */
2035 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2036 interrupt-names = "common";
2037 ti,buffer-size = <128>;
2040 dma-names = "tx", "rx";
2041 status = "disabled";
2045 target-module@98000 { /* 0x48098000, ap 49 22.0 */
2046 compatible = "ti,sysc-omap4", "ti,sysc";
2047 reg = <0x98000 0x4>,
2049 reg-names = "rev", "sysc";
2050 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2051 SYSC_OMAP4_SOFTRESET)>;
2052 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2055 <SYSC_IDLE_SMART_WKUP>;
2056 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2057 clocks = <&l4_per_clkctrl OMAP4_MCSPI1_CLKCTRL 0>;
2058 clock-names = "fck";
2059 #address-cells = <1>;
2061 ranges = <0x0 0x98000 0x1000>;
2064 compatible = "ti,omap4-mcspi";
2066 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
2067 #address-cells = <1>;
2069 ti,spi-num-cs = <4>;
2078 dma-names = "tx0", "rx0", "tx1", "rx1",
2079 "tx2", "rx2", "tx3", "rx3";
2083 target-module@9a000 { /* 0x4809a000, ap 51 2c.0 */
2084 compatible = "ti,sysc-omap4", "ti,sysc";
2085 reg = <0x9a000 0x4>,
2087 reg-names = "rev", "sysc";
2088 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2089 SYSC_OMAP4_SOFTRESET)>;
2090 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2093 <SYSC_IDLE_SMART_WKUP>;
2094 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2095 clocks = <&l4_per_clkctrl OMAP4_MCSPI2_CLKCTRL 0>;
2096 clock-names = "fck";
2097 #address-cells = <1>;
2099 ranges = <0x0 0x9a000 0x1000>;
2102 compatible = "ti,omap4-mcspi";
2104 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
2105 #address-cells = <1>;
2107 ti,spi-num-cs = <2>;
2112 dma-names = "tx0", "rx0", "tx1", "rx1";
2116 target-module@9c000 { /* 0x4809c000, ap 53 36.0 */
2117 compatible = "ti,sysc-omap4", "ti,sysc";
2118 reg = <0x9c000 0x4>,
2120 reg-names = "rev", "sysc";
2121 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2122 SYSC_OMAP4_SOFTRESET)>;
2123 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2126 <SYSC_IDLE_SMART_WKUP>;
2127 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2130 <SYSC_IDLE_SMART_WKUP>;
2131 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2132 clocks = <&l3_init_clkctrl OMAP4_MMC1_CLKCTRL 0>;
2133 clock-names = "fck";
2134 #address-cells = <1>;
2136 ranges = <0x0 0x9c000 0x1000>;
2139 compatible = "ti,omap4-hsmmc";
2141 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
2143 ti,needs-special-reset;
2144 dmas = <&sdma 61>, <&sdma 62>;
2145 dma-names = "tx", "rx";
2146 pbias-supply = <&pbias_mmc_reg>;
2150 target-module@9e000 { /* 0x4809e000, ap 55 48.0 */
2151 compatible = "ti,sysc";
2152 status = "disabled";
2153 #address-cells = <1>;
2155 ranges = <0x0 0x9e000 0x1000>;
2158 target-module@a2000 { /* 0x480a2000, ap 79 3a.0 */
2159 compatible = "ti,sysc";
2160 status = "disabled";
2161 #address-cells = <1>;
2163 ranges = <0x0 0xa2000 0x1000>;
2166 target-module@a4000 { /* 0x480a4000, ap 59 34.0 */
2167 compatible = "ti,sysc";
2168 status = "disabled";
2169 #address-cells = <1>;
2171 ranges = <0x00000000 0x000a4000 0x00001000>,
2172 <0x00001000 0x000a5000 0x00001000>;
2175 des_target: target-module@a5000 { /* 0x480a5000 */
2176 compatible = "ti,sysc-omap2", "ti,sysc";
2177 reg = <0xa5030 0x4>,
2180 reg-names = "rev", "sysc", "syss";
2181 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2182 SYSC_OMAP2_AUTOIDLE)>;
2183 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2186 <SYSC_IDLE_SMART_WKUP>;
2188 /* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
2189 clocks = <&l4_secure_clkctrl OMAP4_DES3DES_CLKCTRL 0>;
2190 clock-names = "fck";
2191 #address-cells = <1>;
2193 ranges = <0 0xa5000 0x00001000>;
2196 compatible = "ti,omap4-des";
2198 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
2199 dmas = <&sdma 117>, <&sdma 116>;
2200 dma-names = "tx", "rx";
2204 target-module@a8000 { /* 0x480a8000, ap 61 3e.0 */
2205 compatible = "ti,sysc";
2206 status = "disabled";
2207 #address-cells = <1>;
2209 ranges = <0x0 0xa8000 0x4000>;
2212 target-module@ad000 { /* 0x480ad000, ap 63 50.0 */
2213 compatible = "ti,sysc-omap4", "ti,sysc";
2214 reg = <0xad000 0x4>,
2216 reg-names = "rev", "sysc";
2217 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2218 SYSC_OMAP4_SOFTRESET)>;
2219 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2222 <SYSC_IDLE_SMART_WKUP>;
2223 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2226 <SYSC_IDLE_SMART_WKUP>;
2227 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2228 clocks = <&l4_per_clkctrl OMAP4_MMC3_CLKCTRL 0>;
2229 clock-names = "fck";
2230 #address-cells = <1>;
2232 ranges = <0x0 0xad000 0x1000>;
2235 compatible = "ti,omap4-hsmmc";
2237 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
2238 ti,needs-special-reset;
2239 dmas = <&sdma 77>, <&sdma 78>;
2240 dma-names = "tx", "rx";
2244 target-module@b0000 { /* 0x480b0000, ap 47 40.0 */
2245 compatible = "ti,sysc";
2246 status = "disabled";
2247 #address-cells = <1>;
2249 ranges = <0x0 0xb0000 0x1000>;
2252 target-module@b2000 { /* 0x480b2000, ap 65 3c.0 */
2253 compatible = "ti,sysc-omap2", "ti,sysc";
2254 reg = <0xb2000 0x4>,
2257 reg-names = "rev", "sysc", "syss";
2258 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2259 SYSC_OMAP2_AUTOIDLE)>;
2261 ti,no-reset-on-init;
2262 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2263 clocks = <&l4_per_clkctrl OMAP4_HDQ1W_CLKCTRL 0>;
2264 clock-names = "fck";
2265 #address-cells = <1>;
2267 ranges = <0x0 0xb2000 0x1000>;
2270 compatible = "ti,omap3-1w";
2272 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
2276 target-module@b4000 { /* 0x480b4000, ap 67 46.0 */
2277 compatible = "ti,sysc-omap4", "ti,sysc";
2278 reg = <0xb4000 0x4>,
2280 reg-names = "rev", "sysc";
2281 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2282 SYSC_OMAP4_SOFTRESET)>;
2283 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2286 <SYSC_IDLE_SMART_WKUP>;
2287 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2290 <SYSC_IDLE_SMART_WKUP>;
2291 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2292 clocks = <&l3_init_clkctrl OMAP4_MMC2_CLKCTRL 0>;
2293 clock-names = "fck";
2294 #address-cells = <1>;
2296 ranges = <0x0 0xb4000 0x1000>;
2299 compatible = "ti,omap4-hsmmc";
2301 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2302 ti,needs-special-reset;
2303 dmas = <&sdma 47>, <&sdma 48>;
2304 dma-names = "tx", "rx";
2308 target-module@b8000 { /* 0x480b8000, ap 69 58.0 */
2309 compatible = "ti,sysc-omap4", "ti,sysc";
2310 reg = <0xb8000 0x4>,
2312 reg-names = "rev", "sysc";
2313 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2314 SYSC_OMAP4_SOFTRESET)>;
2315 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2318 <SYSC_IDLE_SMART_WKUP>;
2319 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2320 clocks = <&l4_per_clkctrl OMAP4_MCSPI3_CLKCTRL 0>;
2321 clock-names = "fck";
2322 #address-cells = <1>;
2324 ranges = <0x0 0xb8000 0x1000>;
2327 compatible = "ti,omap4-mcspi";
2329 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2330 #address-cells = <1>;
2332 ti,spi-num-cs = <2>;
2333 dmas = <&sdma 15>, <&sdma 16>;
2334 dma-names = "tx0", "rx0";
2338 target-module@ba000 { /* 0x480ba000, ap 71 32.0 */
2339 compatible = "ti,sysc-omap4", "ti,sysc";
2340 reg = <0xba000 0x4>,
2342 reg-names = "rev", "sysc";
2343 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2344 SYSC_OMAP4_SOFTRESET)>;
2345 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2348 <SYSC_IDLE_SMART_WKUP>;
2349 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2350 clocks = <&l4_per_clkctrl OMAP4_MCSPI4_CLKCTRL 0>;
2351 clock-names = "fck";
2352 #address-cells = <1>;
2354 ranges = <0x0 0xba000 0x1000>;
2357 compatible = "ti,omap4-mcspi";
2359 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2360 #address-cells = <1>;
2362 ti,spi-num-cs = <1>;
2363 dmas = <&sdma 70>, <&sdma 71>;
2364 dma-names = "tx0", "rx0";
2368 target-module@d1000 { /* 0x480d1000, ap 73 44.0 */
2369 compatible = "ti,sysc-omap4", "ti,sysc";
2370 reg = <0xd1000 0x4>,
2372 reg-names = "rev", "sysc";
2373 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2374 SYSC_OMAP4_SOFTRESET)>;
2375 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2378 <SYSC_IDLE_SMART_WKUP>;
2379 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2382 <SYSC_IDLE_SMART_WKUP>;
2383 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2384 clocks = <&l4_per_clkctrl OMAP4_MMC4_CLKCTRL 0>;
2385 clock-names = "fck";
2386 #address-cells = <1>;
2388 ranges = <0x0 0xd1000 0x1000>;
2391 compatible = "ti,omap4-hsmmc";
2393 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2394 ti,needs-special-reset;
2395 dmas = <&sdma 57>, <&sdma 58>;
2396 dma-names = "tx", "rx";
2400 target-module@d5000 { /* 0x480d5000, ap 75 4e.0 */
2401 compatible = "ti,sysc-omap4", "ti,sysc";
2402 reg = <0xd5000 0x4>,
2404 reg-names = "rev", "sysc";
2405 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2406 SYSC_OMAP4_SOFTRESET)>;
2407 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2410 <SYSC_IDLE_SMART_WKUP>;
2411 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2414 <SYSC_IDLE_SMART_WKUP>;
2415 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2416 clocks = <&l4_per_clkctrl OMAP4_MMC5_CLKCTRL 0>;
2417 clock-names = "fck";
2418 #address-cells = <1>;
2420 ranges = <0x0 0xd5000 0x1000>;
2423 compatible = "ti,omap4-hsmmc";
2425 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2426 ti,needs-special-reset;
2427 dmas = <&sdma 59>, <&sdma 60>;
2428 dma-names = "tx", "rx";
2433 segment@200000 { /* 0x48200000 */
2434 compatible = "simple-bus";
2435 #address-cells = <1>;
2437 ranges = <0x00150000 0x00350000 0x001000>, /* ap 77 */
2438 <0x00151000 0x00351000 0x001000>; /* ap 78 */
2440 target-module@150000 { /* 0x48350000, ap 77 4c.0 */
2441 compatible = "ti,sysc-omap2", "ti,sysc";
2442 reg = <0x150000 0x8>,
2445 reg-names = "rev", "sysc", "syss";
2446 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2447 SYSC_OMAP2_ENAWAKEUP |
2448 SYSC_OMAP2_SOFTRESET |
2449 SYSC_OMAP2_AUTOIDLE)>;
2450 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2453 <SYSC_IDLE_SMART_WKUP>;
2455 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2456 clocks = <&l4_per_clkctrl OMAP4_I2C4_CLKCTRL 0>;
2457 clock-names = "fck";
2458 #address-cells = <1>;
2460 ranges = <0x0 0x150000 0x1000>;
2463 compatible = "ti,omap4-i2c";
2465 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
2466 #address-cells = <1>;