1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the r8a77470 SoC
5 * Copyright (C) 2018 Renesas Electronics Corp.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
11 #include <dt-bindings/power/r8a77470-sysc.h>
13 compatible = "renesas,r8a77470";
28 enable-method = "renesas,apmu";
32 compatible = "arm,cortex-a7";
34 clock-frequency = <1000000000>;
35 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
36 power-domains = <&sysc R8A77470_PD_CA7_CPU0>;
37 next-level-cache = <&L2_CA7>;
42 compatible = "arm,cortex-a7";
44 clock-frequency = <1000000000>;
45 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
46 power-domains = <&sysc R8A77470_PD_CA7_CPU1>;
47 next-level-cache = <&L2_CA7>;
50 L2_CA7: cache-controller-0 {
54 power-domains = <&sysc R8A77470_PD_CA7_SCU>;
58 /* External root clock */
60 compatible = "fixed-clock";
62 /* This value must be overridden by the board. */
63 clock-frequency = <0>;
66 /* External SCIF clock */
68 compatible = "fixed-clock";
70 /* This value must be overridden by the board. */
71 clock-frequency = <0>;
75 compatible = "simple-bus";
76 interrupt-parent = <&gic>;
82 rwdt: watchdog@e6020000 {
83 compatible = "renesas,r8a77470-wdt",
84 "renesas,rcar-gen2-wdt";
85 reg = <0 0xe6020000 0 0x0c>;
86 clocks = <&cpg CPG_MOD 402>;
87 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
92 gpio0: gpio@e6050000 {
93 compatible = "renesas,gpio-r8a77470",
94 "renesas,rcar-gen2-gpio";
95 reg = <0 0xe6050000 0 0x50>;
96 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
99 gpio-ranges = <&pfc 0 0 23>;
100 #interrupt-cells = <2>;
101 interrupt-controller;
102 clocks = <&cpg CPG_MOD 912>;
103 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
107 gpio1: gpio@e6051000 {
108 compatible = "renesas,gpio-r8a77470",
109 "renesas,rcar-gen2-gpio";
110 reg = <0 0xe6051000 0 0x50>;
111 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
114 gpio-ranges = <&pfc 0 32 23>;
115 #interrupt-cells = <2>;
116 interrupt-controller;
117 clocks = <&cpg CPG_MOD 911>;
118 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
122 gpio2: gpio@e6052000 {
123 compatible = "renesas,gpio-r8a77470",
124 "renesas,rcar-gen2-gpio";
125 reg = <0 0xe6052000 0 0x50>;
126 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
129 gpio-ranges = <&pfc 0 64 32>;
130 #interrupt-cells = <2>;
131 interrupt-controller;
132 clocks = <&cpg CPG_MOD 910>;
133 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
137 gpio3: gpio@e6053000 {
138 compatible = "renesas,gpio-r8a77470",
139 "renesas,rcar-gen2-gpio";
140 reg = <0 0xe6053000 0 0x50>;
141 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
144 gpio-ranges = <&pfc 0 96 30>;
145 gpio-reserved-ranges = <17 10>;
146 #interrupt-cells = <2>;
147 interrupt-controller;
148 clocks = <&cpg CPG_MOD 909>;
149 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
153 gpio4: gpio@e6054000 {
154 compatible = "renesas,gpio-r8a77470",
155 "renesas,rcar-gen2-gpio";
156 reg = <0 0xe6054000 0 0x50>;
157 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
160 gpio-ranges = <&pfc 0 128 26>;
161 #interrupt-cells = <2>;
162 interrupt-controller;
163 clocks = <&cpg CPG_MOD 908>;
164 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
168 gpio5: gpio@e6055000 {
169 compatible = "renesas,gpio-r8a77470",
170 "renesas,rcar-gen2-gpio";
171 reg = <0 0xe6055000 0 0x50>;
172 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
175 gpio-ranges = <&pfc 0 160 32>;
176 #interrupt-cells = <2>;
177 interrupt-controller;
178 clocks = <&cpg CPG_MOD 907>;
179 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
183 pfc: pin-controller@e6060000 {
184 compatible = "renesas,pfc-r8a77470";
185 reg = <0 0xe6060000 0 0x118>;
188 cpg: clock-controller@e6150000 {
189 compatible = "renesas,r8a77470-cpg-mssr";
190 reg = <0 0xe6150000 0 0x1000>;
191 clocks = <&extal_clk>, <&usb_extal_clk>;
192 clock-names = "extal", "usb_extal";
194 #power-domain-cells = <0>;
199 compatible = "renesas,r8a77470-apmu", "renesas,apmu";
200 reg = <0 0xe6151000 0 0x188>;
201 cpus = <&cpu0 &cpu1>;
204 rst: reset-controller@e6160000 {
205 compatible = "renesas,r8a77470-rst";
206 reg = <0 0xe6160000 0 0x100>;
209 sysc: system-controller@e6180000 {
210 compatible = "renesas,r8a77470-sysc";
211 reg = <0 0xe6180000 0 0x200>;
212 #power-domain-cells = <1>;
215 irqc: interrupt-controller@e61c0000 {
216 compatible = "renesas,irqc-r8a77470", "renesas,irqc";
217 #interrupt-cells = <2>;
218 interrupt-controller;
219 reg = <0 0xe61c0000 0 0x200>;
220 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
221 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
222 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
223 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
225 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
226 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
227 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
228 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
229 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
230 clocks = <&cpg CPG_MOD 407>;
231 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
235 icram0: sram@e63a0000 {
236 compatible = "mmio-sram";
237 reg = <0 0xe63a0000 0 0x12000>;
240 icram1: sram@e63c0000 {
241 compatible = "mmio-sram";
242 reg = <0 0xe63c0000 0 0x1000>;
243 #address-cells = <1>;
245 ranges = <0 0 0xe63c0000 0x1000>;
248 compatible = "renesas,smp-sram";
253 icram2: sram@e6300000 {
254 compatible = "mmio-sram";
255 reg = <0 0xe6300000 0 0x20000>;
259 #address-cells = <1>;
261 compatible = "renesas,i2c-r8a77470",
262 "renesas,rcar-gen2-i2c";
263 reg = <0 0xe6508000 0 0x40>;
264 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
265 clocks = <&cpg CPG_MOD 931>;
266 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
268 i2c-scl-internal-delay-ns = <6>;
273 #address-cells = <1>;
275 compatible = "renesas,i2c-r8a77470",
276 "renesas,rcar-gen2-i2c";
277 reg = <0 0xe6518000 0 0x40>;
278 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
279 clocks = <&cpg CPG_MOD 930>;
280 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
282 i2c-scl-internal-delay-ns = <6>;
287 #address-cells = <1>;
289 compatible = "renesas,i2c-r8a77470",
290 "renesas,rcar-gen2-i2c";
291 reg = <0 0xe6530000 0 0x40>;
292 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
293 clocks = <&cpg CPG_MOD 929>;
294 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
296 i2c-scl-internal-delay-ns = <6>;
301 #address-cells = <1>;
303 compatible = "renesas,i2c-r8a77470",
304 "renesas,rcar-gen2-i2c";
305 reg = <0 0xe6540000 0 0x40>;
306 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
307 clocks = <&cpg CPG_MOD 928>;
308 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
310 i2c-scl-internal-delay-ns = <6>;
315 #address-cells = <1>;
317 compatible = "renesas,i2c-r8a77470",
318 "renesas,rcar-gen2-i2c";
319 reg = <0 0xe6520000 0 0x40>;
320 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
321 clocks = <&cpg CPG_MOD 927>;
322 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
324 i2c-scl-internal-delay-ns = <6>;
328 usb_dmac00: dma-controller@e65a0000 {
329 compatible = "renesas,r8a77470-usb-dmac",
331 reg = <0 0xe65a0000 0 0x100>;
332 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
333 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
334 interrupt-names = "ch0", "ch1";
335 clocks = <&cpg CPG_MOD 330>;
336 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
342 usb_dmac10: dma-controller@e65b0000 {
343 compatible = "renesas,r8a77470-usb-dmac",
345 reg = <0 0xe65b0000 0 0x100>;
346 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
347 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
348 interrupt-names = "ch0", "ch1";
349 clocks = <&cpg CPG_MOD 331>;
350 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
356 usb_dmac01: dma-controller@e65a8000 {
357 compatible = "renesas,r8a77470-usb-dmac",
359 reg = <0 0xe65a8000 0 0x100>;
360 interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH
361 GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;
362 interrupt-names = "ch0", "ch1";
363 clocks = <&cpg CPG_MOD 326>;
364 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
370 usb_dmac11: dma-controller@e65b8000 {
371 compatible = "renesas,r8a77470-usb-dmac",
373 reg = <0 0xe65b8000 0 0x100>;
374 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH
375 GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
376 interrupt-names = "ch0", "ch1";
377 clocks = <&cpg CPG_MOD 327>;
378 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
384 dmac0: dma-controller@e6700000 {
385 compatible = "renesas,dmac-r8a77470",
387 reg = <0 0xe6700000 0 0x20000>;
388 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
394 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
395 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
396 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
397 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
398 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
399 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
400 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
401 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
402 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
404 interrupt-names = "error",
405 "ch0", "ch1", "ch2", "ch3",
406 "ch4", "ch5", "ch6", "ch7",
407 "ch8", "ch9", "ch10", "ch11",
408 "ch12", "ch13", "ch14";
409 clocks = <&cpg CPG_MOD 219>;
411 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
417 dmac1: dma-controller@e6720000 {
418 compatible = "renesas,dmac-r8a77470",
420 reg = <0 0xe6720000 0 0x20000>;
421 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
422 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
423 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
424 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
425 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
426 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
427 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
428 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
429 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
430 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
431 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
433 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
435 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
437 interrupt-names = "error",
438 "ch0", "ch1", "ch2", "ch3",
439 "ch4", "ch5", "ch6", "ch7",
440 "ch8", "ch9", "ch10", "ch11",
441 "ch12", "ch13", "ch14";
442 clocks = <&cpg CPG_MOD 218>;
444 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
450 avb: ethernet@e6800000 {
451 compatible = "renesas,etheravb-r8a77470",
452 "renesas,etheravb-rcar-gen2";
453 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
454 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
455 clocks = <&cpg CPG_MOD 812>;
456 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
458 #address-cells = <1>;
463 qspi0: spi@e6b10000 {
464 compatible = "renesas,qspi-r8a77470", "renesas,qspi";
465 reg = <0 0xe6b10000 0 0x2c>;
466 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
467 clocks = <&cpg CPG_MOD 918>;
468 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
469 <&dmac1 0x17>, <&dmac1 0x18>;
470 dma-names = "tx", "rx", "tx", "rx";
471 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
473 #address-cells = <1>;
479 qspi1: spi@ee200000 {
480 compatible = "renesas,qspi-r8a77470", "renesas,qspi";
481 reg = <0 0xee200000 0 0x2c>;
482 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
483 clocks = <&cpg CPG_MOD 917>;
484 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
485 <&dmac1 0xd1>, <&dmac1 0xd2>;
486 dma-names = "tx", "rx", "tx", "rx";
487 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
489 #address-cells = <1>;
495 scif0: serial@e6e60000 {
496 compatible = "renesas,scif-r8a77470",
497 "renesas,rcar-gen2-scif", "renesas,scif";
498 reg = <0 0xe6e60000 0 0x40>;
499 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
500 clocks = <&cpg CPG_MOD 721>,
501 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
502 clock-names = "fck", "brg_int", "scif_clk";
503 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
504 <&dmac1 0x29>, <&dmac1 0x2a>;
505 dma-names = "tx", "rx", "tx", "rx";
506 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
511 scif1: serial@e6e68000 {
512 compatible = "renesas,scif-r8a77470",
513 "renesas,rcar-gen2-scif", "renesas,scif";
514 reg = <0 0xe6e68000 0 0x40>;
515 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
516 clocks = <&cpg CPG_MOD 720>,
517 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
518 clock-names = "fck", "brg_int", "scif_clk";
519 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
520 <&dmac1 0x2d>, <&dmac1 0x2e>;
521 dma-names = "tx", "rx", "tx", "rx";
522 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
527 scif2: serial@e6e58000 {
528 compatible = "renesas,scif-r8a77470",
529 "renesas,rcar-gen2-scif", "renesas,scif";
530 reg = <0 0xe6e58000 0 0x40>;
531 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
532 clocks = <&cpg CPG_MOD 719>,
533 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
534 clock-names = "fck", "brg_int", "scif_clk";
535 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
536 <&dmac1 0x2b>, <&dmac1 0x2c>;
537 dma-names = "tx", "rx", "tx", "rx";
538 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
543 scif3: serial@e6ea8000 {
544 compatible = "renesas,scif-r8a77470",
545 "renesas,rcar-gen2-scif", "renesas,scif";
546 reg = <0 0xe6ea8000 0 0x40>;
547 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
548 clocks = <&cpg CPG_MOD 718>,
549 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
550 clock-names = "fck", "brg_int", "scif_clk";
551 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
552 <&dmac1 0x2f>, <&dmac1 0x30>;
553 dma-names = "tx", "rx", "tx", "rx";
554 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
559 scif4: serial@e6ee0000 {
560 compatible = "renesas,scif-r8a77470",
561 "renesas,rcar-gen2-scif", "renesas,scif";
562 reg = <0 0xe6ee0000 0 0x40>;
563 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
564 clocks = <&cpg CPG_MOD 715>,
565 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
566 clock-names = "fck", "brg_int", "scif_clk";
567 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
568 <&dmac1 0xfb>, <&dmac1 0xfc>;
569 dma-names = "tx", "rx", "tx", "rx";
570 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
575 scif5: serial@e6ee8000 {
576 compatible = "renesas,scif-r8a77470",
577 "renesas,rcar-gen2-scif", "renesas,scif";
578 reg = <0 0xe6ee8000 0 0x40>;
579 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
580 clocks = <&cpg CPG_MOD 714>,
581 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
582 clock-names = "fck", "brg_int", "scif_clk";
583 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
584 <&dmac1 0xfd>, <&dmac1 0xfe>;
585 dma-names = "tx", "rx", "tx", "rx";
586 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
592 compatible = "renesas,sdhi-r8a77470",
593 "renesas,rcar-gen2-sdhi";
594 reg = <0 0xee100000 0 0x328>;
595 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
596 clocks = <&cpg CPG_MOD 314>;
597 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
598 <&dmac1 0xcd>, <&dmac1 0xce>;
599 dma-names = "tx", "rx", "tx", "rx";
600 max-frequency = <156000000>;
601 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
607 compatible = "renesas,sdhi-mmc-r8a77470";
608 reg = <0 0xee300000 0 0x2000>;
609 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
610 clocks = <&cpg CPG_MOD 313>;
611 max-frequency = <156000000>;
612 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
618 compatible = "renesas,sdhi-r8a77470",
619 "renesas,rcar-gen2-sdhi";
620 reg = <0 0xee160000 0 0x328>;
621 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
622 clocks = <&cpg CPG_MOD 312>;
623 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
624 <&dmac1 0xd3>, <&dmac1 0xd4>;
625 dma-names = "tx", "rx", "tx", "rx";
626 max-frequency = <78000000>;
627 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
632 gic: interrupt-controller@f1001000 {
633 compatible = "arm,gic-400";
634 #interrupt-cells = <3>;
635 #address-cells = <0>;
636 interrupt-controller;
637 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
638 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
639 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
640 clocks = <&cpg CPG_MOD 408>;
642 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
646 prr: chipid@ff000044 {
647 compatible = "renesas,prr";
648 reg = <0 0xff000044 0 4>;
651 cmt0: timer@ffca0000 {
652 compatible = "renesas,r8a77470-cmt0",
653 "renesas,rcar-gen2-cmt0";
654 reg = <0 0xffca0000 0 0x1004>;
655 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
656 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
657 clocks = <&cpg CPG_MOD 124>;
659 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
664 cmt1: timer@e6130000 {
665 compatible = "renesas,r8a77470-cmt1",
666 "renesas,rcar-gen2-cmt1";
667 reg = <0 0xe6130000 0 0x1004>;
668 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
669 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
670 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
671 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
672 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
673 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
674 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
675 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
676 clocks = <&cpg CPG_MOD 329>;
678 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
685 compatible = "arm,armv7-timer";
686 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
687 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
688 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
689 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
692 /* External USB clock - can be overridden by the board */
693 usb_extal_clk: usb_extal {
694 compatible = "fixed-clock";
696 clock-frequency = <48000000>;