2 * Device Tree Source for the r8a7790 SoC
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
13 #include <dt-bindings/clock/r8a7790-clock.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/power/r8a7790-sysc.h>
19 compatible = "renesas,r8a7790";
20 interrupt-parent = <&gic>;
47 enable-method = "renesas,apmu";
51 compatible = "arm,cortex-a15";
53 clock-frequency = <1300000000>;
54 voltage-tolerance = <1>; /* 1% */
55 clocks = <&cpg_clocks R8A7790_CLK_Z>;
56 clock-latency = <300000>; /* 300 us */
57 power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
58 next-level-cache = <&L2_CA15>;
60 /* kHz - uV - OPPs unknown yet */
61 operating-points = <1400000 1000000>,
71 compatible = "arm,cortex-a15";
73 clock-frequency = <1300000000>;
74 power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
75 next-level-cache = <&L2_CA15>;
80 compatible = "arm,cortex-a15";
82 clock-frequency = <1300000000>;
83 power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
84 next-level-cache = <&L2_CA15>;
89 compatible = "arm,cortex-a15";
91 clock-frequency = <1300000000>;
92 power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
93 next-level-cache = <&L2_CA15>;
98 compatible = "arm,cortex-a7";
100 clock-frequency = <780000000>;
101 power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
102 next-level-cache = <&L2_CA7>;
107 compatible = "arm,cortex-a7";
109 clock-frequency = <780000000>;
110 power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
111 next-level-cache = <&L2_CA7>;
116 compatible = "arm,cortex-a7";
118 clock-frequency = <780000000>;
119 power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
120 next-level-cache = <&L2_CA7>;
125 compatible = "arm,cortex-a7";
127 clock-frequency = <780000000>;
128 power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
129 next-level-cache = <&L2_CA7>;
132 L2_CA15: cache-controller-0 {
133 compatible = "cache";
134 power-domains = <&sysc R8A7790_PD_CA15_SCU>;
139 L2_CA7: cache-controller-1 {
140 compatible = "cache";
141 power-domains = <&sysc R8A7790_PD_CA7_SCU>;
148 cpu_thermal: cpu-thermal {
149 polling-delay-passive = <0>;
152 thermal-sensors = <&thermal>;
156 temperature = <115000>;
167 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
168 reg = <0 0xe6151000 0 0x188>;
169 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
173 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
174 reg = <0 0xe6152000 0 0x188>;
175 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
178 gic: interrupt-controller@f1001000 {
179 compatible = "arm,gic-400";
180 #interrupt-cells = <3>;
181 #address-cells = <0>;
182 interrupt-controller;
183 reg = <0 0xf1001000 0 0x1000>,
184 <0 0xf1002000 0 0x2000>,
185 <0 0xf1004000 0 0x2000>,
186 <0 0xf1006000 0 0x2000>;
187 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
188 clocks = <&mstp4_clks R8A7790_CLK_INTC_SYS>;
190 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
193 gpio0: gpio@e6050000 {
194 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
195 reg = <0 0xe6050000 0 0x50>;
196 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
199 gpio-ranges = <&pfc 0 0 32>;
200 #interrupt-cells = <2>;
201 interrupt-controller;
202 clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
203 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
206 gpio1: gpio@e6051000 {
207 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
208 reg = <0 0xe6051000 0 0x50>;
209 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
212 gpio-ranges = <&pfc 0 32 30>;
213 #interrupt-cells = <2>;
214 interrupt-controller;
215 clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
216 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
219 gpio2: gpio@e6052000 {
220 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
221 reg = <0 0xe6052000 0 0x50>;
222 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
225 gpio-ranges = <&pfc 0 64 30>;
226 #interrupt-cells = <2>;
227 interrupt-controller;
228 clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
229 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
232 gpio3: gpio@e6053000 {
233 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
234 reg = <0 0xe6053000 0 0x50>;
235 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
238 gpio-ranges = <&pfc 0 96 32>;
239 #interrupt-cells = <2>;
240 interrupt-controller;
241 clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
242 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
245 gpio4: gpio@e6054000 {
246 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
247 reg = <0 0xe6054000 0 0x50>;
248 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
251 gpio-ranges = <&pfc 0 128 32>;
252 #interrupt-cells = <2>;
253 interrupt-controller;
254 clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
255 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
258 gpio5: gpio@e6055000 {
259 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
260 reg = <0 0xe6055000 0 0x50>;
261 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
264 gpio-ranges = <&pfc 0 160 32>;
265 #interrupt-cells = <2>;
266 interrupt-controller;
267 clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
268 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
271 thermal: thermal@e61f0000 {
272 compatible = "renesas,thermal-r8a7790",
273 "renesas,rcar-gen2-thermal",
274 "renesas,rcar-thermal";
275 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
276 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
277 clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
278 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
279 #thermal-sensor-cells = <0>;
283 compatible = "arm,armv7-timer";
284 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
285 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
286 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
287 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
290 cmt0: timer@ffca0000 {
291 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
292 reg = <0 0xffca0000 0 0x1004>;
293 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
294 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
295 clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
297 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
299 renesas,channels-mask = <0x60>;
304 cmt1: timer@e6130000 {
305 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
306 reg = <0 0xe6130000 0 0x1004>;
307 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
308 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
309 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
310 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
311 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
312 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
313 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
314 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
315 clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
317 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
319 renesas,channels-mask = <0xff>;
324 irqc0: interrupt-controller@e61c0000 {
325 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
326 #interrupt-cells = <2>;
327 interrupt-controller;
328 reg = <0 0xe61c0000 0 0x200>;
329 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
332 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
333 clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
334 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
337 dmac0: dma-controller@e6700000 {
338 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
339 reg = <0 0xe6700000 0 0x20000>;
340 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
341 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
342 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
343 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
344 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
345 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
346 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
347 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
348 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
351 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
355 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
356 interrupt-names = "error",
357 "ch0", "ch1", "ch2", "ch3",
358 "ch4", "ch5", "ch6", "ch7",
359 "ch8", "ch9", "ch10", "ch11",
360 "ch12", "ch13", "ch14";
361 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
363 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
368 dmac1: dma-controller@e6720000 {
369 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
370 reg = <0 0xe6720000 0 0x20000>;
371 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
372 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
373 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
374 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
375 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
376 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
377 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
378 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
379 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
380 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
381 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
382 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
383 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
384 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
385 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
386 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
387 interrupt-names = "error",
388 "ch0", "ch1", "ch2", "ch3",
389 "ch4", "ch5", "ch6", "ch7",
390 "ch8", "ch9", "ch10", "ch11",
391 "ch12", "ch13", "ch14";
392 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
394 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
399 audma0: dma-controller@ec700000 {
400 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
401 reg = <0 0xec700000 0 0x10000>;
402 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
404 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
405 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
406 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
407 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
408 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
409 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
410 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
411 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
412 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
413 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
414 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
415 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
416 interrupt-names = "error",
417 "ch0", "ch1", "ch2", "ch3",
418 "ch4", "ch5", "ch6", "ch7",
419 "ch8", "ch9", "ch10", "ch11",
421 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
423 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
428 audma1: dma-controller@ec720000 {
429 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
430 reg = <0 0xec720000 0 0x10000>;
431 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
433 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
435 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
437 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
438 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
439 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
441 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
442 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
443 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
444 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
445 interrupt-names = "error",
446 "ch0", "ch1", "ch2", "ch3",
447 "ch4", "ch5", "ch6", "ch7",
448 "ch8", "ch9", "ch10", "ch11",
450 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
452 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
457 usb_dmac0: dma-controller@e65a0000 {
458 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
459 reg = <0 0xe65a0000 0 0x100>;
460 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
461 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
462 interrupt-names = "ch0", "ch1";
463 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>;
464 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
469 usb_dmac1: dma-controller@e65b0000 {
470 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
471 reg = <0 0xe65b0000 0 0x100>;
472 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
473 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
474 interrupt-names = "ch0", "ch1";
475 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>;
476 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
482 #address-cells = <1>;
484 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
485 reg = <0 0xe6508000 0 0x40>;
486 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
487 clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
488 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
489 i2c-scl-internal-delay-ns = <110>;
494 #address-cells = <1>;
496 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
497 reg = <0 0xe6518000 0 0x40>;
498 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
499 clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
500 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
501 i2c-scl-internal-delay-ns = <6>;
506 #address-cells = <1>;
508 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
509 reg = <0 0xe6530000 0 0x40>;
510 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
511 clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
512 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
513 i2c-scl-internal-delay-ns = <6>;
518 #address-cells = <1>;
520 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
521 reg = <0 0xe6540000 0 0x40>;
522 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
523 clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
524 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
525 i2c-scl-internal-delay-ns = <110>;
530 #address-cells = <1>;
532 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
533 "renesas,rmobile-iic";
534 reg = <0 0xe6500000 0 0x425>;
535 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
536 clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
537 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
538 <&dmac1 0x61>, <&dmac1 0x62>;
539 dma-names = "tx", "rx", "tx", "rx";
540 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
545 #address-cells = <1>;
547 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
548 "renesas,rmobile-iic";
549 reg = <0 0xe6510000 0 0x425>;
550 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
551 clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
552 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
553 <&dmac1 0x65>, <&dmac1 0x66>;
554 dma-names = "tx", "rx", "tx", "rx";
555 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
560 #address-cells = <1>;
562 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
563 "renesas,rmobile-iic";
564 reg = <0 0xe6520000 0 0x425>;
565 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
566 clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
567 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
568 <&dmac1 0x69>, <&dmac1 0x6a>;
569 dma-names = "tx", "rx", "tx", "rx";
570 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
575 #address-cells = <1>;
577 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
578 "renesas,rmobile-iic";
579 reg = <0 0xe60b0000 0 0x425>;
580 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
581 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
582 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
583 <&dmac1 0x77>, <&dmac1 0x78>;
584 dma-names = "tx", "rx", "tx", "rx";
585 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
589 mmcif0: mmc@ee200000 {
590 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
591 reg = <0 0xee200000 0 0x80>;
592 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
593 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
594 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
595 <&dmac1 0xd1>, <&dmac1 0xd2>;
596 dma-names = "tx", "rx", "tx", "rx";
597 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
600 max-frequency = <97500000>;
603 mmcif1: mmc@ee220000 {
604 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
605 reg = <0 0xee220000 0 0x80>;
606 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
607 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
608 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
609 <&dmac1 0xe1>, <&dmac1 0xe2>;
610 dma-names = "tx", "rx", "tx", "rx";
611 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
614 max-frequency = <97500000>;
617 pfc: pin-controller@e6060000 {
618 compatible = "renesas,pfc-r8a7790";
619 reg = <0 0xe6060000 0 0x250>;
623 compatible = "renesas,sdhi-r8a7790";
624 reg = <0 0xee100000 0 0x328>;
625 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
626 clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
627 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
628 <&dmac1 0xcd>, <&dmac1 0xce>;
629 dma-names = "tx", "rx", "tx", "rx";
630 max-frequency = <195000000>;
631 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
636 compatible = "renesas,sdhi-r8a7790";
637 reg = <0 0xee120000 0 0x328>;
638 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
639 clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
640 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
641 <&dmac1 0xc9>, <&dmac1 0xca>;
642 dma-names = "tx", "rx", "tx", "rx";
643 max-frequency = <195000000>;
644 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
649 compatible = "renesas,sdhi-r8a7790";
650 reg = <0 0xee140000 0 0x100>;
651 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
652 clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
653 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
654 <&dmac1 0xc1>, <&dmac1 0xc2>;
655 dma-names = "tx", "rx", "tx", "rx";
656 max-frequency = <97500000>;
657 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
662 compatible = "renesas,sdhi-r8a7790";
663 reg = <0 0xee160000 0 0x100>;
664 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
665 clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
666 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
667 <&dmac1 0xd3>, <&dmac1 0xd4>;
668 dma-names = "tx", "rx", "tx", "rx";
669 max-frequency = <97500000>;
670 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
674 scifa0: serial@e6c40000 {
675 compatible = "renesas,scifa-r8a7790",
676 "renesas,rcar-gen2-scifa", "renesas,scifa";
677 reg = <0 0xe6c40000 0 64>;
678 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
679 clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
681 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
682 <&dmac1 0x21>, <&dmac1 0x22>;
683 dma-names = "tx", "rx", "tx", "rx";
684 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
688 scifa1: serial@e6c50000 {
689 compatible = "renesas,scifa-r8a7790",
690 "renesas,rcar-gen2-scifa", "renesas,scifa";
691 reg = <0 0xe6c50000 0 64>;
692 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
693 clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
695 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
696 <&dmac1 0x25>, <&dmac1 0x26>;
697 dma-names = "tx", "rx", "tx", "rx";
698 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
702 scifa2: serial@e6c60000 {
703 compatible = "renesas,scifa-r8a7790",
704 "renesas,rcar-gen2-scifa", "renesas,scifa";
705 reg = <0 0xe6c60000 0 64>;
706 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
707 clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
709 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
710 <&dmac1 0x27>, <&dmac1 0x28>;
711 dma-names = "tx", "rx", "tx", "rx";
712 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
716 scifb0: serial@e6c20000 {
717 compatible = "renesas,scifb-r8a7790",
718 "renesas,rcar-gen2-scifb", "renesas,scifb";
719 reg = <0 0xe6c20000 0 0x100>;
720 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
721 clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
723 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
724 <&dmac1 0x3d>, <&dmac1 0x3e>;
725 dma-names = "tx", "rx", "tx", "rx";
726 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
730 scifb1: serial@e6c30000 {
731 compatible = "renesas,scifb-r8a7790",
732 "renesas,rcar-gen2-scifb", "renesas,scifb";
733 reg = <0 0xe6c30000 0 0x100>;
734 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
735 clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
737 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
738 <&dmac1 0x19>, <&dmac1 0x1a>;
739 dma-names = "tx", "rx", "tx", "rx";
740 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
744 scifb2: serial@e6ce0000 {
745 compatible = "renesas,scifb-r8a7790",
746 "renesas,rcar-gen2-scifb", "renesas,scifb";
747 reg = <0 0xe6ce0000 0 0x100>;
748 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
749 clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
751 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
752 <&dmac1 0x1d>, <&dmac1 0x1e>;
753 dma-names = "tx", "rx", "tx", "rx";
754 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
758 scif0: serial@e6e60000 {
759 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
761 reg = <0 0xe6e60000 0 64>;
762 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
763 clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>,
765 clock-names = "fck", "brg_int", "scif_clk";
766 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
767 <&dmac1 0x29>, <&dmac1 0x2a>;
768 dma-names = "tx", "rx", "tx", "rx";
769 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
773 scif1: serial@e6e68000 {
774 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
776 reg = <0 0xe6e68000 0 64>;
777 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
778 clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>,
780 clock-names = "fck", "brg_int", "scif_clk";
781 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
782 <&dmac1 0x2d>, <&dmac1 0x2e>;
783 dma-names = "tx", "rx", "tx", "rx";
784 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
788 scif2: serial@e6e56000 {
789 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
791 reg = <0 0xe6e56000 0 64>;
792 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
793 clocks = <&mstp3_clks R8A7790_CLK_SCIF2>, <&zs_clk>,
795 clock-names = "fck", "brg_int", "scif_clk";
796 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
797 <&dmac1 0x2b>, <&dmac1 0x2c>;
798 dma-names = "tx", "rx", "tx", "rx";
799 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
803 hscif0: serial@e62c0000 {
804 compatible = "renesas,hscif-r8a7790",
805 "renesas,rcar-gen2-hscif", "renesas,hscif";
806 reg = <0 0xe62c0000 0 96>;
807 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
808 clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>,
810 clock-names = "fck", "brg_int", "scif_clk";
811 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
812 <&dmac1 0x39>, <&dmac1 0x3a>;
813 dma-names = "tx", "rx", "tx", "rx";
814 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
818 hscif1: serial@e62c8000 {
819 compatible = "renesas,hscif-r8a7790",
820 "renesas,rcar-gen2-hscif", "renesas,hscif";
821 reg = <0 0xe62c8000 0 96>;
822 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
823 clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>,
825 clock-names = "fck", "brg_int", "scif_clk";
826 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
827 <&dmac1 0x4d>, <&dmac1 0x4e>;
828 dma-names = "tx", "rx", "tx", "rx";
829 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
833 ether: ethernet@ee700000 {
834 compatible = "renesas,ether-r8a7790";
835 reg = <0 0xee700000 0 0x400>;
836 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
837 clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
838 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
840 #address-cells = <1>;
845 avb: ethernet@e6800000 {
846 compatible = "renesas,etheravb-r8a7790",
847 "renesas,etheravb-rcar-gen2";
848 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
849 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
850 clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
851 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
852 #address-cells = <1>;
857 sata0: sata@ee300000 {
858 compatible = "renesas,sata-r8a7790";
859 reg = <0 0xee300000 0 0x2000>;
860 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
861 clocks = <&mstp8_clks R8A7790_CLK_SATA0>;
862 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
866 sata1: sata@ee500000 {
867 compatible = "renesas,sata-r8a7790";
868 reg = <0 0xee500000 0 0x2000>;
869 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
870 clocks = <&mstp8_clks R8A7790_CLK_SATA1>;
871 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
875 hsusb: usb@e6590000 {
876 compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
877 reg = <0 0xe6590000 0 0x100>;
878 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
879 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
880 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
881 <&usb_dmac1 0>, <&usb_dmac1 1>;
882 dma-names = "ch0", "ch1", "ch2", "ch3";
883 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
884 renesas,buswait = <4>;
890 usbphy: usb-phy@e6590100 {
891 compatible = "renesas,usb-phy-r8a7790",
892 "renesas,rcar-gen2-usb-phy";
893 reg = <0 0xe6590100 0 0x100>;
894 #address-cells = <1>;
896 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
897 clock-names = "usbhs";
898 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
901 usb0: usb-channel@0 {
905 usb2: usb-channel@2 {
911 vin0: video@e6ef0000 {
912 compatible = "renesas,vin-r8a7790";
913 reg = <0 0xe6ef0000 0 0x1000>;
914 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
915 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
916 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
920 vin1: video@e6ef1000 {
921 compatible = "renesas,vin-r8a7790";
922 reg = <0 0xe6ef1000 0 0x1000>;
923 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
924 clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
925 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
929 vin2: video@e6ef2000 {
930 compatible = "renesas,vin-r8a7790";
931 reg = <0 0xe6ef2000 0 0x1000>;
932 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
933 clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
934 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
938 vin3: video@e6ef3000 {
939 compatible = "renesas,vin-r8a7790";
940 reg = <0 0xe6ef3000 0 0x1000>;
941 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
942 clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
943 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
948 compatible = "renesas,vsp1";
949 reg = <0 0xfe920000 0 0x8000>;
950 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
951 clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
952 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
956 compatible = "renesas,vsp1";
957 reg = <0 0xfe928000 0 0x8000>;
958 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
959 clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
960 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
964 compatible = "renesas,vsp1";
965 reg = <0 0xfe930000 0 0x8000>;
966 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
967 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
968 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
972 compatible = "renesas,vsp1";
973 reg = <0 0xfe938000 0 0x8000>;
974 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
975 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
976 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
979 du: display@feb00000 {
980 compatible = "renesas,du-r8a7790";
981 reg = <0 0xfeb00000 0 0x70000>,
982 <0 0xfeb90000 0 0x1c>,
983 <0 0xfeb94000 0 0x1c>;
984 reg-names = "du", "lvds.0", "lvds.1";
985 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
986 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
987 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
988 clocks = <&mstp7_clks R8A7790_CLK_DU0>,
989 <&mstp7_clks R8A7790_CLK_DU1>,
990 <&mstp7_clks R8A7790_CLK_DU2>,
991 <&mstp7_clks R8A7790_CLK_LVDS0>,
992 <&mstp7_clks R8A7790_CLK_LVDS1>;
993 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
997 #address-cells = <1>;
1002 du_out_rgb: endpoint {
1007 du_out_lvds0: endpoint {
1012 du_out_lvds1: endpoint {
1018 can0: can@e6e80000 {
1019 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1020 reg = <0 0xe6e80000 0 0x1000>;
1021 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1022 clocks = <&mstp9_clks R8A7790_CLK_RCAN0>,
1023 <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
1024 clock-names = "clkp1", "clkp2", "can_clk";
1025 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1026 status = "disabled";
1029 can1: can@e6e88000 {
1030 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1031 reg = <0 0xe6e88000 0 0x1000>;
1032 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1033 clocks = <&mstp9_clks R8A7790_CLK_RCAN1>,
1034 <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
1035 clock-names = "clkp1", "clkp2", "can_clk";
1036 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1037 status = "disabled";
1040 jpu: jpeg-codec@fe980000 {
1041 compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
1042 reg = <0 0xfe980000 0 0x10300>;
1043 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1044 clocks = <&mstp1_clks R8A7790_CLK_JPU>;
1045 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1049 #address-cells = <2>;
1053 /* External root clock */
1055 compatible = "fixed-clock";
1057 /* This value must be overriden by the board. */
1058 clock-frequency = <0>;
1061 /* External PCIe clock - can be overridden by the board */
1062 pcie_bus_clk: pcie_bus {
1063 compatible = "fixed-clock";
1065 clock-frequency = <0>;
1069 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
1070 * default. Boards that provide audio clocks should override them.
1072 audio_clk_a: audio_clk_a {
1073 compatible = "fixed-clock";
1075 clock-frequency = <0>;
1077 audio_clk_b: audio_clk_b {
1078 compatible = "fixed-clock";
1080 clock-frequency = <0>;
1082 audio_clk_c: audio_clk_c {
1083 compatible = "fixed-clock";
1085 clock-frequency = <0>;
1088 /* External SCIF clock */
1090 compatible = "fixed-clock";
1092 /* This value must be overridden by the board. */
1093 clock-frequency = <0>;
1096 /* External USB clock - can be overridden by the board */
1097 usb_extal_clk: usb_extal {
1098 compatible = "fixed-clock";
1100 clock-frequency = <48000000>;
1103 /* External CAN clock */
1105 compatible = "fixed-clock";
1107 /* This value must be overridden by the board. */
1108 clock-frequency = <0>;
1111 /* Special CPG clocks */
1112 cpg_clocks: cpg_clocks@e6150000 {
1113 compatible = "renesas,r8a7790-cpg-clocks",
1114 "renesas,rcar-gen2-cpg-clocks";
1115 reg = <0 0xe6150000 0 0x1000>;
1116 clocks = <&extal_clk &usb_extal_clk>;
1118 clock-output-names = "main", "pll0", "pll1", "pll3",
1119 "lb", "qspi", "sdh", "sd0", "sd1",
1120 "z", "rcan", "adsp";
1121 #power-domain-cells = <0>;
1124 /* Variable factor clocks */
1125 sd2_clk: sd2@e6150078 {
1126 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1127 reg = <0 0xe6150078 0 4>;
1128 clocks = <&pll1_div2_clk>;
1131 sd3_clk: sd3@e615026c {
1132 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1133 reg = <0 0xe615026c 0 4>;
1134 clocks = <&pll1_div2_clk>;
1137 mmc0_clk: mmc0@e6150240 {
1138 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1139 reg = <0 0xe6150240 0 4>;
1140 clocks = <&pll1_div2_clk>;
1143 mmc1_clk: mmc1@e6150244 {
1144 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1145 reg = <0 0xe6150244 0 4>;
1146 clocks = <&pll1_div2_clk>;
1149 ssp_clk: ssp@e6150248 {
1150 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1151 reg = <0 0xe6150248 0 4>;
1152 clocks = <&pll1_div2_clk>;
1155 ssprs_clk: ssprs@e615024c {
1156 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1157 reg = <0 0xe615024c 0 4>;
1158 clocks = <&pll1_div2_clk>;
1162 /* Fixed factor clocks */
1163 pll1_div2_clk: pll1_div2 {
1164 compatible = "fixed-factor-clock";
1165 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1171 compatible = "fixed-factor-clock";
1172 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1178 compatible = "fixed-factor-clock";
1179 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1185 compatible = "fixed-factor-clock";
1186 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1192 compatible = "fixed-factor-clock";
1193 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1199 compatible = "fixed-factor-clock";
1200 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1206 compatible = "fixed-factor-clock";
1207 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1213 compatible = "fixed-factor-clock";
1214 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1220 compatible = "fixed-factor-clock";
1221 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1227 compatible = "fixed-factor-clock";
1228 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1234 compatible = "fixed-factor-clock";
1235 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1241 compatible = "fixed-factor-clock";
1242 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1248 compatible = "fixed-factor-clock";
1249 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1251 clock-div = <(48 * 1024)>;
1254 oscclk_clk: oscclk {
1255 compatible = "fixed-factor-clock";
1256 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1258 clock-div = <(12 * 1024)>;
1262 compatible = "fixed-factor-clock";
1263 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1269 compatible = "fixed-factor-clock";
1270 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1276 compatible = "fixed-factor-clock";
1277 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1283 compatible = "fixed-factor-clock";
1284 clocks = <&pll1_div2_clk>;
1290 compatible = "fixed-factor-clock";
1291 clocks = <&extal_clk>;
1298 mstp0_clks: mstp0_clks@e6150130 {
1299 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1300 reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
1303 clock-indices = <R8A7790_CLK_MSIOF0>;
1304 clock-output-names = "msiof0";
1306 mstp1_clks: mstp1_clks@e6150134 {
1307 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1308 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
1309 clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>,
1310 <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>,
1311 <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
1312 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
1315 R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1
1316 R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1
1317 R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC
1318 R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0
1319 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0
1320 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0
1321 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
1323 clock-output-names =
1324 "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1",
1325 "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1",
1326 "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0",
1327 "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy";
1329 mstp2_clks: mstp2_clks@e6150138 {
1330 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1331 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
1332 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1333 <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>,
1337 R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0
1338 R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1
1339 R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2
1340 R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0
1342 clock-output-names =
1343 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
1344 "scifb1", "msiof1", "msiof3", "scifb2",
1345 "sys-dmac1", "sys-dmac0";
1347 mstp3_clks: mstp3_clks@e615013c {
1348 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1349 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1350 clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&p_clk>, <&sd3_clk>,
1351 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
1352 <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
1353 <&hp_clk>, <&hp_clk>;
1356 R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SCIF2 R8A7790_CLK_SDHI3
1357 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
1358 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
1359 R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
1361 clock-output-names =
1362 "iic2", "tpu0", "mmcif1", "scif2", "sdhi3",
1363 "sdhi2", "sdhi1", "sdhi0", "mmcif0",
1364 "iic0", "pciec", "iic1", "ssusb", "cmt1",
1365 "usbdmac0", "usbdmac1";
1367 mstp4_clks: mstp4_clks@e6150140 {
1368 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1369 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
1370 clocks = <&cp_clk>, <&zs_clk>;
1372 clock-indices = <R8A7790_CLK_IRQC R8A7790_CLK_INTC_SYS>;
1373 clock-output-names = "irqc", "intc-sys";
1375 mstp5_clks: mstp5_clks@e6150144 {
1376 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1377 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1378 clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>,
1379 <&extal_clk>, <&p_clk>;
1382 R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1
1383 R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL
1386 clock-output-names = "audmac0", "audmac1", "adsp_mod",
1389 mstp7_clks: mstp7_clks@e615014c {
1390 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1391 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
1392 clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1393 <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>,
1397 R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1
1398 R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0
1399 R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0
1400 R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0
1402 clock-output-names =
1403 "ehci", "hsusb", "hscif1", "hscif0", "scif1",
1404 "scif0", "du2", "du1", "du0", "lvds1", "lvds0";
1406 mstp8_clks: mstp8_clks@e6150990 {
1407 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1408 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
1409 clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
1410 <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
1414 R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2
1415 R8A7790_CLK_VIN1 R8A7790_CLK_VIN0
1416 R8A7790_CLK_ETHERAVB R8A7790_CLK_ETHER
1417 R8A7790_CLK_SATA1 R8A7790_CLK_SATA0
1419 clock-output-names =
1420 "mlb", "vin3", "vin2", "vin1", "vin0",
1421 "etheravb", "ether", "sata1", "sata0";
1423 mstp9_clks: mstp9_clks@e6150994 {
1424 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1425 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
1426 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
1427 <&cp_clk>, <&cp_clk>, <&cp_clk>,
1428 <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
1429 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
1432 R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3
1433 R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0
1434 R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
1435 R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
1437 clock-output-names =
1438 "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
1439 "rcan1", "rcan0", "qspi_mod", "iic3",
1440 "i2c3", "i2c2", "i2c1", "i2c0";
1442 mstp10_clks: mstp10_clks@e6150998 {
1443 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1444 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1446 <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
1447 <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
1448 <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
1449 <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
1450 <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
1452 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1453 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1454 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1455 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1456 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1457 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1458 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>;
1463 R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5
1464 R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0
1466 R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0
1467 R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0
1468 R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5
1469 R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0
1471 clock-output-names =
1473 "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
1474 "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
1476 "scu-dvc1", "scu-dvc0",
1477 "scu-ctu1-mix1", "scu-ctu0-mix0",
1478 "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
1479 "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
1483 prr: chipid@ff000044 {
1484 compatible = "renesas,prr";
1485 reg = <0 0xff000044 0 4>;
1488 rst: reset-controller@e6160000 {
1489 compatible = "renesas,r8a7790-rst";
1490 reg = <0 0xe6160000 0 0x0100>;
1493 sysc: system-controller@e6180000 {
1494 compatible = "renesas,r8a7790-sysc";
1495 reg = <0 0xe6180000 0 0x0200>;
1496 #power-domain-cells = <1>;
1499 qspi: spi@e6b10000 {
1500 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
1501 reg = <0 0xe6b10000 0 0x2c>;
1502 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1503 clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
1504 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1505 <&dmac1 0x17>, <&dmac1 0x18>;
1506 dma-names = "tx", "rx", "tx", "rx";
1507 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1509 #address-cells = <1>;
1511 status = "disabled";
1514 msiof0: spi@e6e20000 {
1515 compatible = "renesas,msiof-r8a7790",
1516 "renesas,rcar-gen2-msiof";
1517 reg = <0 0xe6e20000 0 0x0064>;
1518 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1519 clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
1520 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1521 <&dmac1 0x51>, <&dmac1 0x52>;
1522 dma-names = "tx", "rx", "tx", "rx";
1523 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1524 #address-cells = <1>;
1526 status = "disabled";
1529 msiof1: spi@e6e10000 {
1530 compatible = "renesas,msiof-r8a7790",
1531 "renesas,rcar-gen2-msiof";
1532 reg = <0 0xe6e10000 0 0x0064>;
1533 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1534 clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
1535 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1536 <&dmac1 0x55>, <&dmac1 0x56>;
1537 dma-names = "tx", "rx", "tx", "rx";
1538 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1539 #address-cells = <1>;
1541 status = "disabled";
1544 msiof2: spi@e6e00000 {
1545 compatible = "renesas,msiof-r8a7790",
1546 "renesas,rcar-gen2-msiof";
1547 reg = <0 0xe6e00000 0 0x0064>;
1548 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1549 clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
1550 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1551 <&dmac1 0x41>, <&dmac1 0x42>;
1552 dma-names = "tx", "rx", "tx", "rx";
1553 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1554 #address-cells = <1>;
1556 status = "disabled";
1559 msiof3: spi@e6c90000 {
1560 compatible = "renesas,msiof-r8a7790",
1561 "renesas,rcar-gen2-msiof";
1562 reg = <0 0xe6c90000 0 0x0064>;
1563 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1564 clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
1565 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1566 <&dmac1 0x45>, <&dmac1 0x46>;
1567 dma-names = "tx", "rx", "tx", "rx";
1568 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1569 #address-cells = <1>;
1571 status = "disabled";
1574 xhci: usb@ee000000 {
1575 compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
1576 reg = <0 0xee000000 0 0xc00>;
1577 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1578 clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
1579 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1582 status = "disabled";
1585 pci0: pci@ee090000 {
1586 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1587 device_type = "pci";
1588 reg = <0 0xee090000 0 0xc00>,
1589 <0 0xee080000 0 0x1100>;
1590 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1591 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1592 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1593 status = "disabled";
1596 #address-cells = <3>;
1598 #interrupt-cells = <1>;
1599 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1600 interrupt-map-mask = <0xff00 0 0 0x7>;
1601 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1602 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1603 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1606 reg = <0x800 0 0 0 0>;
1612 reg = <0x1000 0 0 0 0>;
1618 pci1: pci@ee0b0000 {
1619 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1620 device_type = "pci";
1621 reg = <0 0xee0b0000 0 0xc00>,
1622 <0 0xee0a0000 0 0x1100>;
1623 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1624 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1625 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1626 status = "disabled";
1629 #address-cells = <3>;
1631 #interrupt-cells = <1>;
1632 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1633 interrupt-map-mask = <0xff00 0 0 0x7>;
1634 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1635 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1636 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1639 pci2: pci@ee0d0000 {
1640 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1641 device_type = "pci";
1642 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1643 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1644 reg = <0 0xee0d0000 0 0xc00>,
1645 <0 0xee0c0000 0 0x1100>;
1646 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1647 status = "disabled";
1650 #address-cells = <3>;
1652 #interrupt-cells = <1>;
1653 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1654 interrupt-map-mask = <0xff00 0 0 0x7>;
1655 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1656 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1657 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1660 reg = <0x20800 0 0 0 0>;
1666 reg = <0x21000 0 0 0 0>;
1672 pciec: pcie@fe000000 {
1673 compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
1674 reg = <0 0xfe000000 0 0x80000>;
1675 #address-cells = <3>;
1677 bus-range = <0x00 0xff>;
1678 device_type = "pci";
1679 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1680 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1681 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1682 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1683 /* Map all possible DDR as inbound ranges */
1684 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1685 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1686 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1687 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1688 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1689 #interrupt-cells = <1>;
1690 interrupt-map-mask = <0 0 0 0>;
1691 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1692 clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>;
1693 clock-names = "pcie", "pcie_bus";
1694 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1695 status = "disabled";
1698 rcar_sound: sound@ec500000 {
1700 * #sound-dai-cells is required
1702 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1703 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1705 compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
1706 reg = <0 0xec500000 0 0x1000>, /* SCU */
1707 <0 0xec5a0000 0 0x100>, /* ADG */
1708 <0 0xec540000 0 0x1000>, /* SSIU */
1709 <0 0xec541000 0 0x280>, /* SSI */
1710 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1711 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1713 clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>,
1714 <&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>,
1715 <&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>,
1716 <&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>,
1717 <&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>,
1718 <&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>,
1719 <&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>,
1720 <&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>,
1721 <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
1722 <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
1723 <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
1724 <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
1725 <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
1726 <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
1727 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
1728 clock-names = "ssi-all",
1729 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1730 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1731 "src.9", "src.8", "src.7", "src.6", "src.5",
1732 "src.4", "src.3", "src.2", "src.1", "src.0",
1736 "clk_a", "clk_b", "clk_c", "clk_i";
1737 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1739 status = "disabled";
1743 dmas = <&audma1 0xbc>;
1747 dmas = <&audma1 0xbe>;
1770 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1771 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1772 dma-names = "rx", "tx";
1775 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1776 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1777 dma-names = "rx", "tx";
1780 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1781 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1782 dma-names = "rx", "tx";
1785 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1786 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1787 dma-names = "rx", "tx";
1790 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1791 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1792 dma-names = "rx", "tx";
1795 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1796 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1797 dma-names = "rx", "tx";
1800 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1801 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1802 dma-names = "rx", "tx";
1805 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1806 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1807 dma-names = "rx", "tx";
1810 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1811 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1812 dma-names = "rx", "tx";
1815 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1816 dmas = <&audma0 0x97>, <&audma1 0xba>;
1817 dma-names = "rx", "tx";
1823 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1824 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1825 dma-names = "rx", "tx", "rxu", "txu";
1828 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1829 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1830 dma-names = "rx", "tx", "rxu", "txu";
1833 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1834 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1835 dma-names = "rx", "tx", "rxu", "txu";
1838 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1839 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1840 dma-names = "rx", "tx", "rxu", "txu";
1843 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1844 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1845 dma-names = "rx", "tx", "rxu", "txu";
1848 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1849 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1850 dma-names = "rx", "tx", "rxu", "txu";
1853 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1854 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1855 dma-names = "rx", "tx", "rxu", "txu";
1858 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1859 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1860 dma-names = "rx", "tx", "rxu", "txu";
1863 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1864 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1865 dma-names = "rx", "tx", "rxu", "txu";
1868 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1869 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1870 dma-names = "rx", "tx", "rxu", "txu";
1875 ipmmu_sy0: mmu@e6280000 {
1876 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1877 reg = <0 0xe6280000 0 0x1000>;
1878 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1879 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1881 status = "disabled";
1884 ipmmu_sy1: mmu@e6290000 {
1885 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1886 reg = <0 0xe6290000 0 0x1000>;
1887 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1889 status = "disabled";
1892 ipmmu_ds: mmu@e6740000 {
1893 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1894 reg = <0 0xe6740000 0 0x1000>;
1895 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1896 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1898 status = "disabled";
1901 ipmmu_mp: mmu@ec680000 {
1902 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1903 reg = <0 0xec680000 0 0x1000>;
1904 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1906 status = "disabled";
1909 ipmmu_mx: mmu@fe951000 {
1910 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1911 reg = <0 0xfe951000 0 0x1000>;
1912 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1913 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1915 status = "disabled";
1918 ipmmu_rt: mmu@ffc80000 {
1919 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1920 reg = <0 0xffc80000 0 0x1000>;
1921 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1923 status = "disabled";