2 * Device Tree Source for the r8a7794 SoC
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 * Copyright (C) 2014 Ulrich Hecht
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
12 #include <dt-bindings/clock/r8a7794-clock.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/power/r8a7794-sysc.h>
18 compatible = "renesas,r8a7794";
19 interrupt-parent = <&gic>;
43 compatible = "arm,cortex-a7";
45 clock-frequency = <1000000000>;
47 power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
48 next-level-cache = <&L2_CA7>;
53 compatible = "arm,cortex-a7";
55 clock-frequency = <1000000000>;
56 power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
57 next-level-cache = <&L2_CA7>;
60 L2_CA7: cache-controller-0 {
62 power-domains = <&sysc R8A7794_PD_CA7_SCU>;
68 gic: interrupt-controller@f1001000 {
69 compatible = "arm,gic-400";
70 #interrupt-cells = <3>;
73 reg = <0 0xf1001000 0 0x1000>,
74 <0 0xf1002000 0 0x2000>,
75 <0 0xf1004000 0 0x2000>,
76 <0 0xf1006000 0 0x2000>;
77 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
78 clocks = <&mstp4_clks R8A7794_CLK_INTC_SYS>;
80 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
83 gpio0: gpio@e6050000 {
84 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
85 reg = <0 0xe6050000 0 0x50>;
86 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
89 gpio-ranges = <&pfc 0 0 32>;
90 #interrupt-cells = <2>;
92 clocks = <&mstp9_clks R8A7794_CLK_GPIO0>;
93 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
96 gpio1: gpio@e6051000 {
97 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
98 reg = <0 0xe6051000 0 0x50>;
99 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
102 gpio-ranges = <&pfc 0 32 26>;
103 #interrupt-cells = <2>;
104 interrupt-controller;
105 clocks = <&mstp9_clks R8A7794_CLK_GPIO1>;
106 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
109 gpio2: gpio@e6052000 {
110 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
111 reg = <0 0xe6052000 0 0x50>;
112 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
115 gpio-ranges = <&pfc 0 64 32>;
116 #interrupt-cells = <2>;
117 interrupt-controller;
118 clocks = <&mstp9_clks R8A7794_CLK_GPIO2>;
119 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
122 gpio3: gpio@e6053000 {
123 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
124 reg = <0 0xe6053000 0 0x50>;
125 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
128 gpio-ranges = <&pfc 0 96 32>;
129 #interrupt-cells = <2>;
130 interrupt-controller;
131 clocks = <&mstp9_clks R8A7794_CLK_GPIO3>;
132 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
135 gpio4: gpio@e6054000 {
136 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
137 reg = <0 0xe6054000 0 0x50>;
138 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
141 gpio-ranges = <&pfc 0 128 32>;
142 #interrupt-cells = <2>;
143 interrupt-controller;
144 clocks = <&mstp9_clks R8A7794_CLK_GPIO4>;
145 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
148 gpio5: gpio@e6055000 {
149 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
150 reg = <0 0xe6055000 0 0x50>;
151 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
154 gpio-ranges = <&pfc 0 160 28>;
155 #interrupt-cells = <2>;
156 interrupt-controller;
157 clocks = <&mstp9_clks R8A7794_CLK_GPIO5>;
158 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
161 gpio6: gpio@e6055400 {
162 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
163 reg = <0 0xe6055400 0 0x50>;
164 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
167 gpio-ranges = <&pfc 0 192 26>;
168 #interrupt-cells = <2>;
169 interrupt-controller;
170 clocks = <&mstp9_clks R8A7794_CLK_GPIO6>;
171 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
174 cmt0: timer@ffca0000 {
175 compatible = "renesas,cmt-48-gen2";
176 reg = <0 0xffca0000 0 0x1004>;
177 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
178 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
179 clocks = <&mstp1_clks R8A7794_CLK_CMT0>;
181 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
183 renesas,channels-mask = <0x60>;
188 cmt1: timer@e6130000 {
189 compatible = "renesas,cmt-48-gen2";
190 reg = <0 0xe6130000 0 0x1004>;
191 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
192 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
193 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
194 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
195 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
196 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
197 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
198 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
199 clocks = <&mstp3_clks R8A7794_CLK_CMT1>;
201 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
203 renesas,channels-mask = <0xff>;
209 compatible = "arm,armv7-timer";
210 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
211 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
212 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
213 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
216 irqc0: interrupt-controller@e61c0000 {
217 compatible = "renesas,irqc-r8a7794", "renesas,irqc";
218 #interrupt-cells = <2>;
219 interrupt-controller;
220 reg = <0 0xe61c0000 0 0x200>;
221 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
222 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
223 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
225 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
226 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
227 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
228 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
229 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
230 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
231 clocks = <&mstp4_clks R8A7794_CLK_IRQC>;
232 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
235 pfc: pin-controller@e6060000 {
236 compatible = "renesas,pfc-r8a7794";
237 reg = <0 0xe6060000 0 0x11c>;
240 dmac0: dma-controller@e6700000 {
241 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
242 reg = <0 0xe6700000 0 0x20000>;
243 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
244 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
245 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
246 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
247 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
248 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
249 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
250 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
251 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
252 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
253 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
254 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
255 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
256 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
257 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
258 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
259 interrupt-names = "error",
260 "ch0", "ch1", "ch2", "ch3",
261 "ch4", "ch5", "ch6", "ch7",
262 "ch8", "ch9", "ch10", "ch11",
263 "ch12", "ch13", "ch14";
264 clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC0>;
266 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
271 dmac1: dma-controller@e6720000 {
272 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
273 reg = <0 0xe6720000 0 0x20000>;
274 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
275 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
276 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
277 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
278 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
279 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
280 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
281 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
282 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
283 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
284 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
285 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
286 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
287 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
288 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
289 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
290 interrupt-names = "error",
291 "ch0", "ch1", "ch2", "ch3",
292 "ch4", "ch5", "ch6", "ch7",
293 "ch8", "ch9", "ch10", "ch11",
294 "ch12", "ch13", "ch14";
295 clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC1>;
297 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
302 audma0: dma-controller@ec700000 {
303 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
304 reg = <0 0xec700000 0 0x10000>;
305 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
306 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
307 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
308 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
309 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
310 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
311 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
312 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
313 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
314 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
315 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
316 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
317 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
318 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
319 interrupt-names = "error",
320 "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
321 "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
323 clocks = <&mstp5_clks R8A7794_CLK_AUDIO_DMAC0>;
325 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
330 scifa0: serial@e6c40000 {
331 compatible = "renesas,scifa-r8a7794",
332 "renesas,rcar-gen2-scifa", "renesas,scifa";
333 reg = <0 0xe6c40000 0 64>;
334 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
335 clocks = <&mstp2_clks R8A7794_CLK_SCIFA0>;
337 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
338 <&dmac1 0x21>, <&dmac1 0x22>;
339 dma-names = "tx", "rx", "tx", "rx";
340 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
344 scifa1: serial@e6c50000 {
345 compatible = "renesas,scifa-r8a7794",
346 "renesas,rcar-gen2-scifa", "renesas,scifa";
347 reg = <0 0xe6c50000 0 64>;
348 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
349 clocks = <&mstp2_clks R8A7794_CLK_SCIFA1>;
351 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
352 <&dmac1 0x25>, <&dmac1 0x26>;
353 dma-names = "tx", "rx", "tx", "rx";
354 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
358 scifa2: serial@e6c60000 {
359 compatible = "renesas,scifa-r8a7794",
360 "renesas,rcar-gen2-scifa", "renesas,scifa";
361 reg = <0 0xe6c60000 0 64>;
362 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
363 clocks = <&mstp2_clks R8A7794_CLK_SCIFA2>;
365 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
366 <&dmac1 0x27>, <&dmac1 0x28>;
367 dma-names = "tx", "rx", "tx", "rx";
368 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
372 scifa3: serial@e6c70000 {
373 compatible = "renesas,scifa-r8a7794",
374 "renesas,rcar-gen2-scifa", "renesas,scifa";
375 reg = <0 0xe6c70000 0 64>;
376 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
377 clocks = <&mstp11_clks R8A7794_CLK_SCIFA3>;
379 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
380 <&dmac1 0x1b>, <&dmac1 0x1c>;
381 dma-names = "tx", "rx", "tx", "rx";
382 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
386 scifa4: serial@e6c78000 {
387 compatible = "renesas,scifa-r8a7794",
388 "renesas,rcar-gen2-scifa", "renesas,scifa";
389 reg = <0 0xe6c78000 0 64>;
390 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
391 clocks = <&mstp11_clks R8A7794_CLK_SCIFA4>;
393 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
394 <&dmac1 0x1f>, <&dmac1 0x20>;
395 dma-names = "tx", "rx", "tx", "rx";
396 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
400 scifa5: serial@e6c80000 {
401 compatible = "renesas,scifa-r8a7794",
402 "renesas,rcar-gen2-scifa", "renesas,scifa";
403 reg = <0 0xe6c80000 0 64>;
404 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
405 clocks = <&mstp11_clks R8A7794_CLK_SCIFA5>;
407 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
408 <&dmac1 0x23>, <&dmac1 0x24>;
409 dma-names = "tx", "rx", "tx", "rx";
410 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
414 scifb0: serial@e6c20000 {
415 compatible = "renesas,scifb-r8a7794",
416 "renesas,rcar-gen2-scifb", "renesas,scifb";
417 reg = <0 0xe6c20000 0 0x100>;
418 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
419 clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>;
421 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
422 <&dmac1 0x3d>, <&dmac1 0x3e>;
423 dma-names = "tx", "rx", "tx", "rx";
424 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
428 scifb1: serial@e6c30000 {
429 compatible = "renesas,scifb-r8a7794",
430 "renesas,rcar-gen2-scifb", "renesas,scifb";
431 reg = <0 0xe6c30000 0 0x100>;
432 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
433 clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>;
435 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
436 <&dmac1 0x19>, <&dmac1 0x1a>;
437 dma-names = "tx", "rx", "tx", "rx";
438 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
442 scifb2: serial@e6ce0000 {
443 compatible = "renesas,scifb-r8a7794",
444 "renesas,rcar-gen2-scifb", "renesas,scifb";
445 reg = <0 0xe6ce0000 0 0x100>;
446 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
447 clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>;
449 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
450 <&dmac1 0x1d>, <&dmac1 0x1e>;
451 dma-names = "tx", "rx", "tx", "rx";
452 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
456 scif0: serial@e6e60000 {
457 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
459 reg = <0 0xe6e60000 0 64>;
460 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
461 clocks = <&mstp7_clks R8A7794_CLK_SCIF0>, <&zs_clk>,
463 clock-names = "fck", "brg_int", "scif_clk";
464 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
465 <&dmac1 0x29>, <&dmac1 0x2a>;
466 dma-names = "tx", "rx", "tx", "rx";
467 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
471 scif1: serial@e6e68000 {
472 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
474 reg = <0 0xe6e68000 0 64>;
475 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
476 clocks = <&mstp7_clks R8A7794_CLK_SCIF1>, <&zs_clk>,
478 clock-names = "fck", "brg_int", "scif_clk";
479 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
480 <&dmac1 0x2d>, <&dmac1 0x2e>;
481 dma-names = "tx", "rx", "tx", "rx";
482 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
486 scif2: serial@e6e58000 {
487 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
489 reg = <0 0xe6e58000 0 64>;
490 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
491 clocks = <&mstp7_clks R8A7794_CLK_SCIF2>, <&zs_clk>,
493 clock-names = "fck", "brg_int", "scif_clk";
494 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
495 <&dmac1 0x2b>, <&dmac1 0x2c>;
496 dma-names = "tx", "rx", "tx", "rx";
497 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
501 scif3: serial@e6ea8000 {
502 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
504 reg = <0 0xe6ea8000 0 64>;
505 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
506 clocks = <&mstp7_clks R8A7794_CLK_SCIF3>, <&zs_clk>,
508 clock-names = "fck", "brg_int", "scif_clk";
509 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
510 <&dmac1 0x2f>, <&dmac1 0x30>;
511 dma-names = "tx", "rx", "tx", "rx";
512 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
516 scif4: serial@e6ee0000 {
517 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
519 reg = <0 0xe6ee0000 0 64>;
520 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
521 clocks = <&mstp7_clks R8A7794_CLK_SCIF4>, <&zs_clk>,
523 clock-names = "fck", "brg_int", "scif_clk";
524 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
525 <&dmac1 0xfb>, <&dmac1 0xfc>;
526 dma-names = "tx", "rx", "tx", "rx";
527 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
531 scif5: serial@e6ee8000 {
532 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
534 reg = <0 0xe6ee8000 0 64>;
535 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
536 clocks = <&mstp7_clks R8A7794_CLK_SCIF5>, <&zs_clk>,
538 clock-names = "fck", "brg_int", "scif_clk";
539 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
540 <&dmac1 0xfd>, <&dmac1 0xfe>;
541 dma-names = "tx", "rx", "tx", "rx";
542 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
546 hscif0: serial@e62c0000 {
547 compatible = "renesas,hscif-r8a7794",
548 "renesas,rcar-gen2-hscif", "renesas,hscif";
549 reg = <0 0xe62c0000 0 96>;
550 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
551 clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>, <&zs_clk>,
553 clock-names = "fck", "brg_int", "scif_clk";
554 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
555 <&dmac1 0x39>, <&dmac1 0x3a>;
556 dma-names = "tx", "rx", "tx", "rx";
557 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
561 hscif1: serial@e62c8000 {
562 compatible = "renesas,hscif-r8a7794",
563 "renesas,rcar-gen2-hscif", "renesas,hscif";
564 reg = <0 0xe62c8000 0 96>;
565 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
566 clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>, <&zs_clk>,
568 clock-names = "fck", "brg_int", "scif_clk";
569 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
570 <&dmac1 0x4d>, <&dmac1 0x4e>;
571 dma-names = "tx", "rx", "tx", "rx";
572 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
576 hscif2: serial@e62d0000 {
577 compatible = "renesas,hscif-r8a7794",
578 "renesas,rcar-gen2-hscif", "renesas,hscif";
579 reg = <0 0xe62d0000 0 96>;
580 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
581 clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>, <&zs_clk>,
583 clock-names = "fck", "brg_int", "scif_clk";
584 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
585 <&dmac1 0x3b>, <&dmac1 0x3c>;
586 dma-names = "tx", "rx", "tx", "rx";
587 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
591 ether: ethernet@ee700000 {
592 compatible = "renesas,ether-r8a7794";
593 reg = <0 0xee700000 0 0x400>;
594 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
595 clocks = <&mstp8_clks R8A7794_CLK_ETHER>;
596 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
598 #address-cells = <1>;
603 avb: ethernet@e6800000 {
604 compatible = "renesas,etheravb-r8a7794",
605 "renesas,etheravb-rcar-gen2";
606 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
607 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&mstp8_clks R8A7794_CLK_ETHERAVB>;
609 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
610 #address-cells = <1>;
615 /* The memory map in the User's Manual maps the cores to bus numbers */
617 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
618 reg = <0 0xe6508000 0 0x40>;
619 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
620 clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
621 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
622 #address-cells = <1>;
624 i2c-scl-internal-delay-ns = <6>;
629 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
630 reg = <0 0xe6518000 0 0x40>;
631 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
632 clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
633 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
634 #address-cells = <1>;
636 i2c-scl-internal-delay-ns = <6>;
641 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
642 reg = <0 0xe6530000 0 0x40>;
643 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
644 clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
645 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
646 #address-cells = <1>;
648 i2c-scl-internal-delay-ns = <6>;
653 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
654 reg = <0 0xe6540000 0 0x40>;
655 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
656 clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
657 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
658 #address-cells = <1>;
660 i2c-scl-internal-delay-ns = <6>;
665 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
666 reg = <0 0xe6520000 0 0x40>;
667 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
668 clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
669 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
670 #address-cells = <1>;
672 i2c-scl-internal-delay-ns = <6>;
677 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
678 reg = <0 0xe6528000 0 0x40>;
679 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
680 clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
681 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
682 #address-cells = <1>;
684 i2c-scl-internal-delay-ns = <6>;
689 compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
690 "renesas,rmobile-iic";
691 reg = <0 0xe6500000 0 0x425>;
692 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
693 clocks = <&mstp3_clks R8A7794_CLK_IIC0>;
694 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
695 <&dmac1 0x61>, <&dmac1 0x62>;
696 dma-names = "tx", "rx", "tx", "rx";
697 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
698 #address-cells = <1>;
704 compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
705 "renesas,rmobile-iic";
706 reg = <0 0xe6510000 0 0x425>;
707 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
708 clocks = <&mstp3_clks R8A7794_CLK_IIC1>;
709 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
710 <&dmac1 0x65>, <&dmac1 0x66>;
711 dma-names = "tx", "rx", "tx", "rx";
712 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
713 #address-cells = <1>;
718 mmcif0: mmc@ee200000 {
719 compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
720 reg = <0 0xee200000 0 0x80>;
721 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
722 clocks = <&mstp3_clks R8A7794_CLK_MMCIF0>;
723 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
724 <&dmac1 0xd1>, <&dmac1 0xd2>;
725 dma-names = "tx", "rx", "tx", "rx";
726 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
732 compatible = "renesas,sdhi-r8a7794";
733 reg = <0 0xee100000 0 0x328>;
734 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
735 clocks = <&mstp3_clks R8A7794_CLK_SDHI0>;
736 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
737 <&dmac1 0xcd>, <&dmac1 0xce>;
738 dma-names = "tx", "rx", "tx", "rx";
739 max-frequency = <195000000>;
740 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
745 compatible = "renesas,sdhi-r8a7794";
746 reg = <0 0xee140000 0 0x100>;
747 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
748 clocks = <&mstp3_clks R8A7794_CLK_SDHI1>;
749 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
750 <&dmac1 0xc1>, <&dmac1 0xc2>;
751 dma-names = "tx", "rx", "tx", "rx";
752 max-frequency = <97500000>;
753 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
758 compatible = "renesas,sdhi-r8a7794";
759 reg = <0 0xee160000 0 0x100>;
760 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
761 clocks = <&mstp3_clks R8A7794_CLK_SDHI2>;
762 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
763 <&dmac1 0xd3>, <&dmac1 0xd4>;
764 dma-names = "tx", "rx", "tx", "rx";
765 max-frequency = <97500000>;
766 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
771 compatible = "renesas,qspi-r8a7794", "renesas,qspi";
772 reg = <0 0xe6b10000 0 0x2c>;
773 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
774 clocks = <&mstp9_clks R8A7794_CLK_QSPI_MOD>;
775 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
776 <&dmac1 0x17>, <&dmac1 0x18>;
777 dma-names = "tx", "rx", "tx", "rx";
778 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
780 #address-cells = <1>;
785 vin0: video@e6ef0000 {
786 compatible = "renesas,vin-r8a7794";
787 reg = <0 0xe6ef0000 0 0x1000>;
788 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
789 clocks = <&mstp8_clks R8A7794_CLK_VIN0>;
790 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
794 vin1: video@e6ef1000 {
795 compatible = "renesas,vin-r8a7794";
796 reg = <0 0xe6ef1000 0 0x1000>;
797 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
798 clocks = <&mstp8_clks R8A7794_CLK_VIN1>;
799 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
804 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
806 reg = <0 0xee090000 0 0xc00>,
807 <0 0xee080000 0 0x1100>;
808 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
809 clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
810 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
814 #address-cells = <3>;
816 #interrupt-cells = <1>;
817 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
818 interrupt-map-mask = <0xff00 0 0 0x7>;
819 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
820 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
821 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
824 reg = <0x800 0 0 0 0>;
830 reg = <0x1000 0 0 0 0>;
837 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
839 reg = <0 0xee0d0000 0 0xc00>,
840 <0 0xee0c0000 0 0x1100>;
841 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
842 clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
843 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
847 #address-cells = <3>;
849 #interrupt-cells = <1>;
850 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
851 interrupt-map-mask = <0xff00 0 0 0x7>;
852 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
853 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
854 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
857 reg = <0x10800 0 0 0 0>;
863 reg = <0x11000 0 0 0 0>;
869 hsusb: usb@e6590000 {
870 compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
871 reg = <0 0xe6590000 0 0x100>;
872 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
873 clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
874 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
875 renesas,buswait = <4>;
881 usbphy: usb-phy@e6590100 {
882 compatible = "renesas,usb-phy-r8a7794",
883 "renesas,rcar-gen2-usb-phy";
884 reg = <0 0xe6590100 0 0x100>;
885 #address-cells = <1>;
887 clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
888 clock-names = "usbhs";
889 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
892 usb0: usb-channel@0 {
896 usb2: usb-channel@2 {
903 compatible = "renesas,vsp1";
904 reg = <0 0xfe928000 0 0x8000>;
905 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
906 clocks = <&mstp1_clks R8A7794_CLK_VSP1_S>;
907 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
911 compatible = "renesas,vsp1";
912 reg = <0 0xfe930000 0 0x8000>;
913 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
914 clocks = <&mstp1_clks R8A7794_CLK_VSP1_DU0>;
915 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
918 du: display@feb00000 {
919 compatible = "renesas,du-r8a7794";
920 reg = <0 0xfeb00000 0 0x40000>;
922 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
923 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
924 clocks = <&mstp7_clks R8A7794_CLK_DU0>,
925 <&mstp7_clks R8A7794_CLK_DU1>;
926 clock-names = "du.0", "du.1";
930 #address-cells = <1>;
935 du_out_rgb0: endpoint {
940 du_out_rgb1: endpoint {
947 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
948 reg = <0 0xe6e80000 0 0x1000>;
949 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
950 clocks = <&mstp9_clks R8A7794_CLK_RCAN0>,
951 <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
952 clock-names = "clkp1", "clkp2", "can_clk";
953 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
958 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
959 reg = <0 0xe6e88000 0 0x1000>;
960 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
961 clocks = <&mstp9_clks R8A7794_CLK_RCAN1>,
962 <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
963 clock-names = "clkp1", "clkp2", "can_clk";
964 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
969 #address-cells = <2>;
973 /* External root clock */
975 compatible = "fixed-clock";
977 /* This value must be overriden by the board. */
978 clock-frequency = <0>;
981 /* External USB clock - can be overridden by the board */
982 usb_extal_clk: usb_extal {
983 compatible = "fixed-clock";
985 clock-frequency = <48000000>;
988 /* External CAN clock */
990 compatible = "fixed-clock";
992 /* This value must be overridden by the board. */
993 clock-frequency = <0>;
996 /* External SCIF clock */
998 compatible = "fixed-clock";
1000 /* This value must be overridden by the board. */
1001 clock-frequency = <0>;
1005 * The external audio clocks are configured as 0 Hz fixed
1006 * frequency clocks by default. Boards that provide audio
1007 * clocks should override them.
1009 audio_clka: audio_clka {
1010 compatible = "fixed-clock";
1012 clock-frequency = <0>;
1014 audio_clkb: audio_clkb {
1015 compatible = "fixed-clock";
1017 clock-frequency = <0>;
1019 audio_clkc: audio_clkc {
1020 compatible = "fixed-clock";
1022 clock-frequency = <0>;
1025 /* Special CPG clocks */
1026 cpg_clocks: cpg_clocks@e6150000 {
1027 compatible = "renesas,r8a7794-cpg-clocks",
1028 "renesas,rcar-gen2-cpg-clocks";
1029 reg = <0 0xe6150000 0 0x1000>;
1030 clocks = <&extal_clk &usb_extal_clk>;
1032 clock-output-names = "main", "pll0", "pll1", "pll3",
1033 "lb", "qspi", "sdh", "sd0", "rcan";
1034 #power-domain-cells = <0>;
1036 /* Variable factor clocks */
1037 sd2_clk: sd2@e6150078 {
1038 compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
1039 reg = <0 0xe6150078 0 4>;
1040 clocks = <&pll1_div2_clk>;
1043 sd3_clk: sd3@e615026c {
1044 compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
1045 reg = <0 0xe615026c 0 4>;
1046 clocks = <&pll1_div2_clk>;
1049 mmc0_clk: mmc0@e6150240 {
1050 compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
1051 reg = <0 0xe6150240 0 4>;
1052 clocks = <&pll1_div2_clk>;
1056 /* Fixed factor clocks */
1057 pll1_div2_clk: pll1_div2 {
1058 compatible = "fixed-factor-clock";
1059 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1065 compatible = "fixed-factor-clock";
1066 clocks = <&cpg_clocks R8A7794_CLK_PLL0>;
1072 compatible = "fixed-factor-clock";
1073 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1079 compatible = "fixed-factor-clock";
1080 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1086 compatible = "fixed-factor-clock";
1087 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1093 compatible = "fixed-factor-clock";
1094 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1100 compatible = "fixed-factor-clock";
1101 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1107 compatible = "fixed-factor-clock";
1108 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1114 compatible = "fixed-factor-clock";
1115 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1121 compatible = "fixed-factor-clock";
1122 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1128 compatible = "fixed-factor-clock";
1129 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1135 compatible = "fixed-factor-clock";
1136 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1138 clock-div = <(48 * 1024)>;
1141 oscclk_clk: oscclk {
1142 compatible = "fixed-factor-clock";
1143 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1145 clock-div = <(12 * 1024)>;
1149 compatible = "fixed-factor-clock";
1150 clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
1156 compatible = "fixed-factor-clock";
1157 clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
1163 compatible = "fixed-factor-clock";
1164 clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
1170 compatible = "fixed-factor-clock";
1171 clocks = <&pll1_div2_clk>;
1177 compatible = "fixed-factor-clock";
1178 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1185 compatible = "fixed-factor-clock";
1186 clocks = <&extal_clk>;
1193 mstp0_clks: mstp0_clks@e6150130 {
1194 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1195 reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
1198 clock-indices = <R8A7794_CLK_MSIOF0>;
1199 clock-output-names = "msiof0";
1201 mstp1_clks: mstp1_clks@e6150134 {
1202 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1203 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
1204 clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>,
1205 <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>,
1206 <&zs_clk>, <&zs_clk>;
1209 R8A7794_CLK_VCP0 R8A7794_CLK_VPC0 R8A7794_CLK_TMU1
1210 R8A7794_CLK_3DG R8A7794_CLK_2DDMAC R8A7794_CLK_FDP1_0
1211 R8A7794_CLK_TMU3 R8A7794_CLK_TMU2 R8A7794_CLK_CMT0
1212 R8A7794_CLK_TMU0 R8A7794_CLK_VSP1_DU0 R8A7794_CLK_VSP1_S
1214 clock-output-names =
1215 "vcp0", "vpc0", "tmu1", "3dg", "2ddmac", "fdp1-0",
1216 "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du0", "vsps";
1218 mstp2_clks: mstp2_clks@e6150138 {
1219 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1220 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
1221 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1222 <&mp_clk>, <&mp_clk>, <&mp_clk>,
1223 <&zs_clk>, <&zs_clk>;
1226 R8A7794_CLK_SCIFA2 R8A7794_CLK_SCIFA1 R8A7794_CLK_SCIFA0
1227 R8A7794_CLK_MSIOF2 R8A7794_CLK_SCIFB0 R8A7794_CLK_SCIFB1
1228 R8A7794_CLK_MSIOF1 R8A7794_CLK_SCIFB2
1229 R8A7794_CLK_SYS_DMAC1 R8A7794_CLK_SYS_DMAC0
1231 clock-output-names =
1232 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
1233 "scifb1", "msiof1", "scifb2",
1234 "sys-dmac1", "sys-dmac0";
1236 mstp3_clks: mstp3_clks@e615013c {
1237 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1238 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1239 clocks = <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7794_CLK_SD0>,
1240 <&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>,
1241 <&hp_clk>, <&hp_clk>;
1244 R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0
1245 R8A7794_CLK_MMCIF0 R8A7794_CLK_IIC0
1246 R8A7794_CLK_IIC1 R8A7794_CLK_CMT1
1247 R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1
1249 clock-output-names =
1250 "sdhi2", "sdhi1", "sdhi0",
1251 "mmcif0", "i2c6", "i2c7",
1252 "cmt1", "usbdmac0", "usbdmac1";
1254 mstp4_clks: mstp4_clks@e6150140 {
1255 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1256 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
1257 clocks = <&cp_clk>, <&zs_clk>;
1259 clock-indices = <R8A7794_CLK_IRQC R8A7794_CLK_INTC_SYS>;
1260 clock-output-names = "irqc", "intc-sys";
1262 mstp5_clks: mstp5_clks@e6150144 {
1263 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1264 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1265 clocks = <&hp_clk>, <&p_clk>;
1267 clock-indices = <R8A7794_CLK_AUDIO_DMAC0
1269 clock-output-names = "audmac0", "pwm";
1271 mstp7_clks: mstp7_clks@e615014c {
1272 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1273 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
1274 clocks = <&mp_clk>, <&hp_clk>,
1275 <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
1276 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1277 <&zx_clk>, <&zx_clk>;
1280 R8A7794_CLK_EHCI R8A7794_CLK_HSUSB
1281 R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
1282 R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
1283 R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
1285 R8A7794_CLK_DU1 R8A7794_CLK_DU0
1287 clock-output-names =
1289 "hscif2", "scif5", "scif4", "hscif1", "hscif0",
1290 "scif3", "scif2", "scif1", "scif0",
1293 mstp8_clks: mstp8_clks@e6150990 {
1294 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1295 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
1296 clocks = <&zg_clk>, <&zg_clk>, <&hp_clk>, <&p_clk>;
1299 R8A7794_CLK_VIN1 R8A7794_CLK_VIN0
1300 R8A7794_CLK_ETHERAVB R8A7794_CLK_ETHER
1302 clock-output-names =
1303 "vin1", "vin0", "etheravb", "ether";
1305 mstp9_clks: mstp9_clks@e6150994 {
1306 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1307 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
1308 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
1309 <&cp_clk>, <&cp_clk>, <&cp_clk>, <&p_clk>,
1310 <&p_clk>, <&cpg_clocks R8A7794_CLK_QSPI>,
1311 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
1312 <&hp_clk>, <&hp_clk>;
1314 clock-indices = <R8A7794_CLK_GPIO6 R8A7794_CLK_GPIO5
1315 R8A7794_CLK_GPIO4 R8A7794_CLK_GPIO3
1316 R8A7794_CLK_GPIO2 R8A7794_CLK_GPIO1
1317 R8A7794_CLK_GPIO0 R8A7794_CLK_RCAN1
1318 R8A7794_CLK_RCAN0 R8A7794_CLK_QSPI_MOD
1319 R8A7794_CLK_I2C5 R8A7794_CLK_I2C4
1320 R8A7794_CLK_I2C3 R8A7794_CLK_I2C2
1321 R8A7794_CLK_I2C1 R8A7794_CLK_I2C0>;
1322 clock-output-names =
1323 "gpio6", "gpio5", "gpio4", "gpio3", "gpio2",
1324 "gpio1", "gpio0", "rcan1", "rcan0", "qspi_mod",
1325 "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
1327 mstp10_clks: mstp10_clks@e6150998 {
1328 compatible = "renesas,r8a7794-mstp-clocks",
1329 "renesas,cpg-mstp-clocks";
1330 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1332 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1333 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1334 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1335 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1336 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1337 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1338 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1339 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1340 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1341 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1343 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1344 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1345 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1346 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1347 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1348 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1349 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1350 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1351 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1352 <&mstp10_clks R8A7794_CLK_SCU_ALL>;
1354 clock-indices = <R8A7794_CLK_SSI_ALL
1355 R8A7794_CLK_SSI9 R8A7794_CLK_SSI8
1356 R8A7794_CLK_SSI7 R8A7794_CLK_SSI6
1357 R8A7794_CLK_SSI5 R8A7794_CLK_SSI4
1358 R8A7794_CLK_SSI3 R8A7794_CLK_SSI2
1359 R8A7794_CLK_SSI1 R8A7794_CLK_SSI0
1361 R8A7794_CLK_SCU_DVC1
1362 R8A7794_CLK_SCU_DVC0
1363 R8A7794_CLK_SCU_CTU1_MIX1
1364 R8A7794_CLK_SCU_CTU0_MIX0
1365 R8A7794_CLK_SCU_SRC6
1366 R8A7794_CLK_SCU_SRC5
1367 R8A7794_CLK_SCU_SRC4
1368 R8A7794_CLK_SCU_SRC3
1369 R8A7794_CLK_SCU_SRC2
1370 R8A7794_CLK_SCU_SRC1>;
1371 clock-output-names = "ssi-all", "ssi9", "ssi8", "ssi7",
1372 "ssi6", "ssi5", "ssi4", "ssi3",
1373 "ssi2", "ssi1", "ssi0",
1374 "scu-all", "scu-dvc1", "scu-dvc0",
1375 "scu-ctu1-mix1", "scu-ctu0-mix0",
1376 "scu-src6", "scu-src5", "scu-src4",
1377 "scu-src3", "scu-src2", "scu-src1";
1379 mstp11_clks: mstp11_clks@e615099c {
1380 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1381 reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
1382 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
1385 R8A7794_CLK_SCIFA3 R8A7794_CLK_SCIFA4 R8A7794_CLK_SCIFA5
1387 clock-output-names = "scifa3", "scifa4", "scifa5";
1391 rst: reset-controller@e6160000 {
1392 compatible = "renesas,r8a7794-rst";
1393 reg = <0 0xe6160000 0 0x0100>;
1396 prr: chipid@ff000044 {
1397 compatible = "renesas,prr";
1398 reg = <0 0xff000044 0 4>;
1401 sysc: system-controller@e6180000 {
1402 compatible = "renesas,r8a7794-sysc";
1403 reg = <0 0xe6180000 0 0x0200>;
1404 #power-domain-cells = <1>;
1407 ipmmu_sy0: mmu@e6280000 {
1408 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1409 reg = <0 0xe6280000 0 0x1000>;
1410 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1411 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1413 status = "disabled";
1416 ipmmu_sy1: mmu@e6290000 {
1417 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1418 reg = <0 0xe6290000 0 0x1000>;
1419 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1421 status = "disabled";
1424 ipmmu_ds: mmu@e6740000 {
1425 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1426 reg = <0 0xe6740000 0 0x1000>;
1427 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1428 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1430 status = "disabled";
1433 ipmmu_mp: mmu@ec680000 {
1434 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1435 reg = <0 0xec680000 0 0x1000>;
1436 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1438 status = "disabled";
1441 ipmmu_mx: mmu@fe951000 {
1442 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1443 reg = <0 0xfe951000 0 0x1000>;
1444 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1445 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1447 status = "disabled";
1450 ipmmu_gp: mmu@e62a0000 {
1451 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1452 reg = <0 0xe62a0000 0 0x1000>;
1453 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1454 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1456 status = "disabled";
1459 rcar_sound: sound@ec500000 {
1461 * #sound-dai-cells is required
1463 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1464 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1466 compatible = "renesas,rcar_sound-r8a7794",
1467 "renesas,rcar_sound-gen2";
1468 reg = <0 0xec500000 0 0x1000>, /* SCU */
1469 <0 0xec5a0000 0 0x100>, /* ADG */
1470 <0 0xec540000 0 0x1000>, /* SSIU */
1471 <0 0xec541000 0 0x280>, /* SSI */
1472 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
1473 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1475 clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1476 <&mstp10_clks R8A7794_CLK_SSI9>,
1477 <&mstp10_clks R8A7794_CLK_SSI8>,
1478 <&mstp10_clks R8A7794_CLK_SSI7>,
1479 <&mstp10_clks R8A7794_CLK_SSI6>,
1480 <&mstp10_clks R8A7794_CLK_SSI5>,
1481 <&mstp10_clks R8A7794_CLK_SSI4>,
1482 <&mstp10_clks R8A7794_CLK_SSI3>,
1483 <&mstp10_clks R8A7794_CLK_SSI2>,
1484 <&mstp10_clks R8A7794_CLK_SSI1>,
1485 <&mstp10_clks R8A7794_CLK_SSI0>,
1486 <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
1487 <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
1488 <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
1489 <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
1490 <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
1491 <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
1492 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
1493 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
1494 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
1495 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
1496 <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
1497 <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
1498 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
1500 clock-names = "ssi-all",
1501 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1502 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1503 "src.6", "src.5", "src.4", "src.3", "src.2",
1508 "clk_a", "clk_b", "clk_c", "clk_i";
1509 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1511 status = "disabled";
1515 dmas = <&audma0 0xbc>;
1519 dmas = <&audma0 0xbe>;
1542 status = "disabled";
1545 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1546 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1547 dma-names = "rx", "tx";
1550 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1551 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1552 dma-names = "rx", "tx";
1555 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1556 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1557 dma-names = "rx", "tx";
1560 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1561 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1562 dma-names = "rx", "tx";
1565 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1566 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1567 dma-names = "rx", "tx";
1570 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1571 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1572 dma-names = "rx", "tx";
1578 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1579 dmas = <&audma0 0x01>, <&audma0 0x02>,
1580 <&audma0 0x15>, <&audma0 0x16>;
1581 dma-names = "rx", "tx", "rxu", "txu";
1584 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1585 dmas = <&audma0 0x03>, <&audma0 0x04>,
1586 <&audma0 0x49>, <&audma0 0x4a>;
1587 dma-names = "rx", "tx", "rxu", "txu";
1590 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1591 dmas = <&audma0 0x05>, <&audma0 0x06>,
1592 <&audma0 0x63>, <&audma0 0x64>;
1593 dma-names = "rx", "tx", "rxu", "txu";
1596 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1597 dmas = <&audma0 0x07>, <&audma0 0x08>,
1598 <&audma0 0x6f>, <&audma0 0x70>;
1599 dma-names = "rx", "tx", "rxu", "txu";
1602 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1603 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1604 <&audma0 0x71>, <&audma0 0x72>;
1605 dma-names = "rx", "tx", "rxu", "txu";
1608 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1609 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1610 <&audma0 0x73>, <&audma0 0x74>;
1611 dma-names = "rx", "tx", "rxu", "txu";
1614 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1615 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1616 <&audma0 0x75>, <&audma0 0x76>;
1617 dma-names = "rx", "tx", "rxu", "txu";
1620 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1621 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1622 <&audma0 0x79>, <&audma0 0x7a>;
1623 dma-names = "rx", "tx", "rxu", "txu";
1626 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1627 dmas = <&audma0 0x11>, <&audma0 0x12>,
1628 <&audma0 0x7b>, <&audma0 0x7c>;
1629 dma-names = "rx", "tx", "rxu", "txu";
1632 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1633 dmas = <&audma0 0x13>, <&audma0 0x14>,
1634 <&audma0 0x7d>, <&audma0 0x7e>;
1635 dma-names = "rx", "tx", "rxu", "txu";