2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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48 #include "skeleton.dtsi"
49 #include "armv7-m.dtsi"
50 #include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
56 compatible = "fixed-clock";
57 clock-frequency = <0>;
62 compatible = "fixed-clock";
63 clock-frequency = <32768>;
68 compatible = "fixed-clock";
69 clock-frequency = <32000>;
74 timer2: timer@40000000 {
75 compatible = "st,stm32-timer";
76 reg = <0x40000000 0x400>;
78 clocks = <&rcc 0 128>;
82 timer3: timer@40000400 {
83 compatible = "st,stm32-timer";
84 reg = <0x40000400 0x400>;
86 clocks = <&rcc 0 129>;
90 timer4: timer@40000800 {
91 compatible = "st,stm32-timer";
92 reg = <0x40000800 0x400>;
94 clocks = <&rcc 0 130>;
98 timer5: timer@40000c00 {
99 compatible = "st,stm32-timer";
100 reg = <0x40000c00 0x400>;
102 clocks = <&rcc 0 131>;
105 timer6: timer@40001000 {
106 compatible = "st,stm32-timer";
107 reg = <0x40001000 0x400>;
109 clocks = <&rcc 0 132>;
113 timer7: timer@40001400 {
114 compatible = "st,stm32-timer";
115 reg = <0x40001400 0x400>;
117 clocks = <&rcc 0 133>;
121 usart2: serial@40004400 {
122 compatible = "st,stm32-usart", "st,stm32-uart";
123 reg = <0x40004400 0x400>;
125 clocks = <&rcc 0 145>;
129 usart3: serial@40004800 {
130 compatible = "st,stm32-usart", "st,stm32-uart";
131 reg = <0x40004800 0x400>;
133 clocks = <&rcc 0 146>;
135 dmas = <&dma1 1 4 0x400 0x0>,
136 <&dma1 3 4 0x400 0x0>;
137 dma-names = "rx", "tx";
140 usart4: serial@40004c00 {
141 compatible = "st,stm32-uart";
142 reg = <0x40004c00 0x400>;
144 clocks = <&rcc 0 147>;
148 usart5: serial@40005000 {
149 compatible = "st,stm32-uart";
150 reg = <0x40005000 0x400>;
152 clocks = <&rcc 0 148>;
156 usart7: serial@40007800 {
157 compatible = "st,stm32-usart", "st,stm32-uart";
158 reg = <0x40007800 0x400>;
160 clocks = <&rcc 0 158>;
164 usart8: serial@40007c00 {
165 compatible = "st,stm32-usart", "st,stm32-uart";
166 reg = <0x40007c00 0x400>;
168 clocks = <&rcc 0 159>;
172 usart1: serial@40011000 {
173 compatible = "st,stm32-usart", "st,stm32-uart";
174 reg = <0x40011000 0x400>;
176 clocks = <&rcc 0 164>;
178 dmas = <&dma2 2 4 0x400 0x0>,
179 <&dma2 7 4 0x400 0x0>;
180 dma-names = "rx", "tx";
183 usart6: serial@40011400 {
184 compatible = "st,stm32-usart", "st,stm32-uart";
185 reg = <0x40011400 0x400>;
187 clocks = <&rcc 0 165>;
191 syscfg: system-config@40013800 {
192 compatible = "syscon";
193 reg = <0x40013800 0x400>;
196 exti: interrupt-controller@40013c00 {
197 compatible = "st,stm32-exti";
198 interrupt-controller;
199 #interrupt-cells = <2>;
200 reg = <0x40013C00 0x400>;
201 interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>;
204 pwrcfg: power-config@40007000 {
205 compatible = "syscon";
206 reg = <0x40007000 0x400>;
210 #address-cells = <1>;
212 compatible = "st,stm32f429-pinctrl";
213 ranges = <0 0x40020000 0x3000>;
214 interrupt-parent = <&exti>;
215 st,syscfg = <&syscfg 0x8>;
218 gpioa: gpio@40020000 {
223 st,bank-name = "GPIOA";
226 gpiob: gpio@40020400 {
231 st,bank-name = "GPIOB";
234 gpioc: gpio@40020800 {
239 st,bank-name = "GPIOC";
242 gpiod: gpio@40020c00 {
247 st,bank-name = "GPIOD";
250 gpioe: gpio@40021000 {
253 reg = <0x1000 0x400>;
255 st,bank-name = "GPIOE";
258 gpiof: gpio@40021400 {
261 reg = <0x1400 0x400>;
263 st,bank-name = "GPIOF";
266 gpiog: gpio@40021800 {
269 reg = <0x1800 0x400>;
271 st,bank-name = "GPIOG";
274 gpioh: gpio@40021c00 {
277 reg = <0x1c00 0x400>;
279 st,bank-name = "GPIOH";
282 gpioi: gpio@40022000 {
285 reg = <0x2000 0x400>;
287 st,bank-name = "GPIOI";
290 gpioj: gpio@40022400 {
293 reg = <0x2400 0x400>;
295 st,bank-name = "GPIOJ";
298 gpiok: gpio@40022800 {
301 reg = <0x2800 0x400>;
302 clocks = <&rcc 0 10>;
303 st,bank-name = "GPIOK";
306 usart1_pins_a: usart1@0 {
308 pinmux = <STM32F429_PA9_FUNC_USART1_TX>;
314 pinmux = <STM32F429_PA10_FUNC_USART1_RX>;
319 usbotg_hs_pins_a: usbotg_hs@0 {
321 pinmux = <STM32F429_PH4_FUNC_OTG_HS_ULPI_NXT>,
322 <STM32F429_PI11_FUNC_OTG_HS_ULPI_DIR>,
323 <STM32F429_PC0_FUNC_OTG_HS_ULPI_STP>,
324 <STM32F429_PA5_FUNC_OTG_HS_ULPI_CK>,
325 <STM32F429_PA3_FUNC_OTG_HS_ULPI_D0>,
326 <STM32F429_PB0_FUNC_OTG_HS_ULPI_D1>,
327 <STM32F429_PB1_FUNC_OTG_HS_ULPI_D2>,
328 <STM32F429_PB10_FUNC_OTG_HS_ULPI_D3>,
329 <STM32F429_PB11_FUNC_OTG_HS_ULPI_D4>,
330 <STM32F429_PB12_FUNC_OTG_HS_ULPI_D5>,
331 <STM32F429_PB13_FUNC_OTG_HS_ULPI_D6>,
332 <STM32F429_PB5_FUNC_OTG_HS_ULPI_D7>;
339 ethernet_mii: mii@0 {
341 pinmux = <STM32F429_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
342 <STM32F429_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
343 <STM32F429_PC2_FUNC_ETH_MII_TXD2>,
344 <STM32F429_PB8_FUNC_ETH_MII_TXD3>,
345 <STM32F429_PC3_FUNC_ETH_MII_TX_CLK>,
346 <STM32F429_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN>,
347 <STM32F429_PA2_FUNC_ETH_MDIO>,
348 <STM32F429_PC1_FUNC_ETH_MDC>,
349 <STM32F429_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK>,
350 <STM32F429_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV>,
351 <STM32F429_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0>,
352 <STM32F429_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1>,
353 <STM32F429_PH6_FUNC_ETH_MII_RXD2>,
354 <STM32F429_PH7_FUNC_ETH_MII_RXD3>;
363 compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
364 reg = <0x40023800 0x400>;
366 st,syscfg = <&pwrcfg>;
369 dma1: dma-controller@40026000 {
370 compatible = "st,stm32-dma";
371 reg = <0x40026000 0x400>;
380 clocks = <&rcc 0 21>;
384 dma2: dma-controller@40026400 {
385 compatible = "st,stm32-dma";
386 reg = <0x40026400 0x400>;
395 clocks = <&rcc 0 22>;
400 mac: ethernet@40028000 {
401 compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
402 reg = <0x40028000 0x8000>;
403 reg-names = "stmmaceth";
405 interrupt-names = "macirq";
406 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
407 clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
408 st,syscon = <&syscfg 0x4>;
414 usbotg_hs: usb@40040000 {
415 compatible = "snps,dwc2";
416 reg = <0x40040000 0x40000>;
418 clocks = <&rcc 0 29>;
424 compatible = "st,stm32-rng";
425 reg = <0x50060800 0x400>;
427 clocks = <&rcc 0 38>;