1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2018 Zodiac Inflight Innovations
11 model = "ZII VF610 CFU1 Board";
12 compatible = "zii,vf610cfu1", "zii,vf610dev", "fsl,vf610";
19 reg = <0x80000000 0x20000000>;
23 compatible = "gpio-leds";
24 pinctrl-0 = <&pinctrl_leds_debug>;
25 pinctrl-names = "default";
28 label = "zii:green:debug1";
29 gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
30 linux,default-trigger = "heartbeat";
35 label = "zii:red:fail";
36 gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
37 default-state = "off";
42 label = "zii:green:status";
43 gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
44 default-state = "off";
49 label = "zii:green:debug_a";
50 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
51 default-state = "off";
56 label = "zii:green:debug_b";
57 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
58 default-state = "off";
63 reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
64 compatible = "regulator-fixed";
65 regulator-name = "vcc_3v3_mcu";
66 regulator-min-microvolt = <3300000>;
67 regulator-max-microvolt = <3300000>;
71 compatible = "sff,sff";
72 pinctrl-0 = <&pinctrl_optical>;
73 pinctrl-names = "default";
75 los-gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>;
76 tx-disable-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
81 vref-supply = <®_vcc_3v3_mcu>;
86 vref-supply = <®_vcc_3v3_mcu>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_dspi1>;
99 compatible = "m25p128", "jedec,spi-nor";
101 spi-max-frequency = <50000000>;
105 reg = <0x0 0x01000000>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_esdhc0>;
124 keep-power-in-suspend;
131 pinctrl-names = "default";
132 pinctrl-0 = <&pinctrl_esdhc1>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_fec1>;
150 #address-cells = <1>;
155 compatible = "marvell,mv88e6085";
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_switch>;
159 eeprom-length = <512>;
160 interrupt-parent = <&gpio3>;
161 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
162 interrupt-controller;
163 #interrupt-cells = <2>;
164 reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
167 #address-cells = <1>;
172 label = "eth_cu_1000_1";
177 label = "eth_cu_1000_2";
182 label = "eth_cu_1000_3";
187 label = "eth_fc_1000_1";
188 phy-mode = "1000base-x";
189 managed = "in-band-status";
209 clock-frequency = <100000>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&pinctrl_i2c0>;
215 compatible = "nxp,pca9554";
221 compatible = "national,lm75";
226 compatible = "atmel,24c04";
232 compatible = "atmel,24c04";
239 pinctrl-names = "default";
240 pinctrl-0 = <&pinctrl_uart0>;
245 pinctrl_dspi1: dspi1grp {
247 VF610_PAD_PTD5__DSPI1_CS0 0x1182
248 VF610_PAD_PTC6__DSPI1_SIN 0x1181
249 VF610_PAD_PTC7__DSPI1_SOUT 0x1182
250 VF610_PAD_PTC8__DSPI1_SCK 0x1182
254 pinctrl_esdhc0: esdhc0grp {
256 VF610_PAD_PTC0__ESDHC0_CLK 0x31ef
257 VF610_PAD_PTC1__ESDHC0_CMD 0x31ef
258 VF610_PAD_PTC2__ESDHC0_DAT0 0x31ef
259 VF610_PAD_PTC3__ESDHC0_DAT1 0x31ef
260 VF610_PAD_PTC4__ESDHC0_DAT2 0x31ef
261 VF610_PAD_PTC5__ESDHC0_DAT3 0x31ef
262 VF610_PAD_PTD23__ESDHC0_DAT4 0x31ef
263 VF610_PAD_PTD22__ESDHC0_DAT5 0x31ef
264 VF610_PAD_PTD21__ESDHC0_DAT6 0x31ef
265 VF610_PAD_PTD20__ESDHC0_DAT7 0x31ef
269 pinctrl_esdhc1: esdhc1grp {
271 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
272 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
273 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
274 VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
275 VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
276 VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
280 pinctrl_fec1: fec1grp {
282 VF610_PAD_PTA6__RMII_CLKIN 0x30d1
283 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30fe
284 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
285 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
286 VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1
287 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
288 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
289 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
290 VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
291 VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
295 pinctrl_i2c0: i2c0grp {
297 VF610_PAD_PTB14__I2C0_SCL 0x37ff
298 VF610_PAD_PTB15__I2C0_SDA 0x37ff
302 pinctrl_leds_debug: pinctrl-leds-debug {
304 VF610_PAD_PTD3__GPIO_82 0x31c2
305 VF610_PAD_PTE3__GPIO_108 0x31c2
306 VF610_PAD_PTE4__GPIO_109 0x31c2
307 VF610_PAD_PTE5__GPIO_110 0x31c2
308 VF610_PAD_PTE6__GPIO_111 0x31c2
312 pinctrl_optical: optical-grp {
315 VF610_PAD_PTE27__GPIO_132 0x3061
317 /* SFF Transmit disable output */
318 VF610_PAD_PTE13__GPIO_118 0x3043
322 pinctrl_switch: switch-grp {
324 VF610_PAD_PTB28__GPIO_98 0x3061
325 VF610_PAD_PTE2__GPIO_107 0x1042
329 pinctrl_uart0: uart0grp {
331 VF610_PAD_PTB10__UART0_TX 0x21a2
332 VF610_PAD_PTB11__UART0_RX 0x21a1