sys/gnu/dts/arm/vf610-zii-cfu1.dts

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2
   3 /*
   4  * Copyright (C) 2018 Zodiac Inflight Innovations
   5  */
   6
   7 /dts-v1/;
   8 #include "vf610.dtsi"
   9
  10 / {
  11         model = "ZII VF610 CFU1 Board";
  12         compatible = "zii,vf610cfu1", "zii,vf610dev", "fsl,vf610";
  13
  14         chosen {
  15                 stdout-path = &uart0;
  16         };
  17
  18         memory@80000000 {
  19                 device_type = "memory";
  20                 reg = <0x80000000 0x20000000>;
  21         };
  22
  23         gpio-leds {
  24                 compatible = "gpio-leds";
  25                 pinctrl-0 = <&pinctrl_leds_debug>;
  26                 pinctrl-names = "default";
  27
  28                 led-debug {
  29                         label = "zii:green:debug1";
  30                         gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
  31                         linux,default-trigger = "heartbeat";
  32                         max-brightness = <1>;
  33                 };
  34
  35                 led-fail {
  36                         label = "zii:red:fail";
  37                         gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
  38                         default-state = "off";
  39                         max-brightness = <1>;
  40                 };
  41
  42                 led-status {
  43                         label = "zii:green:status";
  44                         gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
  45                         default-state = "off";
  46                         max-brightness = <1>;
  47                 };
  48
  49                 led-debug-a {
  50                         label = "zii:green:debug_a";
  51                         gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
  52                         default-state = "off";
  53                         max-brightness = <1>;
  54                 };
  55
  56                 led-debug-b {
  57                         label = "zii:green:debug_b";
  58                         gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
  59                         default-state = "off";
  60                         max-brightness = <1>;
  61                 };
  62         };
  63
  64         reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
  65                  compatible = "regulator-fixed";
  66                  regulator-name = "vcc_3v3_mcu";
  67                  regulator-min-microvolt = <3300000>;
  68                  regulator-max-microvolt = <3300000>;
  69         };
  70
  71         sff: sfp {
  72                 compatible = "sff,sff";
  73                 pinctrl-0 = <&pinctrl_optical>;
  74                 pinctrl-names = "default";
  75                 i2c-bus = <&i2c0>;
  76                 los-gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>;
  77                 tx-disable-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  78         };
  79 };
  80
  81 &adc0 {
  82         vref-supply = <&reg_vcc_3v3_mcu>;
  83         status = "okay";
  84 };
  85
  86 &adc1 {
  87         vref-supply = <&reg_vcc_3v3_mcu>;
  88         status = "okay";
  89 };
  90
  91 &dspi1 {
  92         bus-num = <1>;
  93         pinctrl-names = "default";
  94         pinctrl-0 = <&pinctrl_dspi1>;
  95         status = "okay";
  96
  97         m25p128@0 {
  98                 #address-cells = <1>;
  99                 #size-cells = <1>;
 100                 compatible = "m25p128", "jedec,spi-nor";
 101                 reg = <0>;
 102                 spi-max-frequency = <50000000>;
 103
 104                 partition@0 {
 105                         label = "m25p128-0";
 106                         reg = <0x0 0x01000000>;
 107                 };
 108         };
 109 };
 110
 111 &edma0 {
 112         status = "okay";
 113 };
 114
 115 &edma1 {
 116         status = "okay";
 117 };
 118
 119 &esdhc0 {
 120         pinctrl-names = "default";
 121         pinctrl-0 = <&pinctrl_esdhc0>;
 122         bus-width = <8>;
 123         non-removable;
 124         no-1-8-v;
 125         keep-power-in-suspend;
 126         no-sdio;
 127         no-sd;
 128         status = "okay";
 129 };
 130
 131 &esdhc1 {
 132         pinctrl-names = "default";
 133         pinctrl-0 = <&pinctrl_esdhc1>;
 134         bus-width = <4>;
 135         no-sdio;
 136         status = "okay";
 137 };
 138
 139 &fec1 {
 140         phy-mode = "rmii";
 141         pinctrl-names = "default";
 142         pinctrl-0 = <&pinctrl_fec1>;
 143         status = "okay";
 144
 145         fixed-link {
 146                 speed = <100>;
 147                 full-duplex;
 148         };
 149
 150         mdio1: mdio {
 151                 #address-cells = <1>;
 152                 #size-cells = <0>;
 153                 status = "okay";
 154
 155                 switch0: switch0@0 {
 156                         compatible = "marvell,mv88e6085";
 157                         pinctrl-names = "default";
 158                         pinctrl-0 = <&pinctrl_switch>;
 159                         reg = <0>;
 160                         eeprom-length = <512>;
 161                         interrupt-parent = <&gpio3>;
 162                         interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
 163                         interrupt-controller;
 164                         #interrupt-cells = <2>;
 165                         reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
 166
 167                         ports {
 168                                 #address-cells = <1>;
 169                                 #size-cells = <0>;
 170
 171                                 port@0 {
 172                                         reg = <0>;
 173                                         label = "eth_cu_1000_1";
 174                                 };
 175
 176                                 port@1 {
 177                                         reg = <1>;
 178                                         label = "eth_cu_1000_2";
 179                                 };
 180
 181                                 port@2 {
 182                                         reg = <2>;
 183                                         label = "eth_cu_1000_3";
 184                                 };
 185
 186                                 port@5 {
 187                                         reg = <5>;
 188                                         label = "eth_fc_1000_1";
 189                                         phy-mode = "1000base-x";
 190                                         managed = "in-band-status";
 191                                         sfp = <&sff>;
 192                                 };
 193
 194                                 port@6 {
 195                                         reg = <6>;
 196                                         label = "cpu";
 197                                         ethernet = <&fec1>;
 198
 199                                         fixed-link {
 200                                                 speed = <100>;
 201                                                 full-duplex;
 202                                         };
 203                                 };
 204                         };
 205                 };
 206         };
 207 };
 208
 209 &i2c0 {
 210         clock-frequency = <400000>;
 211         pinctrl-names = "default";
 212         pinctrl-0 = <&pinctrl_i2c0>;
 213         status = "okay";
 214
 215         pca9554@22 {
 216                 compatible = "nxp,pca9554";
 217                 reg = <0x22>;
 218                 gpio-controller;
 219         };
 220
 221         lm75@48 {
 222                 compatible = "national,lm75";
 223                 reg = <0x48>;
 224         };
 225
 226         at24c04@52 {
 227                 compatible = "atmel,24c04";
 228                 reg = <0x52>;
 229                 label = "nvm";
 230         };
 231
 232         at24c04@54 {
 233                 compatible = "atmel,24c04";
 234                 reg = <0x54>;
 235                 label = "nameplate";
 236         };
 237 };
 238
 239 &uart0 {
 240         pinctrl-names = "default";
 241         pinctrl-0 = <&pinctrl_uart0>;
 242         status = "okay";
 243 };
 244
 245 &iomuxc {
 246         pinctrl_dspi1: dspi1grp {
 247                 fsl,pins = <
 248                         VF610_PAD_PTD5__DSPI1_CS0               0x1182
 249                         VF610_PAD_PTC6__DSPI1_SIN               0x1181
 250                         VF610_PAD_PTC7__DSPI1_SOUT              0x1182
 251                         VF610_PAD_PTC8__DSPI1_SCK               0x1182
 252                 >;
 253         };
 254
 255         pinctrl_esdhc0: esdhc0grp {
 256                 fsl,pins = <
 257                         VF610_PAD_PTC0__ESDHC0_CLK              0x31ef
 258                         VF610_PAD_PTC1__ESDHC0_CMD              0x31ef
 259                         VF610_PAD_PTC2__ESDHC0_DAT0             0x31ef
 260                         VF610_PAD_PTC3__ESDHC0_DAT1             0x31ef
 261                         VF610_PAD_PTC4__ESDHC0_DAT2             0x31ef
 262                         VF610_PAD_PTC5__ESDHC0_DAT3             0x31ef
 263                         VF610_PAD_PTD23__ESDHC0_DAT4            0x31ef
 264                         VF610_PAD_PTD22__ESDHC0_DAT5            0x31ef
 265                         VF610_PAD_PTD21__ESDHC0_DAT6            0x31ef
 266                         VF610_PAD_PTD20__ESDHC0_DAT7            0x31ef
 267                 >;
 268         };
 269
 270         pinctrl_esdhc1: esdhc1grp {
 271                 fsl,pins = <
 272                         VF610_PAD_PTA24__ESDHC1_CLK             0x31ef
 273                         VF610_PAD_PTA25__ESDHC1_CMD             0x31ef
 274                         VF610_PAD_PTA26__ESDHC1_DAT0            0x31ef
 275                         VF610_PAD_PTA27__ESDHC1_DAT1            0x31ef
 276                         VF610_PAD_PTA28__ESDHC1_DATA2           0x31ef
 277                         VF610_PAD_PTA29__ESDHC1_DAT3            0x31ef
 278                 >;
 279         };
 280
 281         pinctrl_fec1: fec1grp {
 282                 fsl,pins = <
 283                         VF610_PAD_PTA6__RMII_CLKIN              0x30d1
 284                         VF610_PAD_PTC9__ENET_RMII1_MDC          0x30fe
 285                         VF610_PAD_PTC10__ENET_RMII1_MDIO        0x30d3
 286                         VF610_PAD_PTC11__ENET_RMII1_CRS         0x30d1
 287                         VF610_PAD_PTC12__ENET_RMII1_RXD1        0x30d1
 288                         VF610_PAD_PTC13__ENET_RMII1_RXD0        0x30d1
 289                         VF610_PAD_PTC14__ENET_RMII1_RXER        0x30d1
 290                         VF610_PAD_PTC15__ENET_RMII1_TXD1        0x30d2
 291                         VF610_PAD_PTC16__ENET_RMII1_TXD0        0x30d2
 292                         VF610_PAD_PTC17__ENET_RMII1_TXEN        0x30d2
 293                 >;
 294         };
 295
 296         pinctrl_i2c0: i2c0grp {
 297                 fsl,pins = <
 298                         VF610_PAD_PTB14__I2C0_SCL               0x37ff
 299                         VF610_PAD_PTB15__I2C0_SDA               0x37ff
 300                 >;
 301         };
 302
 303         pinctrl_leds_debug: pinctrl-leds-debug {
 304                 fsl,pins = <
 305                         VF610_PAD_PTD3__GPIO_82                 0x31c2
 306                         VF610_PAD_PTE3__GPIO_108                0x31c2
 307                         VF610_PAD_PTE4__GPIO_109                0x31c2
 308                         VF610_PAD_PTE5__GPIO_110                0x31c2
 309                         VF610_PAD_PTE6__GPIO_111                0x31c2
 310                 >;
 311         };
 312
 313         pinctrl_optical: optical-grp {
 314                 fsl,pins = <
 315                 /* SFF SD input */
 316                 VF610_PAD_PTE27__GPIO_132       0x3061
 317
 318                 /* SFF Transmit disable output */
 319                 VF610_PAD_PTE13__GPIO_118       0x3043
 320                 >;
 321         };
 322
 323         pinctrl_switch: switch-grp {
 324                 fsl,pins = <
 325                         VF610_PAD_PTB28__GPIO_98                0x3061
 326                         VF610_PAD_PTE2__GPIO_107                0x1042
 327                 >;
 328         };
 329
 330         pinctrl_uart0: uart0grp {
 331                 fsl,pins = <
 332                         VF610_PAD_PTB10__UART0_TX               0x21a2
 333                         VF610_PAD_PTB11__UART0_RX               0x21a1
 334                 >;
 335         };
 336 };