2 * wm8750.dtsi - Device tree file for Wondermedia WM8750 SoC
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
6 * Licensed under GPLv2 or later
12 compatible = "wm,wm8750";
20 compatible = "arm,arm1176jzf";
25 device_type = "memory";
43 compatible = "simple-bus";
45 interrupt-parent = <&intc0>;
47 intc0: interrupt-controller@d8140000 {
48 compatible = "via,vt8500-intc";
50 reg = <0xd8140000 0x10000>;
51 #interrupt-cells = <1>;
54 /* Secondary IC cascaded to intc0 */
55 intc1: interrupt-controller@d8150000 {
56 compatible = "via,vt8500-intc";
58 #interrupt-cells = <1>;
59 reg = <0xD8150000 0x10000>;
60 interrupts = <56 57 58 59 60 61 62 63>;
63 pinctrl: pinctrl@d8110000 {
64 compatible = "wm,wm8750-pinctrl";
65 reg = <0xd8110000 0x10000>;
67 #interrupt-cells = <2>;
73 compatible = "via,vt8500-pmc";
74 reg = <0xd8130000 0x1000>;
82 compatible = "fixed-clock";
83 clock-frequency = <24000000>;
88 compatible = "fixed-clock";
89 clock-frequency = <25000000>;
94 compatible = "wm,wm8750-pll-clock";
101 compatible = "wm,wm8750-pll-clock";
108 compatible = "wm,wm8750-pll-clock";
115 compatible = "wm,wm8750-pll-clock";
122 compatible = "wm,wm8750-pll-clock";
129 compatible = "via,vt8500-device-clock";
131 divisor-reg = <0x300>;
136 compatible = "via,vt8500-device-clock";
138 divisor-reg = <0x304>;
143 compatible = "via,vt8500-device-clock";
145 divisor-reg = <0x320>;
150 compatible = "via,vt8500-device-clock";
152 divisor-reg = <0x310>;
157 compatible = "via,vt8500-device-clock";
159 enable-reg = <0x254>;
165 compatible = "via,vt8500-device-clock";
167 enable-reg = <0x254>;
173 compatible = "via,vt8500-device-clock";
175 enable-reg = <0x254>;
181 compatible = "via,vt8500-device-clock";
183 enable-reg = <0x254>;
189 compatible = "via,vt8500-device-clock";
191 enable-reg = <0x254>;
197 compatible = "via,vt8500-device-clock";
199 enable-reg = <0x254>;
205 compatible = "via,vt8500-device-clock";
207 divisor-reg = <0x350>;
208 enable-reg = <0x250>;
214 compatible = "via,vt8500-device-clock";
216 divisor-reg = <0x330>;
217 divisor-mask = <0x3f>;
218 enable-reg = <0x250>;
224 compatible = "via,vt8500-device-clock";
226 divisor-reg = <0x3A0>;
227 enable-reg = <0x250>;
233 compatible = "via,vt8500-device-clock";
235 divisor-reg = <0x3A4>;
236 enable-reg = <0x250>;
244 compatible = "via,vt8500-pwm";
245 reg = <0xd8220000 0x100>;
250 compatible = "via,vt8500-timer";
251 reg = <0xd8130100 0x28>;
256 compatible = "via,vt8500-ehci";
257 reg = <0xd8007900 0x200>;
262 compatible = "platform-uhci";
263 reg = <0xd8007b00 0x200>;
268 compatible = "platform-uhci";
269 reg = <0xd8008d00 0x200>;
273 uart0: serial@d8200000 {
274 compatible = "via,vt8500-uart";
275 reg = <0xd8200000 0x1040>;
277 clocks = <&clkuart0>;
281 uart1: serial@d82b0000 {
282 compatible = "via,vt8500-uart";
283 reg = <0xd82b0000 0x1040>;
285 clocks = <&clkuart1>;
289 uart2: serial@d8210000 {
290 compatible = "via,vt8500-uart";
291 reg = <0xd8210000 0x1040>;
293 clocks = <&clkuart2>;
297 uart3: serial@d82c0000 {
298 compatible = "via,vt8500-uart";
299 reg = <0xd82c0000 0x1040>;
301 clocks = <&clkuart3>;
305 uart4: serial@d8370000 {
306 compatible = "via,vt8500-uart";
307 reg = <0xd8370000 0x1040>;
309 clocks = <&clkuart4>;
313 uart5: serial@d8380000 {
314 compatible = "via,vt8500-uart";
315 reg = <0xd8380000 0x1040>;
317 clocks = <&clkuart5>;
322 compatible = "via,vt8500-rtc";
323 reg = <0xd8100000 0x10000>;
328 compatible = "wm,wm8505-sdhc";
329 reg = <0xd800a000 0x1000>;
330 interrupts = <20 21>;
336 i2c_0: i2c@d8280000 {
337 compatible = "wm,wm8505-i2c";
338 reg = <0xd8280000 0x1000>;
341 clock-frequency = <400000>;
344 i2c_1: i2c@d8320000 {
345 compatible = "wm,wm8505-i2c";
346 reg = <0xd8320000 0x1000>;
349 clock-frequency = <400000>;