1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
6 #include <dt-bindings/clock/axg-aoclkc.h>
7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-axg-gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
17 compatible = "amlogic,meson-axg";
19 interrupt-parent = <&gic>;
23 tdmif_a: audio-controller-0 {
24 compatible = "amlogic,axg-tdm-iface";
25 #sound-dai-cells = <0>;
26 sound-name-prefix = "TDM_A";
27 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
28 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
29 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
30 clock-names = "mclk", "sclk", "lrclk";
34 tdmif_b: audio-controller-1 {
35 compatible = "amlogic,axg-tdm-iface";
36 #sound-dai-cells = <0>;
37 sound-name-prefix = "TDM_B";
38 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
39 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
40 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
41 clock-names = "mclk", "sclk", "lrclk";
45 tdmif_c: audio-controller-2 {
46 compatible = "amlogic,axg-tdm-iface";
47 #sound-dai-cells = <0>;
48 sound-name-prefix = "TDM_C";
49 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
50 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
51 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
52 clock-names = "mclk", "sclk", "lrclk";
57 compatible = "arm,cortex-a53-pmu";
58 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
59 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
60 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
61 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
62 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
66 #address-cells = <0x2>;
71 compatible = "arm,cortex-a53";
73 enable-method = "psci";
74 next-level-cache = <&l2>;
75 clocks = <&scpi_dvfs 0>;
80 compatible = "arm,cortex-a53";
82 enable-method = "psci";
83 next-level-cache = <&l2>;
84 clocks = <&scpi_dvfs 0>;
89 compatible = "arm,cortex-a53";
91 enable-method = "psci";
92 next-level-cache = <&l2>;
93 clocks = <&scpi_dvfs 0>;
98 compatible = "arm,cortex-a53";
100 enable-method = "psci";
101 next-level-cache = <&l2>;
102 clocks = <&scpi_dvfs 0>;
106 compatible = "cache";
111 compatible = "amlogic,meson-gxbb-sm";
115 compatible = "amlogic,meson-gxbb-efuse";
116 clocks = <&clkc CLKID_EFUSE>;
117 #address-cells = <1>;
123 compatible = "arm,psci-1.0";
128 #address-cells = <2>;
132 /* 16 MiB reserved for Hardware ROM Firmware */
133 hwrom_reserved: hwrom@0 {
134 reg = <0x0 0x0 0x0 0x1000000>;
138 /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
139 secmon_reserved: secmon@5000000 {
140 reg = <0x0 0x05000000 0x0 0x300000>;
146 compatible = "arm,scpi-pre-1.0";
147 mboxes = <&mailbox 1 &mailbox 2>;
148 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
150 scpi_clocks: clocks {
151 compatible = "arm,scpi-clocks";
153 scpi_dvfs: clock-controller {
154 compatible = "arm,scpi-dvfs-clocks";
157 clock-output-names = "vcpu";
161 scpi_sensors: sensors {
162 compatible = "amlogic,meson-gxbb-scpi-sensors";
163 #thermal-sensor-cells = <1>;
168 compatible = "simple-bus";
169 #address-cells = <2>;
173 ethmac: ethernet@ff3f0000 {
174 compatible = "amlogic,meson-axg-dwmac",
177 reg = <0x0 0xff3f0000 0x0 0x10000
178 0x0 0xff634540 0x0 0x8>;
179 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
180 interrupt-names = "macirq";
181 clocks = <&clkc CLKID_ETH>,
182 <&clkc CLKID_FCLK_DIV2>,
184 clock-names = "stmmaceth", "clkin0", "clkin1";
188 pdm: audio-controller@ff632000 {
189 compatible = "amlogic,axg-pdm";
190 reg = <0x0 0xff632000 0x0 0x34>;
191 #sound-dai-cells = <0>;
192 sound-name-prefix = "PDM";
193 clocks = <&clkc_audio AUD_CLKID_PDM>,
194 <&clkc_audio AUD_CLKID_PDM_DCLK>,
195 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
196 clock-names = "pclk", "dclk", "sysclk";
200 periphs: bus@ff634000 {
201 compatible = "simple-bus";
202 reg = <0x0 0xff634000 0x0 0x2000>;
203 #address-cells = <2>;
205 ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
208 compatible = "amlogic,meson-rng";
209 reg = <0x0 0x18 0x0 0x4>;
210 clocks = <&clkc CLKID_RNG0>;
211 clock-names = "core";
214 pinctrl_periphs: pinctrl@480 {
215 compatible = "amlogic,meson-axg-periphs-pinctrl";
216 #address-cells = <2>;
221 reg = <0x0 0x00480 0x0 0x40>,
222 <0x0 0x004e8 0x0 0x14>,
223 <0x0 0x00520 0x0 0x14>,
224 <0x0 0x00430 0x0 0x3c>;
225 reg-names = "mux", "pull", "pull-enable", "gpio";
228 gpio-ranges = <&pinctrl_periphs 0 0 86>;
240 i2c1_x_pins: i2c1_x {
242 groups = "i2c1_sck_x",
249 i2c1_z_pins: i2c1_z {
251 groups = "i2c1_sck_z",
258 i2c2_a_pins: i2c2_a {
260 groups = "i2c2_sck_a",
267 i2c2_x_pins: i2c2_x {
269 groups = "i2c2_sck_x",
276 i2c3_a6_pins: i2c3_a6 {
278 groups = "i2c3_sda_a6",
285 i2c3_a12_pins: i2c3_a12 {
287 groups = "i2c3_sda_a12",
294 i2c3_a19_pins: i2c3_a19 {
296 groups = "i2c3_sda_a19",
305 groups = "emmc_nand_d0",
325 emmc_ds_pins: emmc_ds {
333 emmc_clk_gate_pins: emmc_clk_gate {
336 function = "gpio_periphs";
341 eth_rgmii_x_pins: eth-x-rgmii {
343 groups = "eth_mdio_x",
345 "eth_rgmii_rx_clk_x",
362 eth_rgmii_y_pins: eth-y-rgmii {
364 groups = "eth_mdio_y",
366 "eth_rgmii_rx_clk_y",
383 eth_rmii_x_pins: eth-x-rmii {
385 groups = "eth_mdio_x",
387 "eth_rgmii_rx_clk_x",
399 eth_rmii_y_pins: eth-y-rmii {
401 groups = "eth_mdio_y",
403 "eth_rgmii_rx_clk_y",
415 mclk_b_pins: mclk_b {
423 mclk_c_pins: mclk_c {
431 pdm_dclk_a14_pins: pdm_dclk_a14 {
433 groups = "pdm_dclk_a14";
439 pdm_dclk_a19_pins: pdm_dclk_a19 {
441 groups = "pdm_dclk_a19";
447 pdm_din0_pins: pdm_din0 {
455 pdm_din1_pins: pdm_din1 {
463 pdm_din2_pins: pdm_din2 {
471 pdm_din3_pins: pdm_din3 {
479 pwm_a_a_pins: pwm_a_a {
487 pwm_a_x18_pins: pwm_a_x18 {
489 groups = "pwm_a_x18";
495 pwm_a_x20_pins: pwm_a_x20 {
497 groups = "pwm_a_x20";
503 pwm_a_z_pins: pwm_a_z {
511 pwm_b_a_pins: pwm_b_a {
519 pwm_b_x_pins: pwm_b_x {
527 pwm_b_z_pins: pwm_b_z {
535 pwm_c_a_pins: pwm_c_a {
543 pwm_c_x10_pins: pwm_c_x10 {
545 groups = "pwm_c_x10";
551 pwm_c_x17_pins: pwm_c_x17 {
553 groups = "pwm_c_x17";
559 pwm_d_x11_pins: pwm_d_x11 {
561 groups = "pwm_d_x11";
567 pwm_d_x16_pins: pwm_d_x16 {
569 groups = "pwm_d_x16";
593 sdio_clk_gate_pins: sdio_clk_gate {
596 function = "gpio_periphs";
601 spdif_in_z_pins: spdif_in_z {
603 groups = "spdif_in_z";
604 function = "spdif_in";
609 spdif_in_a1_pins: spdif_in_a1 {
611 groups = "spdif_in_a1";
612 function = "spdif_in";
617 spdif_in_a7_pins: spdif_in_a7 {
619 groups = "spdif_in_a7";
620 function = "spdif_in";
625 spdif_in_a19_pins: spdif_in_a19 {
627 groups = "spdif_in_a19";
628 function = "spdif_in";
633 spdif_in_a20_pins: spdif_in_a20 {
635 groups = "spdif_in_a20";
636 function = "spdif_in";
641 spdif_out_a1_pins: spdif_out_a1 {
643 groups = "spdif_out_a1";
644 function = "spdif_out";
649 spdif_out_a11_pins: spdif_out_a11 {
651 groups = "spdif_out_a11";
652 function = "spdif_out";
657 spdif_out_a19_pins: spdif_out_a19 {
659 groups = "spdif_out_a19";
660 function = "spdif_out";
665 spdif_out_a20_pins: spdif_out_a20 {
667 groups = "spdif_out_a20";
668 function = "spdif_out";
673 spdif_out_z_pins: spdif_out_z {
675 groups = "spdif_out_z";
676 function = "spdif_out";
683 groups = "spi0_miso",
691 spi0_ss0_pins: spi0_ss0 {
699 spi0_ss1_pins: spi0_ss1 {
707 spi0_ss2_pins: spi0_ss2 {
715 spi1_a_pins: spi1_a {
717 groups = "spi1_miso_a",
725 spi1_ss0_a_pins: spi1_ss0_a {
727 groups = "spi1_ss0_a";
733 spi1_ss1_pins: spi1_ss1 {
741 spi1_x_pins: spi1_x {
743 groups = "spi1_miso_x",
751 spi1_ss0_x_pins: spi1_ss0_x {
753 groups = "spi1_ss0_x";
759 tdma_din0_pins: tdma_din0 {
761 groups = "tdma_din0";
767 tdma_dout0_x14_pins: tdma_dout0_x14 {
769 groups = "tdma_dout0_x14";
775 tdma_dout0_x15_pins: tdma_dout0_x15 {
777 groups = "tdma_dout0_x15";
783 tdma_dout1_pins: tdma_dout1 {
785 groups = "tdma_dout1";
791 tdma_din1_pins: tdma_din1 {
793 groups = "tdma_din1";
799 tdma_fs_pins: tdma_fs {
807 tdma_fs_slv_pins: tdma_fs_slv {
809 groups = "tdma_fs_slv";
815 tdma_sclk_pins: tdma_sclk {
817 groups = "tdma_sclk";
823 tdma_sclk_slv_pins: tdma_sclk_slv {
825 groups = "tdma_sclk_slv";
831 tdmb_din0_pins: tdmb_din0 {
833 groups = "tdmb_din0";
839 tdmb_din1_pins: tdmb_din1 {
841 groups = "tdmb_din1";
847 tdmb_din2_pins: tdmb_din2 {
849 groups = "tdmb_din2";
855 tdmb_din3_pins: tdmb_din3 {
857 groups = "tdmb_din3";
863 tdmb_dout0_pins: tdmb_dout0 {
865 groups = "tdmb_dout0";
871 tdmb_dout1_pins: tdmb_dout1 {
873 groups = "tdmb_dout1";
879 tdmb_dout2_pins: tdmb_dout2 {
881 groups = "tdmb_dout2";
887 tdmb_dout3_pins: tdmb_dout3 {
889 groups = "tdmb_dout3";
895 tdmb_fs_pins: tdmb_fs {
903 tdmb_fs_slv_pins: tdmb_fs_slv {
905 groups = "tdmb_fs_slv";
911 tdmb_sclk_pins: tdmb_sclk {
913 groups = "tdmb_sclk";
919 tdmb_sclk_slv_pins: tdmb_sclk_slv {
921 groups = "tdmb_sclk_slv";
927 tdmc_fs_pins: tdmc_fs {
935 tdmc_fs_slv_pins: tdmc_fs_slv {
937 groups = "tdmc_fs_slv";
943 tdmc_sclk_pins: tdmc_sclk {
945 groups = "tdmc_sclk";
951 tdmc_sclk_slv_pins: tdmc_sclk_slv {
953 groups = "tdmc_sclk_slv";
959 tdmc_din0_pins: tdmc_din0 {
961 groups = "tdmc_din0";
967 tdmc_din1_pins: tdmc_din1 {
969 groups = "tdmc_din1";
975 tdmc_din2_pins: tdmc_din2 {
977 groups = "tdmc_din2";
983 tdmc_din3_pins: tdmc_din3 {
985 groups = "tdmc_din3";
991 tdmc_dout0_pins: tdmc_dout0 {
993 groups = "tdmc_dout0";
999 tdmc_dout1_pins: tdmc_dout1 {
1001 groups = "tdmc_dout1";
1007 tdmc_dout2_pins: tdmc_dout2 {
1009 groups = "tdmc_dout2";
1015 tdmc_dout3_pins: tdmc_dout3 {
1017 groups = "tdmc_dout3";
1023 uart_a_pins: uart_a {
1025 groups = "uart_tx_a",
1027 function = "uart_a";
1032 uart_a_cts_rts_pins: uart_a_cts_rts {
1034 groups = "uart_cts_a",
1036 function = "uart_a";
1041 uart_b_x_pins: uart_b_x {
1043 groups = "uart_tx_b_x",
1045 function = "uart_b";
1050 uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
1052 groups = "uart_cts_b_x",
1054 function = "uart_b";
1059 uart_b_z_pins: uart_b_z {
1061 groups = "uart_tx_b_z",
1063 function = "uart_b";
1068 uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
1070 groups = "uart_cts_b_z",
1072 function = "uart_b";
1077 uart_ao_b_z_pins: uart_ao_b_z {
1079 groups = "uart_ao_tx_b_z",
1081 function = "uart_ao_b_z";
1086 uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
1088 groups = "uart_ao_cts_b_z",
1090 function = "uart_ao_b_z";
1097 hiubus: bus@ff63c000 {
1098 compatible = "simple-bus";
1099 reg = <0x0 0xff63c000 0x0 0x1c00>;
1100 #address-cells = <2>;
1102 ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
1104 sysctrl: system-controller@0 {
1105 compatible = "amlogic,meson-axg-hhi-sysctrl",
1106 "simple-mfd", "syscon";
1107 reg = <0 0 0 0x400>;
1109 clkc: clock-controller {
1110 compatible = "amlogic,axg-clkc";
1113 clock-names = "xtal";
1118 mailbox: mailbox@ff63c404 {
1119 compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
1120 reg = <0 0xff63c404 0 0x4c>;
1121 interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
1122 <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
1123 <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
1127 audio: bus@ff642000 {
1128 compatible = "simple-bus";
1129 reg = <0x0 0xff642000 0x0 0x2000>;
1130 #address-cells = <2>;
1132 ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>;
1134 clkc_audio: clock-controller@0 {
1135 compatible = "amlogic,axg-audio-clkc";
1136 reg = <0x0 0x0 0x0 0xb4>;
1139 clocks = <&clkc CLKID_AUDIO>,
1140 <&clkc CLKID_MPLL0>,
1141 <&clkc CLKID_MPLL1>,
1142 <&clkc CLKID_MPLL2>,
1143 <&clkc CLKID_MPLL3>,
1144 <&clkc CLKID_HIFI_PLL>,
1145 <&clkc CLKID_FCLK_DIV3>,
1146 <&clkc CLKID_FCLK_DIV4>,
1147 <&clkc CLKID_GP0_PLL>;
1148 clock-names = "pclk",
1158 resets = <&reset RESET_AUDIO>;
1161 toddr_a: audio-controller@100 {
1162 compatible = "amlogic,axg-toddr";
1163 reg = <0x0 0x100 0x0 0x1c>;
1164 #sound-dai-cells = <0>;
1165 sound-name-prefix = "TODDR_A";
1166 interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>;
1167 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
1168 resets = <&arb AXG_ARB_TODDR_A>;
1169 status = "disabled";
1172 toddr_b: audio-controller@140 {
1173 compatible = "amlogic,axg-toddr";
1174 reg = <0x0 0x140 0x0 0x1c>;
1175 #sound-dai-cells = <0>;
1176 sound-name-prefix = "TODDR_B";
1177 interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>;
1178 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
1179 resets = <&arb AXG_ARB_TODDR_B>;
1180 status = "disabled";
1183 toddr_c: audio-controller@180 {
1184 compatible = "amlogic,axg-toddr";
1185 reg = <0x0 0x180 0x0 0x1c>;
1186 #sound-dai-cells = <0>;
1187 sound-name-prefix = "TODDR_C";
1188 interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>;
1189 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
1190 resets = <&arb AXG_ARB_TODDR_C>;
1191 status = "disabled";
1194 frddr_a: audio-controller@1c0 {
1195 compatible = "amlogic,axg-frddr";
1196 reg = <0x0 0x1c0 0x0 0x1c>;
1197 #sound-dai-cells = <0>;
1198 sound-name-prefix = "FRDDR_A";
1199 interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
1200 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
1201 resets = <&arb AXG_ARB_FRDDR_A>;
1202 status = "disabled";
1205 frddr_b: audio-controller@200 {
1206 compatible = "amlogic,axg-frddr";
1207 reg = <0x0 0x200 0x0 0x1c>;
1208 #sound-dai-cells = <0>;
1209 sound-name-prefix = "FRDDR_B";
1210 interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
1211 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
1212 resets = <&arb AXG_ARB_FRDDR_B>;
1213 status = "disabled";
1216 frddr_c: audio-controller@240 {
1217 compatible = "amlogic,axg-frddr";
1218 reg = <0x0 0x240 0x0 0x1c>;
1219 #sound-dai-cells = <0>;
1220 sound-name-prefix = "FRDDR_C";
1221 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
1222 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
1223 resets = <&arb AXG_ARB_FRDDR_C>;
1224 status = "disabled";
1227 arb: reset-controller@280 {
1228 compatible = "amlogic,meson-axg-audio-arb";
1229 reg = <0x0 0x280 0x0 0x4>;
1231 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
1234 tdmin_a: audio-controller@300 {
1235 compatible = "amlogic,axg-tdmin";
1236 reg = <0x0 0x300 0x0 0x40>;
1237 sound-name-prefix = "TDMIN_A";
1238 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
1239 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
1240 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
1241 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
1242 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
1243 clock-names = "pclk", "sclk", "sclk_sel",
1244 "lrclk", "lrclk_sel";
1245 status = "disabled";
1248 tdmin_b: audio-controller@340 {
1249 compatible = "amlogic,axg-tdmin";
1250 reg = <0x0 0x340 0x0 0x40>;
1251 sound-name-prefix = "TDMIN_B";
1252 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
1253 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
1254 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
1255 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
1256 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
1257 clock-names = "pclk", "sclk", "sclk_sel",
1258 "lrclk", "lrclk_sel";
1259 status = "disabled";
1262 tdmin_c: audio-controller@380 {
1263 compatible = "amlogic,axg-tdmin";
1264 reg = <0x0 0x380 0x0 0x40>;
1265 sound-name-prefix = "TDMIN_C";
1266 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
1267 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
1268 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
1269 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
1270 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
1271 clock-names = "pclk", "sclk", "sclk_sel",
1272 "lrclk", "lrclk_sel";
1273 status = "disabled";
1276 tdmin_lb: audio-controller@3c0 {
1277 compatible = "amlogic,axg-tdmin";
1278 reg = <0x0 0x3c0 0x0 0x40>;
1279 sound-name-prefix = "TDMIN_LB";
1280 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
1281 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
1282 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
1283 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
1284 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
1285 clock-names = "pclk", "sclk", "sclk_sel",
1286 "lrclk", "lrclk_sel";
1287 status = "disabled";
1290 spdifin: audio-controller@400 {
1291 compatible = "amlogic,axg-spdifin";
1292 reg = <0x0 0x400 0x0 0x30>;
1293 #sound-dai-cells = <0>;
1294 sound-name-prefix = "SPDIFIN";
1295 interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
1296 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
1297 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
1298 clock-names = "pclk", "refclk";
1299 status = "disabled";
1302 spdifout: audio-controller@480 {
1303 compatible = "amlogic,axg-spdifout";
1304 reg = <0x0 0x480 0x0 0x50>;
1305 #sound-dai-cells = <0>;
1306 sound-name-prefix = "SPDIFOUT";
1307 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
1308 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
1309 clock-names = "pclk", "mclk";
1310 status = "disabled";
1313 tdmout_a: audio-controller@500 {
1314 compatible = "amlogic,axg-tdmout";
1315 reg = <0x0 0x500 0x0 0x40>;
1316 sound-name-prefix = "TDMOUT_A";
1317 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
1318 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
1319 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
1320 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
1321 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
1322 clock-names = "pclk", "sclk", "sclk_sel",
1323 "lrclk", "lrclk_sel";
1324 status = "disabled";
1327 tdmout_b: audio-controller@540 {
1328 compatible = "amlogic,axg-tdmout";
1329 reg = <0x0 0x540 0x0 0x40>;
1330 sound-name-prefix = "TDMOUT_B";
1331 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
1332 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
1333 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
1334 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
1335 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
1336 clock-names = "pclk", "sclk", "sclk_sel",
1337 "lrclk", "lrclk_sel";
1338 status = "disabled";
1341 tdmout_c: audio-controller@580 {
1342 compatible = "amlogic,axg-tdmout";
1343 reg = <0x0 0x580 0x0 0x40>;
1344 sound-name-prefix = "TDMOUT_C";
1345 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
1346 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
1347 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
1348 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
1349 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
1350 clock-names = "pclk", "sclk", "sclk_sel",
1351 "lrclk", "lrclk_sel";
1352 status = "disabled";
1356 aobus: bus@ff800000 {
1357 compatible = "simple-bus";
1358 reg = <0x0 0xff800000 0x0 0x100000>;
1359 #address-cells = <2>;
1361 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1363 sysctrl_AO: sys-ctrl@0 {
1364 compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon";
1365 reg = <0x0 0x0 0x0 0x100>;
1367 clkc_AO: clock-controller {
1368 compatible = "amlogic,meson-axg-aoclkc";
1371 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1372 clock-names = "xtal", "mpeg-clk";
1376 pinctrl_aobus: pinctrl@14 {
1377 compatible = "amlogic,meson-axg-aobus-pinctrl";
1378 #address-cells = <2>;
1383 reg = <0x0 0x00014 0x0 0x8>,
1384 <0x0 0x0002c 0x0 0x4>,
1385 <0x0 0x00024 0x0 0x8>;
1386 reg-names = "mux", "pull", "gpio";
1389 gpio-ranges = <&pinctrl_aobus 0 0 15>;
1392 i2c_ao_sck_4_pins: i2c_ao_sck_4 {
1394 groups = "i2c_ao_sck_4";
1395 function = "i2c_ao";
1400 i2c_ao_sck_8_pins: i2c_ao_sck_8 {
1402 groups = "i2c_ao_sck_8";
1403 function = "i2c_ao";
1408 i2c_ao_sck_10_pins: i2c_ao_sck_10 {
1410 groups = "i2c_ao_sck_10";
1411 function = "i2c_ao";
1416 i2c_ao_sda_5_pins: i2c_ao_sda_5 {
1418 groups = "i2c_ao_sda_5";
1419 function = "i2c_ao";
1424 i2c_ao_sda_9_pins: i2c_ao_sda_9 {
1426 groups = "i2c_ao_sda_9";
1427 function = "i2c_ao";
1432 i2c_ao_sda_11_pins: i2c_ao_sda_11 {
1434 groups = "i2c_ao_sda_11";
1435 function = "i2c_ao";
1440 remote_input_ao_pins: remote_input_ao {
1442 groups = "remote_input_ao";
1443 function = "remote_input_ao";
1448 uart_ao_a_pins: uart_ao_a {
1450 groups = "uart_ao_tx_a",
1452 function = "uart_ao_a";
1457 uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
1459 groups = "uart_ao_cts_a",
1461 function = "uart_ao_a";
1466 uart_ao_b_pins: uart_ao_b {
1468 groups = "uart_ao_tx_b",
1470 function = "uart_ao_b";
1475 uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
1477 groups = "uart_ao_cts_b",
1479 function = "uart_ao_b";
1485 sec_AO: ao-secure@140 {
1486 compatible = "amlogic,meson-gx-ao-secure", "syscon";
1487 reg = <0x0 0x140 0x0 0x140>;
1488 amlogic,has-chip-id;
1491 pwm_AO_cd: pwm@2000 {
1492 compatible = "amlogic,meson-axg-ao-pwm";
1493 reg = <0x0 0x02000 0x0 0x20>;
1495 status = "disabled";
1498 uart_AO: serial@3000 {
1499 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
1500 reg = <0x0 0x3000 0x0 0x18>;
1501 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
1502 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
1503 clock-names = "xtal", "pclk", "baud";
1504 status = "disabled";
1507 uart_AO_B: serial@4000 {
1508 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
1509 reg = <0x0 0x4000 0x0 0x18>;
1510 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
1511 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
1512 clock-names = "xtal", "pclk", "baud";
1513 status = "disabled";
1517 compatible = "amlogic,meson-axg-i2c";
1518 reg = <0x0 0x05000 0x0 0x20>;
1519 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
1520 clocks = <&clkc CLKID_AO_I2C>;
1521 #address-cells = <1>;
1523 status = "disabled";
1526 pwm_AO_ab: pwm@7000 {
1527 compatible = "amlogic,meson-axg-ao-pwm";
1528 reg = <0x0 0x07000 0x0 0x20>;
1530 status = "disabled";
1534 compatible = "amlogic,meson-gxbb-ir";
1535 reg = <0x0 0x8000 0x0 0x20>;
1536 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
1537 status = "disabled";
1541 compatible = "amlogic,meson-axg-saradc",
1542 "amlogic,meson-saradc";
1543 reg = <0x0 0x9000 0x0 0x38>;
1544 #io-channel-cells = <1>;
1545 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
1547 <&clkc_AO CLKID_AO_SAR_ADC>,
1548 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
1549 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
1550 clock-names = "clkin", "core", "adc_clk", "adc_sel";
1551 status = "disabled";
1555 gic: interrupt-controller@ffc01000 {
1556 compatible = "arm,gic-400";
1557 reg = <0x0 0xffc01000 0 0x1000>,
1558 <0x0 0xffc02000 0 0x2000>,
1559 <0x0 0xffc04000 0 0x2000>,
1560 <0x0 0xffc06000 0 0x2000>;
1561 interrupt-controller;
1562 interrupts = <GIC_PPI 9
1563 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1564 #interrupt-cells = <3>;
1565 #address-cells = <0>;
1568 cbus: bus@ffd00000 {
1569 compatible = "simple-bus";
1570 reg = <0x0 0xffd00000 0x0 0x25000>;
1571 #address-cells = <2>;
1573 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
1575 reset: reset-controller@1004 {
1576 compatible = "amlogic,meson-axg-reset";
1577 reg = <0x0 0x01004 0x0 0x9c>;
1581 gpio_intc: interrupt-controller@f080 {
1582 compatible = "amlogic,meson-axg-gpio-intc",
1583 "amlogic,meson-gpio-intc";
1584 reg = <0x0 0xf080 0x0 0x10>;
1585 interrupt-controller;
1586 #interrupt-cells = <2>;
1587 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
1591 compatible = "amlogic,meson-gxbb-wdt";
1592 reg = <0x0 0xf0d0 0x0 0x10>;
1597 compatible = "amlogic,meson-axg-ee-pwm";
1598 reg = <0x0 0x1b000 0x0 0x20>;
1600 status = "disabled";
1604 compatible = "amlogic,meson-axg-ee-pwm";
1605 reg = <0x0 0x1a000 0x0 0x20>;
1607 status = "disabled";
1611 compatible = "amlogic,meson-axg-spicc";
1612 reg = <0x0 0x13000 0x0 0x3c>;
1613 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
1614 clocks = <&clkc CLKID_SPICC0>;
1615 clock-names = "core";
1616 #address-cells = <1>;
1618 status = "disabled";
1622 compatible = "amlogic,meson-axg-spicc";
1623 reg = <0x0 0x15000 0x0 0x3c>;
1624 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
1625 clocks = <&clkc CLKID_SPICC1>;
1626 clock-names = "core";
1627 #address-cells = <1>;
1629 status = "disabled";
1632 clk_msr: clock-measure@18000 {
1633 compatible = "amlogic,meson-axg-clk-measure";
1634 reg = <0x0 0x18000 0x0 0x10>;
1638 compatible = "amlogic,meson-axg-i2c";
1639 reg = <0x0 0x1c000 0x0 0x20>;
1640 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
1641 clocks = <&clkc CLKID_I2C>;
1642 #address-cells = <1>;
1644 status = "disabled";
1648 compatible = "amlogic,meson-axg-i2c";
1649 reg = <0x0 0x1d000 0x0 0x20>;
1650 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
1651 clocks = <&clkc CLKID_I2C>;
1652 #address-cells = <1>;
1654 status = "disabled";
1658 compatible = "amlogic,meson-axg-i2c";
1659 reg = <0x0 0x1e000 0x0 0x20>;
1660 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
1661 clocks = <&clkc CLKID_I2C>;
1662 #address-cells = <1>;
1664 status = "disabled";
1668 compatible = "amlogic,meson-axg-i2c";
1669 reg = <0x0 0x1f000 0x0 0x20>;
1670 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
1671 clocks = <&clkc CLKID_I2C>;
1672 #address-cells = <1>;
1674 status = "disabled";
1677 uart_B: serial@23000 {
1678 compatible = "amlogic,meson-gx-uart";
1679 reg = <0x0 0x23000 0x0 0x18>;
1680 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
1681 status = "disabled";
1682 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
1683 clock-names = "xtal", "pclk", "baud";
1686 uart_A: serial@24000 {
1687 compatible = "amlogic,meson-gx-uart";
1688 reg = <0x0 0x24000 0x0 0x18>;
1689 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
1690 status = "disabled";
1691 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
1692 clock-names = "xtal", "pclk", "baud";
1697 compatible = "simple-bus";
1698 reg = <0x0 0xffe00000 0x0 0x200000>;
1699 #address-cells = <2>;
1701 ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
1703 sd_emmc_b: sd@5000 {
1704 compatible = "amlogic,meson-axg-mmc";
1705 reg = <0x0 0x5000 0x0 0x800>;
1706 interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
1707 status = "disabled";
1708 clocks = <&clkc CLKID_SD_EMMC_B>,
1709 <&clkc CLKID_SD_EMMC_B_CLK0>,
1710 <&clkc CLKID_FCLK_DIV2>;
1711 clock-names = "core", "clkin0", "clkin1";
1712 resets = <&reset RESET_SD_EMMC_B>;
1715 sd_emmc_c: mmc@7000 {
1716 compatible = "amlogic,meson-axg-mmc";
1717 reg = <0x0 0x7000 0x0 0x800>;
1718 interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
1719 status = "disabled";
1720 clocks = <&clkc CLKID_SD_EMMC_C>,
1721 <&clkc CLKID_SD_EMMC_C_CLK0>,
1722 <&clkc CLKID_FCLK_DIV2>;
1723 clock-names = "core", "clkin0", "clkin1";
1724 resets = <&reset RESET_SD_EMMC_C>;
1728 sram: sram@fffc0000 {
1729 compatible = "amlogic,meson-axg-sram", "mmio-sram";
1730 reg = <0x0 0xfffc0000 0x0 0x20000>;
1731 #address-cells = <1>;
1733 ranges = <0 0x0 0xfffc0000 0x20000>;
1735 cpu_scp_lpri: scp-shmem@13000 {
1736 compatible = "amlogic,meson-axg-scp-shmem";
1737 reg = <0x13000 0x400>;
1740 cpu_scp_hpri: scp-shmem@13400 {
1741 compatible = "amlogic,meson-axg-scp-shmem";
1742 reg = <0x13400 0x400>;
1748 compatible = "arm,armv8-timer";
1749 interrupts = <GIC_PPI 13
1750 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
1752 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
1754 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
1756 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
1760 compatible = "fixed-clock";
1761 clock-frequency = <24000000>;
1762 clock-output-names = "xtal";