sys/gnu/dts/arm64/amlogic/meson-g12a.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
   4  */
   5
   6 #include "meson-g12-common.dtsi"
   7 #include <dt-bindings/power/meson-g12a-power.h>
   8
   9 / {
  10         compatible = "amlogic,g12a";
  11
  12         cpus {
  13                 #address-cells = <0x2>;
  14                 #size-cells = <0x0>;
  15
  16                 cpu0: cpu@0 {
  17                         device_type = "cpu";
  18                         compatible = "arm,cortex-a53";
  19                         reg = <0x0 0x0>;
  20                         enable-method = "psci";
  21                         next-level-cache = <&l2>;
  22                 };
  23
  24                 cpu1: cpu@1 {
  25                         device_type = "cpu";
  26                         compatible = "arm,cortex-a53";
  27                         reg = <0x0 0x1>;
  28                         enable-method = "psci";
  29                         next-level-cache = <&l2>;
  30                 };
  31
  32                 cpu2: cpu@2 {
  33                         device_type = "cpu";
  34                         compatible = "arm,cortex-a53";
  35                         reg = <0x0 0x2>;
  36                         enable-method = "psci";
  37                         next-level-cache = <&l2>;
  38                 };
  39
  40                 cpu3: cpu@3 {
  41                         device_type = "cpu";
  42                         compatible = "arm,cortex-a53";
  43                         reg = <0x0 0x3>;
  44                         enable-method = "psci";
  45                         next-level-cache = <&l2>;
  46                 };
  47
  48                 l2: l2-cache0 {
  49                         compatible = "cache";
  50                 };
  51         };
  52
  53         cpu_opp_table: opp-table {
  54                 compatible = "operating-points-v2";
  55                 opp-shared;
  56
  57                 opp-100000000 {
  58                         opp-hz = /bits/ 64 <100000000>;
  59                         opp-microvolt = <731000>;
  60                 };
  61
  62                 opp-250000000 {
  63                         opp-hz = /bits/ 64 <250000000>;
  64                         opp-microvolt = <731000>;
  65                 };
  66
  67                 opp-500000000 {
  68                         opp-hz = /bits/ 64 <500000000>;
  69                         opp-microvolt = <731000>;
  70                 };
  71
  72                 opp-667000000 {
  73                         opp-hz = /bits/ 64 <666666666>;
  74                         opp-microvolt = <731000>;
  75                 };
  76
  77                 opp-1000000000 {
  78                         opp-hz = /bits/ 64 <1000000000>;
  79                         opp-microvolt = <731000>;
  80                 };
  81
  82                 opp-1200000000 {
  83                         opp-hz = /bits/ 64 <1200000000>;
  84                         opp-microvolt = <731000>;
  85                 };
  86
  87                 opp-1398000000 {
  88                         opp-hz = /bits/ 64 <1398000000>;
  89                         opp-microvolt = <761000>;
  90                 };
  91
  92                 opp-1512000000 {
  93                         opp-hz = /bits/ 64 <1512000000>;
  94                         opp-microvolt = <791000>;
  95                 };
  96
  97                 opp-1608000000 {
  98                         opp-hz = /bits/ 64 <1608000000>;
  99                         opp-microvolt = <831000>;
 100                 };
 101
 102                 opp-1704000000 {
 103                         opp-hz = /bits/ 64 <1704000000>;
 104                         opp-microvolt = <861000>;
 105                 };
 106
 107                 opp-1800000000 {
 108                         opp-hz = /bits/ 64 <1800000000>;
 109                         opp-microvolt = <981000>;
 110                 };
 111         };
 112 };
 113
 114 &ethmac {
 115         power-domains = <&pwrc PWRC_G12A_ETH_ID>;
 116 };
 117
 118 &vpu {
 119         power-domains = <&pwrc PWRC_G12A_VPU_ID>;
 120 };
 121
 122 &sd_emmc_a {
 123         amlogic,dram-access-quirk;
 124 };