sys/gnu/dts/arm64/amlogic/meson-g12b.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2019 BayLibre, SAS
   4  * Author: Neil Armstrong <narmstrong@baylibre.com>
   5  */
   6
   7 #include "meson-g12-common.dtsi"
   8 #include <dt-bindings/power/meson-g12a-power.h>
   9
  10 / {
  11         compatible = "amlogic,g12b";
  12
  13         cpus {
  14                 #address-cells = <0x2>;
  15                 #size-cells = <0x0>;
  16
  17                 cpu-map {
  18                         cluster0 {
  19                                 core0 {
  20                                         cpu = <&cpu0>;
  21                                 };
  22
  23                                 core1 {
  24                                         cpu = <&cpu1>;
  25                                 };
  26                         };
  27
  28                         cluster1 {
  29                                 core0 {
  30                                         cpu = <&cpu100>;
  31                                 };
  32
  33                                 core1 {
  34                                         cpu = <&cpu101>;
  35                                 };
  36
  37                                 core2 {
  38                                         cpu = <&cpu102>;
  39                                 };
  40
  41                                 core3 {
  42                                         cpu = <&cpu103>;
  43                                 };
  44                         };
  45                 };
  46
  47                 cpu0: cpu@0 {
  48                         device_type = "cpu";
  49                         compatible = "arm,cortex-a53";
  50                         reg = <0x0 0x0>;
  51                         enable-method = "psci";
  52                         next-level-cache = <&l2>;
  53                 };
  54
  55                 cpu1: cpu@1 {
  56                         device_type = "cpu";
  57                         compatible = "arm,cortex-a53";
  58                         reg = <0x0 0x1>;
  59                         enable-method = "psci";
  60                         next-level-cache = <&l2>;
  61                 };
  62
  63                 cpu100: cpu@100 {
  64                         device_type = "cpu";
  65                         compatible = "arm,cortex-a73";
  66                         reg = <0x0 0x100>;
  67                         enable-method = "psci";
  68                         next-level-cache = <&l2>;
  69                 };
  70
  71                 cpu101: cpu@101 {
  72                         device_type = "cpu";
  73                         compatible = "arm,cortex-a73";
  74                         reg = <0x0 0x101>;
  75                         enable-method = "psci";
  76                         next-level-cache = <&l2>;
  77                 };
  78
  79                 cpu102: cpu@102 {
  80                         device_type = "cpu";
  81                         compatible = "arm,cortex-a73";
  82                         reg = <0x0 0x102>;
  83                         enable-method = "psci";
  84                         next-level-cache = <&l2>;
  85                 };
  86
  87                 cpu103: cpu@103 {
  88                         device_type = "cpu";
  89                         compatible = "arm,cortex-a73";
  90                         reg = <0x0 0x103>;
  91                         enable-method = "psci";
  92                         next-level-cache = <&l2>;
  93                 };
  94
  95                 l2: l2-cache0 {
  96                         compatible = "cache";
  97                 };
  98         };
  99 };
 100
 101 &clkc {
 102         compatible = "amlogic,g12b-clkc";
 103 };
 104
 105 &ethmac {
 106         power-domains = <&pwrc PWRC_G12A_ETH_ID>;
 107 };
 108
 109 &vpu {
 110         power-domains = <&pwrc PWRC_G12A_VPU_ID>;
 111 };
 112
 113 &sd_emmc_a {
 114         amlogic,dram-access-quirk;
 115 };