1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016 Andreas Färber
4 * Copyright (c) 2016 BayLibre, Inc.
5 * Author: Kevin Hilman <khilman@kernel.org>
8 #include "meson-gxbb.dtsi"
17 stdout-path = "serial0:115200n8";
21 device_type = "memory";
22 reg = <0x0 0x0 0x0 0x40000000>;
26 compatible = "gpio-leds";
29 label = "wetek-play:system-status";
30 gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
36 usb_pwr: regulator-usb-pwrs {
37 compatible = "regulator-fixed";
39 regulator-name = "USB_PWR";
41 regulator-min-microvolt = <5000000>;
42 regulator-max-microvolt = <5000000>;
44 gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
48 vddio_boot: regulator-vddio_boot {
49 compatible = "regulator-fixed";
50 regulator-name = "VDDIO_BOOT";
51 regulator-min-microvolt = <1800000>;
52 regulator-max-microvolt = <1800000>;
55 vddao_3v3: regulator-vddao_3v3 {
56 compatible = "regulator-fixed";
57 regulator-name = "VDDAO_3V3";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
62 vcc_3v3: regulator-vcc_3v3 {
63 compatible = "regulator-fixed";
64 regulator-name = "VCC_3V3";
65 regulator-min-microvolt = <3300000>;
66 regulator-max-microvolt = <3300000>;
69 emmc_pwrseq: emmc-pwrseq {
70 compatible = "mmc-pwrseq-emmc";
71 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
75 compatible = "pwm-clock";
77 clock-frequency = <32768>;
78 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
81 sdio_pwrseq: sdio-pwrseq {
82 compatible = "mmc-pwrseq-simple";
83 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
85 clock-names = "ext_clock";
89 compatible = "composite-video-connector";
92 cvbs_connector_in: endpoint {
93 remote-endpoint = <&cvbs_vdac_out>;
99 compatible = "hdmi-connector";
103 hdmi_connector_in: endpoint {
104 remote-endpoint = <&hdmi_tx_tmds_out>;
112 pinctrl-0 = <&ao_cec_pins>;
113 pinctrl-names = "default";
114 hdmi-phandle = <&hdmi_tx>;
118 cvbs_vdac_out: endpoint {
119 remote-endpoint = <&cvbs_connector_in>;
125 pinctrl-0 = <ð_rgmii_pins>;
126 pinctrl-names = "default";
128 phy-handle = <ð_phy0>;
131 amlogic,tx-delay-ns = <2>;
133 snps,reset-gpio = <&gpio GPIOZ_14 0>;
134 snps,reset-delays-us = <0 10000 1000000>;
135 snps,reset-active-low;
138 compatible = "snps,dwmac-mdio";
139 #address-cells = <1>;
142 eth_phy0: ethernet-phy@0 {
143 /* Realtek RTL8211F (0x001cc916) */
151 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
152 pinctrl-names = "default";
156 hdmi_tx_tmds_out: endpoint {
157 remote-endpoint = <&hdmi_connector_in>;
163 pinctrl-0 = <&remote_input_ao_pins>;
164 pinctrl-names = "default";
169 pinctrl-0 = <&pwm_e_pins>;
170 pinctrl-names = "default";
171 clocks = <&clkc CLKID_FCLK_DIV4>;
172 clock-names = "clkin0";
175 /* Wireless SDIO Module */
178 pinctrl-0 = <&sdio_pins>;
179 pinctrl-1 = <&sdio_clk_gate_pins>;
180 pinctrl-names = "default", "clk-gate";
181 #address-cells = <1>;
186 max-frequency = <100000000>;
191 mmc-pwrseq = <&sdio_pwrseq>;
193 vmmc-supply = <&vddao_3v3>;
194 vqmmc-supply = <&vddio_boot>;
198 compatible = "brcm,bcm4329-fmac";
205 pinctrl-0 = <&sdcard_pins>;
206 pinctrl-1 = <&sdcard_clk_gate_pins>;
207 pinctrl-names = "default", "clk-gate";
211 max-frequency = <100000000>;
214 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
216 vmmc-supply = <&vddao_3v3>;
217 vqmmc-supply = <&vcc_3v3>;
223 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
224 pinctrl-1 = <&emmc_clk_gate_pins>;
225 pinctrl-names = "default", "clk-gate";
229 max-frequency = <200000000>;
235 mmc-pwrseq = <&emmc_pwrseq>;
236 vmmc-supply = <&vcc_3v3>;
237 vqmmc-supply = <&vddio_boot>;
240 /* This UART is brought out to the DB9 connector */
243 pinctrl-0 = <&uart_ao_a_pins>;
244 pinctrl-names = "default";
249 phy-supply = <&usb_pwr>;