1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
5 * Copyright 2016 Freescale Semiconductor, Inc.
7 * Mingkai Hu <mingkai.hu@nxp.com>
12 #include "fsl-ls1046a.dtsi"
15 model = "LS1046A RDB Board";
16 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
26 stdout-path = "serial0:115200n8";
50 compatible = "ti,ina220";
52 shunt-resistor = <1000>;
56 compatible = "adi,adt7461";
61 compatible = "atmel,24c512";
66 compatible = "atmel,24c512";
75 compatible = "nxp,pcf2129";
83 /* NAND Flashe and CPLD on board */
84 ranges = <0x0 0x0 0x0 0x7e800000 0x00010000
85 0x2 0x0 0x0 0x7fb00000 0x00000100>;
89 compatible = "fsl,ifc-nand";
92 reg = <0x0 0x0 0x10000>;
95 cpld: board-control@2,0 {
96 compatible = "fsl,ls1046ardb-cpld";
97 reg = <0x2 0x0 0x0000100>;
106 qflash0: s25fs512s@0 {
107 compatible = "spansion,m25p80";
108 #address-cells = <1>;
110 spi-max-frequency = <20000000>;
114 qflash1: s25fs512s@1 {
115 compatible = "spansion,m25p80";
116 #address-cells = <1>;
118 spi-max-frequency = <20000000>;
123 #include "fsl-ls1046-post.dtsi"
127 phy-handle = <&rgmii_phy1>;
128 phy-connection-type = "rgmii";
132 phy-handle = <&rgmii_phy2>;
133 phy-connection-type = "rgmii";
137 phy-handle = <&sgmii_phy1>;
138 phy-connection-type = "sgmii";
142 phy-handle = <&sgmii_phy2>;
143 phy-connection-type = "sgmii";
146 ethernet@f0000 { /* 10GEC1 */
147 phy-handle = <&aqr106_phy>;
148 phy-connection-type = "xgmii";
151 ethernet@f2000 { /* 10GEC2 */
152 fixed-link = <0 1 1000 0 0>;
153 phy-connection-type = "xgmii";
157 rgmii_phy1: ethernet-phy@1 {
161 rgmii_phy2: ethernet-phy@2 {
165 sgmii_phy1: ethernet-phy@3 {
169 sgmii_phy2: ethernet-phy@4 {
175 aqr106_phy: ethernet-phy@0 {
176 compatible = "ethernet-phy-ieee802.3-c45";
177 interrupts = <0 131 4>;