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Update libdialog to 1.3-20180621
[FreeBSD/FreeBSD.git] / sys / gnu / dts / arm64 / marvell / armada-3720-espressobin.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Device Tree file for Globalscale Marvell ESPRESSOBin Board
4  * Copyright (C) 2016 Marvell
5  *
6  * Romain Perier <romain.perier@free-electrons.com>
7  *
8  */
9 /*
10  * Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf
11  */
12
13 /dts-v1/;
14
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-372x.dtsi"
17
18 / {
19         model = "Globalscale Marvell ESPRESSOBin Board";
20         compatible = "globalscale,espressobin", "marvell,armada3720", "marvell,armada3710";
21
22         chosen {
23                 stdout-path = "serial0:115200n8";
24         };
25
26         memory@0 {
27                 device_type = "memory";
28                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
29         };
30
31         vcc_sd_reg1: regulator {
32                 compatible = "regulator-gpio";
33                 regulator-name = "vcc_sd1";
34                 regulator-min-microvolt = <1800000>;
35                 regulator-max-microvolt = <3300000>;
36                 regulator-boot-on;
37
38                 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
39                 gpios-states = <0>;
40                 states = <1800000 0x1
41                           3300000 0x0>;
42                 enable-active-high;
43         };
44 };
45
46 /* J9 */
47 &pcie0 {
48         status = "okay";
49 };
50
51 /* J6 */
52 &sata {
53         status = "okay";
54 };
55
56 /* J1 */
57 &sdhci1 {
58         wp-inverted;
59         bus-width = <4>;
60         cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
61         marvell,pad-type = "sd";
62         vqmmc-supply = <&vcc_sd_reg1>;
63         status = "okay";
64 };
65
66 &spi0 {
67         status = "okay";
68
69         flash@0 {
70                 reg = <0>;
71                 compatible = "winbond,w25q32dw", "jedec,spi-flash";
72                 spi-max-frequency = <104000000>;
73                 m25p,fast-read;
74
75                 partitions {
76                         compatible = "fixed-partitions";
77                         #address-cells = <1>;
78                         #size-cells = <1>;
79
80                         partition@0 {
81                                 label = "uboot";
82                                 reg = <0 0x180000>;
83                         };
84
85                         partition@180000 {
86                                 label = "ubootenv";
87                                 reg = <0x180000 0x10000>;
88                         };
89                 };
90         };
91 };
92
93 /* Exported on the micro USB connector J5 through an FTDI */
94 &uart0 {
95         pinctrl-names = "default";
96         pinctrl-0 = <&uart1_pins>;
97         status = "okay";
98 };
99
100 /*
101  * Connector J17 and J18 expose a number of different features. Some pins are
102  * multiplexed. This is the case for instance for the following features:
103  * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
104  *   how to enable it. Beware that the signals are 1.8V TTL.
105  * - I2C
106  * - SPI
107  * - MMC
108  */
109
110 /* J7 */
111 &usb3 {
112         status = "okay";
113 };
114
115 /* J8 */
116 &usb2 {
117         status = "okay";
118 };
119
120 &mdio {
121         switch0: switch0@1 {
122                 compatible = "marvell,mv88e6085";
123                 #address-cells = <1>;
124                 #size-cells = <0>;
125                 reg = <1>;
126
127                 dsa,member = <0 0>;
128
129                 ports {
130                         #address-cells = <1>;
131                         #size-cells = <0>;
132
133                         port@0 {
134                                 reg = <0>;
135                                 label = "cpu";
136                                 ethernet = <&eth0>;
137                         };
138
139                         port@1 {
140                                 reg = <1>;
141                                 label = "wan";
142                                 phy-handle = <&switch0phy0>;
143                         };
144
145                         port@2 {
146                                 reg = <2>;
147                                 label = "lan0";
148                                 phy-handle = <&switch0phy1>;
149                         };
150
151                         port@3 {
152                                 reg = <3>;
153                                 label = "lan1";
154                                 phy-handle = <&switch0phy2>;
155                         };
156
157                 };
158
159                 mdio {
160                         #address-cells = <1>;
161                         #size-cells = <0>;
162
163                         switch0phy0: switch0phy0@11 {
164                                 reg = <0x11>;
165                         };
166                         switch0phy1: switch0phy1@12 {
167                                 reg = <0x12>;
168                         };
169                         switch0phy2: switch0phy2@13 {
170                                 reg = <0x13>;
171                         };
172                 };
173         };
174 };
175
176 &eth0 {
177         phy-mode = "rgmii-id";
178         status = "okay";
179
180         fixed-link {
181                 speed = <1000>;
182                 full-duplex;
183         };
184 };