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1 /*
2  * Device Tree Source for the R-Car Gen3 ULCB board
3  *
4  * Copyright (C) 2016 Renesas Electronics Corp.
5  * Copyright (C) 2016 Cogent Embedded, Inc.
6  *
7  * This file is licensed under the terms of the GNU General Public License
8  * version 2.  This program is licensed "as is" without any warranty of any
9  * kind, whether express or implied.
10  */
11
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14
15 / {
16         model = "Renesas R-Car Gen3 ULCB board";
17
18         aliases {
19                 serial0 = &scif2;
20                 ethernet0 = &avb;
21         };
22
23         chosen {
24                 stdout-path = "serial0:115200n8";
25         };
26
27         audio_clkout: audio-clkout {
28                 /*
29                  * This is same as <&rcar_sound 0>
30                  * but needed to avoid cs2000/rcar_sound probe dead-lock
31                  */
32                 compatible = "fixed-clock";
33                 #clock-cells = <0>;
34                 clock-frequency = <12288000>;
35         };
36
37         hdmi0-out {
38                 compatible = "hdmi-connector";
39                 type = "a";
40
41                 port {
42                         hdmi0_con: endpoint {
43                         };
44                 };
45         };
46
47         keyboard {
48                 compatible = "gpio-keys";
49
50                 key-1 {
51                         linux,code = <KEY_1>;
52                         label = "SW3";
53                         wakeup-source;
54                         debounce-interval = <20>;
55                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
56                 };
57         };
58
59         leds {
60                 compatible = "gpio-leds";
61
62                 led5 {
63                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
64                 };
65                 led6 {
66                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
67                 };
68         };
69
70         reg_1p8v: regulator0 {
71                 compatible = "regulator-fixed";
72                 regulator-name = "fixed-1.8V";
73                 regulator-min-microvolt = <1800000>;
74                 regulator-max-microvolt = <1800000>;
75                 regulator-boot-on;
76                 regulator-always-on;
77         };
78
79         reg_3p3v: regulator1 {
80                 compatible = "regulator-fixed";
81                 regulator-name = "fixed-3.3V";
82                 regulator-min-microvolt = <3300000>;
83                 regulator-max-microvolt = <3300000>;
84                 regulator-boot-on;
85                 regulator-always-on;
86         };
87
88         rsnd_ak4613: sound {
89                 compatible = "simple-audio-card";
90
91                 simple-audio-card,format = "left_j";
92                 simple-audio-card,bitclock-master = <&sndcpu>;
93                 simple-audio-card,frame-master = <&sndcpu>;
94
95                 sndcpu: simple-audio-card,cpu {
96                         sound-dai = <&rcar_sound>;
97                 };
98
99                 sndcodec: simple-audio-card,codec {
100                         sound-dai = <&ak4613>;
101                 };
102         };
103
104         vcc_sdhi0: regulator-vcc-sdhi0 {
105                 compatible = "regulator-fixed";
106
107                 regulator-name = "SDHI0 Vcc";
108                 regulator-min-microvolt = <3300000>;
109                 regulator-max-microvolt = <3300000>;
110
111                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
112                 enable-active-high;
113         };
114
115         vccq_sdhi0: regulator-vccq-sdhi0 {
116                 compatible = "regulator-gpio";
117
118                 regulator-name = "SDHI0 VccQ";
119                 regulator-min-microvolt = <1800000>;
120                 regulator-max-microvolt = <3300000>;
121
122                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
123                 gpios-states = <1>;
124                 states = <3300000 1
125                           1800000 0>;
126         };
127
128         x12_clk: x12 {
129                 compatible = "fixed-clock";
130                 #clock-cells = <0>;
131                 clock-frequency = <24576000>;
132         };
133
134         x23_clk: x23-clock {
135                 compatible = "fixed-clock";
136                 #clock-cells = <0>;
137                 clock-frequency = <25000000>;
138         };
139 };
140
141 &audio_clk_a {
142         clock-frequency = <22579200>;
143 };
144
145 &avb {
146         pinctrl-0 = <&avb_pins>;
147         pinctrl-names = "default";
148         phy-handle = <&phy0>;
149         phy-mode = "rgmii-txid";
150         status = "okay";
151
152         phy0: ethernet-phy@0 {
153                 rxc-skew-ps = <1500>;
154                 reg = <0>;
155                 interrupt-parent = <&gpio2>;
156                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
157                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
158         };
159 };
160
161 &du {
162         status = "okay";
163 };
164
165 &ehci1 {
166         status = "okay";
167 };
168
169 &extal_clk {
170         clock-frequency = <16666666>;
171 };
172
173 &extalr_clk {
174         clock-frequency = <32768>;
175 };
176
177 &hdmi0 {
178         status = "okay";
179
180         ports {
181                 port@1 {
182                         reg = <1>;
183                         rcar_dw_hdmi0_out: endpoint {
184                                 remote-endpoint = <&hdmi0_con>;
185                         };
186                 };
187         };
188 };
189
190 &hdmi0_con {
191         remote-endpoint = <&rcar_dw_hdmi0_out>;
192 };
193
194 &i2c2 {
195         pinctrl-0 = <&i2c2_pins>;
196         pinctrl-names = "default";
197
198         status = "okay";
199
200         clock-frequency = <100000>;
201
202         ak4613: codec@10 {
203                 compatible = "asahi-kasei,ak4613";
204                 #sound-dai-cells = <0>;
205                 reg = <0x10>;
206                 clocks = <&rcar_sound 3>;
207
208                 asahi-kasei,in1-single-end;
209                 asahi-kasei,in2-single-end;
210                 asahi-kasei,out1-single-end;
211                 asahi-kasei,out2-single-end;
212                 asahi-kasei,out3-single-end;
213                 asahi-kasei,out4-single-end;
214                 asahi-kasei,out5-single-end;
215                 asahi-kasei,out6-single-end;
216         };
217
218         cs2000: clk-multiplier@4f {
219                 #clock-cells = <0>;
220                 compatible = "cirrus,cs2000-cp";
221                 reg = <0x4f>;
222                 clocks = <&audio_clkout>, <&x12_clk>;
223                 clock-names = "clk_in", "ref_clk";
224
225                 assigned-clocks = <&cs2000>;
226                 assigned-clock-rates = <24576000>; /* 1/1 divide */
227         };
228 };
229
230 &i2c4 {
231         status = "okay";
232
233         clock-frequency = <400000>;
234
235         versaclock5: clock-generator@6a {
236                 compatible = "idt,5p49v5925";
237                 reg = <0x6a>;
238                 #clock-cells = <1>;
239                 clocks = <&x23_clk>;
240                 clock-names = "xin";
241         };
242 };
243
244 &i2c_dvfs {
245         status = "okay";
246
247         pmic: pmic@30 {
248                 pinctrl-0 = <&irq0_pins>;
249                 pinctrl-names = "default";
250
251                 compatible = "rohm,bd9571mwv";
252                 reg = <0x30>;
253                 interrupt-parent = <&intc_ex>;
254                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
255                 interrupt-controller;
256                 #interrupt-cells = <2>;
257                 gpio-controller;
258                 #gpio-cells = <2>;
259                 rohm,ddr-backup-power = <0xf>;
260                 rohm,rstbmode-pulse;
261
262                 regulators {
263                         dvfs: dvfs {
264                                 regulator-name = "dvfs";
265                                 regulator-min-microvolt = <750000>;
266                                 regulator-max-microvolt = <1030000>;
267                                 regulator-boot-on;
268                                 regulator-always-on;
269                         };
270                 };
271         };
272 };
273
274 &ohci1 {
275         status = "okay";
276 };
277
278 &pfc {
279         pinctrl-0 = <&scif_clk_pins>;
280         pinctrl-names = "default";
281
282         avb_pins: avb {
283                 mux {
284                         groups = "avb_link", "avb_mdio", "avb_mii";
285                         function = "avb";
286                 };
287
288                 pins_mdio {
289                         groups = "avb_mdio";
290                         drive-strength = <24>;
291                 };
292
293                 pins_mii_tx {
294                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
295                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
296                         drive-strength = <12>;
297                 };
298         };
299
300         i2c2_pins: i2c2 {
301                 groups = "i2c2_a";
302                 function = "i2c2";
303         };
304
305         irq0_pins: irq0 {
306                 groups = "intc_ex_irq0";
307                 function = "intc_ex";
308         };
309
310         scif2_pins: scif2 {
311                 groups = "scif2_data_a";
312                 function = "scif2";
313         };
314
315         scif_clk_pins: scif_clk {
316                 groups = "scif_clk_a";
317                 function = "scif_clk";
318         };
319
320         sdhi0_pins: sd0 {
321                 groups = "sdhi0_data4", "sdhi0_ctrl";
322                 function = "sdhi0";
323                 power-source = <3300>;
324         };
325
326         sdhi0_pins_uhs: sd0_uhs {
327                 groups = "sdhi0_data4", "sdhi0_ctrl";
328                 function = "sdhi0";
329                 power-source = <1800>;
330         };
331
332         sdhi2_pins: sd2 {
333                 groups = "sdhi2_data8", "sdhi2_ctrl";
334                 function = "sdhi2";
335                 power-source = <3300>;
336         };
337
338         sdhi2_pins_uhs: sd2_uhs {
339                 groups = "sdhi2_data8", "sdhi2_ctrl";
340                 function = "sdhi2";
341                 power-source = <1800>;
342         };
343
344         sound_pins: sound {
345                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
346                 function = "ssi";
347         };
348
349         sound_clk_pins: sound-clk {
350                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
351                          "audio_clkout_a", "audio_clkout3_a";
352                 function = "audio_clk";
353         };
354
355         usb1_pins: usb1 {
356                 groups = "usb1";
357                 function = "usb1";
358         };
359 };
360
361 &rcar_sound {
362         pinctrl-0 = <&sound_pins &sound_clk_pins>;
363         pinctrl-names = "default";
364
365         /* Single DAI */
366         #sound-dai-cells = <0>;
367
368         /* audio_clkout0/1/2/3 */
369         #clock-cells = <1>;
370         clock-frequency = <12288000 11289600>;
371
372         status = "okay";
373
374         /* update <audio_clk_b> to <cs2000> */
375         clocks = <&cpg CPG_MOD 1005>,
376                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
377                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
378                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
379                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
380                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
381                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
382                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
383                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
384                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
385                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
386                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
387                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
388                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
389                  <&audio_clk_a>, <&cs2000>,
390                  <&audio_clk_c>,
391                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
392
393         rcar_sound,dai {
394                 dai0 {
395                         playback = <&ssi0 &src0 &dvc0>;
396                         capture  = <&ssi1 &src1 &dvc1>;
397                 };
398         };
399 };
400
401 &scif2 {
402         pinctrl-0 = <&scif2_pins>;
403         pinctrl-names = "default";
404
405         status = "okay";
406 };
407
408 &scif_clk {
409         clock-frequency = <14745600>;
410 };
411
412 &sdhi0 {
413         pinctrl-0 = <&sdhi0_pins>;
414         pinctrl-1 = <&sdhi0_pins_uhs>;
415         pinctrl-names = "default", "state_uhs";
416
417         vmmc-supply = <&vcc_sdhi0>;
418         vqmmc-supply = <&vccq_sdhi0>;
419         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
420         bus-width = <4>;
421         sd-uhs-sdr50;
422         status = "okay";
423 };
424
425 &sdhi2 {
426         /* used for on-board 8bit eMMC */
427         pinctrl-0 = <&sdhi2_pins>;
428         pinctrl-1 = <&sdhi2_pins_uhs>;
429         pinctrl-names = "default", "state_uhs";
430
431         vmmc-supply = <&reg_3p3v>;
432         vqmmc-supply = <&reg_1p8v>;
433         bus-width = <8>;
434         mmc-hs200-1_8v;
435         non-removable;
436         status = "okay";
437 };
438
439 &ssi1 {
440         shared-pin;
441 };
442
443 &usb2_phy1 {
444         pinctrl-0 = <&usb1_pins>;
445         pinctrl-names = "default";
446
447         status = "okay";
448 };
449
450 &wdt0 {
451         timeout-sec = <60>;
452         status = "okay";
453 };