1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 Hardkernel Co., Ltd
4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include "rk3326.dtsi"
14 model = "ODROID-GO Advance";
15 compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326";
18 stdout-path = "serial2:115200n8";
21 backlight: backlight {
22 compatible = "pwm-backlight";
23 power-supply = <&vcc_bl>;
24 pwms = <&pwm1 0 25000 0>;
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&btn_pins>;
33 * *** ODROIDGO2-Advance Switch layout ***
34 * |------------------------------------------------|
36 * |------------------------------------------------|
37 * | sw1 |-------------------| sw8 |
38 * | sw3 sw4 | | sw7 sw5 |
39 * | sw2 | LCD Display | sw6 |
41 * | |-------------------| |
42 * | sw9 sw10 sw11 sw12 sw13 sw14 |
43 * |------------------------------------------------|
47 gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
49 linux,code = <BTN_DPAD_UP>;
52 gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
54 linux,code = <BTN_DPAD_DOWN>;
57 gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
59 linux,code = <BTN_DPAD_LEFT>;
62 gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
64 linux,code = <BTN_DPAD_RIGHT>;
67 gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
69 linux,code = <BTN_EAST>;
72 gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
74 linux,code = <BTN_SOUTH>;
77 gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
79 linux,code = <BTN_WEST>;
82 gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
84 linux,code = <BTN_NORTH>;
87 gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
89 linux,code = <BTN_TRIGGER_HAPPY1>;
92 gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
94 linux,code = <BTN_TRIGGER_HAPPY2>;
97 gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
99 linux,code = <BTN_TRIGGER_HAPPY3>;
102 gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
104 linux,code = <BTN_TRIGGER_HAPPY4>;
107 gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
109 linux,code = <BTN_TRIGGER_HAPPY5>;
112 gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
114 linux,code = <BTN_TRIGGER_HAPPY6>;
117 gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
119 linux,code = <BTN_TL>;
122 gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
124 linux,code = <BTN_TR>;
129 compatible = "gpio-leds";
130 pinctrl-names = "default";
131 pinctrl-0 = <&blue_led_pin>;
134 label = "blue:heartbeat";
135 gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
136 linux,default-trigger = "heartbeat";
141 compatible = "regulator-fixed";
142 regulator-name = "vcc3v8_sys";
144 regulator-min-microvolt = <3800000>;
145 regulator-max-microvolt = <3800000>;
149 compatible = "regulator-fixed";
150 regulator-name = "vcc_host";
151 regulator-min-microvolt = <5000000>;
152 regulator-max-microvolt = <5000000>;
154 gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
157 vin-supply = <&vccsys>;
162 cpu-supply = <&vdd_arm>;
166 cpu-supply = <&vdd_arm>;
170 cpu-supply = <&vdd_arm>;
174 cpu-supply = <&vdd_arm>;
178 assigned-clocks = <&cru PLL_NPLL>,
179 <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
180 <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
181 <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>,
184 assigned-clock-rates = <1188000000>,
185 <200000000>, <200000000>,
186 <150000000>, <150000000>,
187 <100000000>, <200000000>,
202 mipi_out_panel: endpoint {
203 remote-endpoint = <&mipi_in_panel>;
209 compatible = "elida,kd35t133";
211 backlight = <&backlight>;
212 iovcc-supply = <&vcc_lcd>;
213 reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
214 vdd-supply = <&vcc_lcd>;
217 mipi_in_panel: endpoint {
218 remote-endpoint = <&mipi_out_panel>;
229 mali-supply = <&vdd_logic>;
234 clock-frequency = <400000>;
235 i2c-scl-falling-time-ns = <16>;
236 i2c-scl-rising-time-ns = <280>;
240 compatible = "rockchip,rk817";
242 interrupt-parent = <&gpio0>;
243 interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&pmic_int>;
246 rockchip,system-power-controller;
249 clock-output-names = "rk808-clkout1", "xin32k";
251 vcc1-supply = <&vccsys>;
252 vcc2-supply = <&vccsys>;
253 vcc3-supply = <&vccsys>;
254 vcc4-supply = <&vccsys>;
255 vcc5-supply = <&vccsys>;
256 vcc6-supply = <&vccsys>;
257 vcc7-supply = <&vccsys>;
260 vdd_logic: DCDC_REG1 {
261 regulator-name = "vdd_logic";
262 regulator-min-microvolt = <950000>;
263 regulator-max-microvolt = <1150000>;
264 regulator-ramp-delay = <6001>;
268 regulator-state-mem {
269 regulator-on-in-suspend;
270 regulator-suspend-microvolt = <950000>;
275 regulator-name = "vdd_arm";
276 regulator-min-microvolt = <950000>;
277 regulator-max-microvolt = <1350000>;
278 regulator-ramp-delay = <6001>;
282 regulator-state-mem {
283 regulator-off-in-suspend;
284 regulator-suspend-microvolt = <950000>;
289 regulator-name = "vcc_ddr";
293 regulator-state-mem {
294 regulator-on-in-suspend;
299 regulator-name = "vcc_3v3";
300 regulator-min-microvolt = <3300000>;
301 regulator-max-microvolt = <3300000>;
305 regulator-state-mem {
306 regulator-off-in-suspend;
307 regulator-suspend-microvolt = <3300000>;
312 regulator-name = "vcc_1v8";
313 regulator-min-microvolt = <1800000>;
314 regulator-max-microvolt = <1800000>;
318 regulator-state-mem {
319 regulator-on-in-suspend;
320 regulator-suspend-microvolt = <1800000>;
325 regulator-name = "vdd_1v0";
326 regulator-min-microvolt = <1000000>;
327 regulator-max-microvolt = <1000000>;
331 regulator-state-mem {
332 regulator-on-in-suspend;
333 regulator-suspend-microvolt = <1000000>;
337 vcc3v3_pmu: LDO_REG4 {
338 regulator-name = "vcc3v3_pmu";
339 regulator-min-microvolt = <3300000>;
340 regulator-max-microvolt = <3300000>;
344 regulator-state-mem {
345 regulator-on-in-suspend;
346 regulator-suspend-microvolt = <3300000>;
351 regulator-name = "vccio_sd";
352 regulator-min-microvolt = <1800000>;
353 regulator-max-microvolt = <3300000>;
357 regulator-state-mem {
358 regulator-on-in-suspend;
359 regulator-suspend-microvolt = <3300000>;
364 regulator-name = "vcc_sd";
365 regulator-min-microvolt = <3300000>;
366 regulator-max-microvolt = <3300000>;
369 regulator-state-mem {
370 regulator-on-in-suspend;
371 regulator-suspend-microvolt = <3300000>;
376 regulator-name = "vcc_bl";
377 regulator-min-microvolt = <3300000>;
378 regulator-max-microvolt = <3300000>;
380 regulator-state-mem {
381 regulator-off-in-suspend;
382 regulator-suspend-microvolt = <3300000>;
387 regulator-name = "vcc_lcd";
388 regulator-min-microvolt = <2800000>;
389 regulator-max-microvolt = <2800000>;
391 regulator-state-mem {
392 regulator-off-in-suspend;
393 regulator-suspend-microvolt = <2800000>;
398 regulator-name = "vcc_cam";
399 regulator-min-microvolt = <3000000>;
400 regulator-max-microvolt = <3000000>;
402 regulator-state-mem {
403 regulator-off-in-suspend;
404 regulator-suspend-microvolt = <3000000>;
411 /* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */
413 clock-frequency = <400000>;
417 /* I2S 1 Channel Used */
423 vccio1-supply = <&vcc_3v3>;
424 vccio2-supply = <&vccio_sd>;
425 vccio3-supply = <&vcc_3v3>;
426 vccio4-supply = <&vcc_3v3>;
427 vccio5-supply = <&vcc_3v3>;
428 vccio6-supply = <&vcc_3v3>;
433 pmuio1-supply = <&vcc3v3_pmu>;
434 pmuio2-supply = <&vcc3v3_pmu>;
443 vref-supply = <&vcc_1v8>;
450 card-detect-delay = <200>;
451 cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
456 vmmc-supply = <&vcc_sd>;
457 vqmmc-supply = <&vccio_sd>;
468 u2phy_host: host-port {
472 u2phy_otg: otg-port {
481 /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
483 pinctrl-names = "default";
484 pinctrl-0 = <&uart1_xfer &uart1_cts>;
489 pinctrl-names = "default";
490 pinctrl-0 = <&uart2m1_xfer>;
505 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
506 <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
507 <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
508 <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
509 <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
510 <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
511 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
512 <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
513 <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
514 <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
515 <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
516 <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
517 <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
518 <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
519 <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
520 <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
526 rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
531 blue_led_pin: blue-led-pin {
532 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
538 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
542 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
545 soc_slppin_gpio: soc_slppin_gpio {
546 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
549 soc_slppin_rst: soc_slppin_rst {
550 rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
553 soc_slppin_slp: soc_slppin_slp {
554 rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;