sys/gnu/dts/arm64/ti/k3-am65-main.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for AM6 SoC Family Main Domain peripherals
   4  *
   5  * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
   6  */
   7
   8 &cbass_main {
   9         gic500: interrupt-controller@1800000 {
  10                 compatible = "arm,gic-v3";
  11                 #address-cells = <2>;
  12                 #size-cells = <2>;
  13                 ranges;
  14                 #interrupt-cells = <3>;
  15                 interrupt-controller;
  16                 reg = <0x00 0x01800000 0x00 0x10000>,   /* GICD */
  17                       <0x00 0x01880000 0x00 0x90000>;   /* GICR */
  18                 /*
  19                  * vcpumntirq:
  20                  * virtual CPU interface maintenance interrupt
  21                  */
  22                 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
  23
  24                 gic_its: gic-its@18200000 {
  25                         compatible = "arm,gic-v3-its";
  26                         reg = <0x00 0x01820000 0x00 0x10000>;
  27                         msi-controller;
  28                         #msi-cells = <1>;
  29                 };
  30         };
  31
  32         secure_proxy_main: mailbox@32c00000 {
  33                 compatible = "ti,am654-secure-proxy";
  34                 #mbox-cells = <1>;
  35                 reg-names = "target_data", "rt", "scfg";
  36                 reg = <0x00 0x32c00000 0x00 0x100000>,
  37                       <0x00 0x32400000 0x00 0x100000>,
  38                       <0x00 0x32800000 0x00 0x100000>;
  39                 interrupt-names = "rx_011";
  40                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
  41         };
  42
  43         main_uart0: serial@2800000 {
  44                 compatible = "ti,am654-uart";
  45                 reg = <0x00 0x02800000 0x00 0x100>;
  46                 reg-shift = <2>;
  47                 reg-io-width = <4>;
  48                 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
  49                 clock-frequency = <48000000>;
  50                 current-speed = <115200>;
  51                 power-domains = <&k3_pds 146>;
  52         };
  53
  54         main_uart1: serial@2810000 {
  55                 compatible = "ti,am654-uart";
  56                 reg = <0x00 0x02810000 0x00 0x100>;
  57                 reg-shift = <2>;
  58                 reg-io-width = <4>;
  59                 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
  60                 clock-frequency = <48000000>;
  61                 power-domains = <&k3_pds 147>;
  62         };
  63
  64         main_uart2: serial@2820000 {
  65                 compatible = "ti,am654-uart";
  66                 reg = <0x00 0x02820000 0x00 0x100>;
  67                 reg-shift = <2>;
  68                 reg-io-width = <4>;
  69                 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
  70                 clock-frequency = <48000000>;
  71                 power-domains = <&k3_pds 148>;
  72         };
  73
  74         main_pmx0: pinmux@11c000 {
  75                 compatible = "pinctrl-single";
  76                 reg = <0x0 0x11c000 0x0 0x2e4>;
  77                 #pinctrl-cells = <1>;
  78                 pinctrl-single,register-width = <32>;
  79                 pinctrl-single,function-mask = <0xffffffff>;
  80         };
  81
  82         main_pmx1: pinmux@11c2e8 {
  83                 compatible = "pinctrl-single";
  84                 reg = <0x0 0x11c2e8 0x0 0x24>;
  85                 #pinctrl-cells = <1>;
  86                 pinctrl-single,register-width = <32>;
  87                 pinctrl-single,function-mask = <0xffffffff>;
  88         };
  89
  90         main_i2c0: i2c@2000000 {
  91                 compatible = "ti,am654-i2c", "ti,omap4-i2c";
  92                 reg = <0x0 0x2000000 0x0 0x100>;
  93                 interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
  94                 #address-cells = <1>;
  95                 #size-cells = <0>;
  96                 clock-names = "fck";
  97                 clocks = <&k3_clks 110 1>;
  98                 power-domains = <&k3_pds 110>;
  99         };
 100
 101         main_i2c1: i2c@2010000 {
 102                 compatible = "ti,am654-i2c", "ti,omap4-i2c";
 103                 reg = <0x0 0x2010000 0x0 0x100>;
 104                 interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
 105                 #address-cells = <1>;
 106                 #size-cells = <0>;
 107                 clock-names = "fck";
 108                 clocks = <&k3_clks 111 1>;
 109                 power-domains = <&k3_pds 111>;
 110         };
 111
 112         main_i2c2: i2c@2020000 {
 113                 compatible = "ti,am654-i2c", "ti,omap4-i2c";
 114                 reg = <0x0 0x2020000 0x0 0x100>;
 115                 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
 116                 #address-cells = <1>;
 117                 #size-cells = <0>;
 118                 clock-names = "fck";
 119                 clocks = <&k3_clks 112 1>;
 120                 power-domains = <&k3_pds 112>;
 121         };
 122
 123         main_i2c3: i2c@2030000 {
 124                 compatible = "ti,am654-i2c", "ti,omap4-i2c";
 125                 reg = <0x0 0x2030000 0x0 0x100>;
 126                 interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
 127                 #address-cells = <1>;
 128                 #size-cells = <0>;
 129                 clock-names = "fck";
 130                 clocks = <&k3_clks 113 1>;
 131                 power-domains = <&k3_pds 113>;
 132         };
 133
 134         ecap0: pwm@3100000 {
 135                 compatible = "ti,am654-ecap", "ti,am3352-ecap";
 136                 #pwm-cells = <3>;
 137                 reg = <0x0 0x03100000 0x0 0x60>;
 138                 power-domains = <&k3_pds 39>;
 139                 clocks = <&k3_clks 39 0>;
 140                 clock-names = "fck";
 141         };
 142
 143         main_spi0: spi@2100000 {
 144                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
 145                 reg = <0x0 0x2100000 0x0 0x400>;
 146                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 147                 clocks = <&k3_clks 137 1>;
 148                 power-domains = <&k3_pds 137>;
 149                 #address-cells = <1>;
 150                 #size-cells = <0>;
 151         };
 152
 153         main_spi1: spi@2110000 {
 154                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
 155                 reg = <0x0 0x2110000 0x0 0x400>;
 156                 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
 157                 clocks = <&k3_clks 138 1>;
 158                 power-domains = <&k3_pds 138>;
 159                 #address-cells = <1>;
 160                 #size-cells = <0>;
 161                 assigned-clocks = <&k3_clks 137 1>;
 162                 assigned-clock-rates = <48000000>;
 163         };
 164
 165         main_spi2: spi@2120000 {
 166                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
 167                 reg = <0x0 0x2120000 0x0 0x400>;
 168                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 169                 clocks = <&k3_clks 139 1>;
 170                 power-domains = <&k3_pds 139>;
 171                 #address-cells = <1>;
 172                 #size-cells = <0>;
 173         };
 174
 175         main_spi3: spi@2130000 {
 176                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
 177                 reg = <0x0 0x2130000 0x0 0x400>;
 178                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 179                 clocks = <&k3_clks 140 1>;
 180                 power-domains = <&k3_pds 140>;
 181                 #address-cells = <1>;
 182                 #size-cells = <0>;
 183         };
 184
 185         main_spi4: spi@2140000 {
 186                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
 187                 reg = <0x0 0x2140000 0x0 0x400>;
 188                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 189                 clocks = <&k3_clks 141 1>;
 190                 power-domains = <&k3_pds 141>;
 191                 #address-cells = <1>;
 192                 #size-cells = <0>;
 193         };
 194 };