sys/gnu/dts/include/dt-bindings/clock/am3.h

   1 /*
   2  * Copyright 2017 Texas Instruments, Inc.
   3  *
   4  * This software is licensed under the terms of the GNU General Public
   5  * License version 2, as published by the Free Software Foundation, and
   6  * may be copied, distributed, and modified under those terms.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13 #ifndef __DT_BINDINGS_CLK_AM3_H
  14 #define __DT_BINDINGS_CLK_AM3_H
  15
  16 #define AM3_CLKCTRL_OFFSET      0x0
  17 #define AM3_CLKCTRL_INDEX(offset)       ((offset) - AM3_CLKCTRL_OFFSET)
  18
  19 /* l4_per clocks */
  20 #define AM3_L4_PER_CLKCTRL_OFFSET       0x14
  21 #define AM3_L4_PER_CLKCTRL_INDEX(offset)        ((offset) - AM3_L4_PER_CLKCTRL_OFFSET)
  22 #define AM3_CPGMAC0_CLKCTRL     AM3_L4_PER_CLKCTRL_INDEX(0x14)
  23 #define AM3_LCDC_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0x18)
  24 #define AM3_USB_OTG_HS_CLKCTRL  AM3_L4_PER_CLKCTRL_INDEX(0x1c)
  25 #define AM3_TPTC0_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0x24)
  26 #define AM3_EMIF_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0x28)
  27 #define AM3_OCMCRAM_CLKCTRL     AM3_L4_PER_CLKCTRL_INDEX(0x2c)
  28 #define AM3_GPMC_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0x30)
  29 #define AM3_MCASP0_CLKCTRL      AM3_L4_PER_CLKCTRL_INDEX(0x34)
  30 #define AM3_UART6_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0x38)
  31 #define AM3_MMC1_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0x3c)
  32 #define AM3_ELM_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x40)
  33 #define AM3_I2C3_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0x44)
  34 #define AM3_I2C2_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0x48)
  35 #define AM3_SPI0_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0x4c)
  36 #define AM3_SPI1_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0x50)
  37 #define AM3_L4_LS_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0x60)
  38 #define AM3_MCASP1_CLKCTRL      AM3_L4_PER_CLKCTRL_INDEX(0x68)
  39 #define AM3_UART2_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0x6c)
  40 #define AM3_UART3_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0x70)
  41 #define AM3_UART4_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0x74)
  42 #define AM3_UART5_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0x78)
  43 #define AM3_TIMER7_CLKCTRL      AM3_L4_PER_CLKCTRL_INDEX(0x7c)
  44 #define AM3_TIMER2_CLKCTRL      AM3_L4_PER_CLKCTRL_INDEX(0x80)
  45 #define AM3_TIMER3_CLKCTRL      AM3_L4_PER_CLKCTRL_INDEX(0x84)
  46 #define AM3_TIMER4_CLKCTRL      AM3_L4_PER_CLKCTRL_INDEX(0x88)
  47 #define AM3_RNG_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x90)
  48 #define AM3_AES_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x94)
  49 #define AM3_SHAM_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0xa0)
  50 #define AM3_GPIO2_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0xac)
  51 #define AM3_GPIO3_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0xb0)
  52 #define AM3_GPIO4_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0xb4)
  53 #define AM3_TPCC_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0xbc)
  54 #define AM3_D_CAN0_CLKCTRL      AM3_L4_PER_CLKCTRL_INDEX(0xc0)
  55 #define AM3_D_CAN1_CLKCTRL      AM3_L4_PER_CLKCTRL_INDEX(0xc4)
  56 #define AM3_EPWMSS1_CLKCTRL     AM3_L4_PER_CLKCTRL_INDEX(0xcc)
  57 #define AM3_EPWMSS0_CLKCTRL     AM3_L4_PER_CLKCTRL_INDEX(0xd4)
  58 #define AM3_EPWMSS2_CLKCTRL     AM3_L4_PER_CLKCTRL_INDEX(0xd8)
  59 #define AM3_L3_INSTR_CLKCTRL    AM3_L4_PER_CLKCTRL_INDEX(0xdc)
  60 #define AM3_L3_MAIN_CLKCTRL     AM3_L4_PER_CLKCTRL_INDEX(0xe0)
  61 #define AM3_PRUSS_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0xe8)
  62 #define AM3_TIMER5_CLKCTRL      AM3_L4_PER_CLKCTRL_INDEX(0xec)
  63 #define AM3_TIMER6_CLKCTRL      AM3_L4_PER_CLKCTRL_INDEX(0xf0)
  64 #define AM3_MMC2_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0xf4)
  65 #define AM3_MMC3_CLKCTRL        AM3_L4_PER_CLKCTRL_INDEX(0xf8)
  66 #define AM3_TPTC1_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0xfc)
  67 #define AM3_TPTC2_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0x100)
  68 #define AM3_SPINLOCK_CLKCTRL    AM3_L4_PER_CLKCTRL_INDEX(0x10c)
  69 #define AM3_MAILBOX_CLKCTRL     AM3_L4_PER_CLKCTRL_INDEX(0x110)
  70 #define AM3_L4_HS_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0x120)
  71 #define AM3_OCPWP_CLKCTRL       AM3_L4_PER_CLKCTRL_INDEX(0x130)
  72 #define AM3_CLKDIV32K_CLKCTRL   AM3_L4_PER_CLKCTRL_INDEX(0x14c)
  73
  74 /* l4_wkup clocks */
  75 #define AM3_L4_WKUP_CLKCTRL_OFFSET      0x4
  76 #define AM3_L4_WKUP_CLKCTRL_INDEX(offset)       ((offset) - AM3_L4_WKUP_CLKCTRL_OFFSET)
  77 #define AM3_CONTROL_CLKCTRL     AM3_L4_WKUP_CLKCTRL_INDEX(0x4)
  78 #define AM3_GPIO1_CLKCTRL       AM3_L4_WKUP_CLKCTRL_INDEX(0x8)
  79 #define AM3_L4_WKUP_CLKCTRL     AM3_L4_WKUP_CLKCTRL_INDEX(0xc)
  80 #define AM3_DEBUGSS_CLKCTRL     AM3_L4_WKUP_CLKCTRL_INDEX(0x14)
  81 #define AM3_WKUP_M3_CLKCTRL     AM3_L4_WKUP_CLKCTRL_INDEX(0xb0)
  82 #define AM3_UART1_CLKCTRL       AM3_L4_WKUP_CLKCTRL_INDEX(0xb4)
  83 #define AM3_I2C1_CLKCTRL        AM3_L4_WKUP_CLKCTRL_INDEX(0xb8)
  84 #define AM3_ADC_TSC_CLKCTRL     AM3_L4_WKUP_CLKCTRL_INDEX(0xbc)
  85 #define AM3_SMARTREFLEX0_CLKCTRL        AM3_L4_WKUP_CLKCTRL_INDEX(0xc0)
  86 #define AM3_TIMER1_CLKCTRL      AM3_L4_WKUP_CLKCTRL_INDEX(0xc4)
  87 #define AM3_SMARTREFLEX1_CLKCTRL        AM3_L4_WKUP_CLKCTRL_INDEX(0xc8)
  88 #define AM3_WD_TIMER2_CLKCTRL   AM3_L4_WKUP_CLKCTRL_INDEX(0xd4)
  89
  90 /* mpu clocks */
  91 #define AM3_MPU_CLKCTRL_OFFSET  0x4
  92 #define AM3_MPU_CLKCTRL_INDEX(offset)   ((offset) - AM3_MPU_CLKCTRL_OFFSET)
  93 #define AM3_MPU_CLKCTRL AM3_MPU_CLKCTRL_INDEX(0x4)
  94
  95 /* l4_rtc clocks */
  96 #define AM3_RTC_CLKCTRL AM3_CLKCTRL_INDEX(0x0)
  97
  98 /* gfx_l3 clocks */
  99 #define AM3_GFX_L3_CLKCTRL_OFFSET       0x4
 100 #define AM3_GFX_L3_CLKCTRL_INDEX(offset)        ((offset) - AM3_GFX_L3_CLKCTRL_OFFSET)
 101 #define AM3_GFX_CLKCTRL AM3_GFX_L3_CLKCTRL_INDEX(0x4)
 102
 103 /* l4_cefuse clocks */
 104 #define AM3_L4_CEFUSE_CLKCTRL_OFFSET    0x20
 105 #define AM3_L4_CEFUSE_CLKCTRL_INDEX(offset)     ((offset) - AM3_L4_CEFUSE_CLKCTRL_OFFSET)
 106 #define AM3_CEFUSE_CLKCTRL      AM3_L4_CEFUSE_CLKCTRL_INDEX(0x20)
 107
 108 #endif