4 compatible = "ralink,mtk7620a-soc";
8 compatible = "mips,mips24KEc";
13 bootargs = "console=ttyS0,57600";
18 #interrupt-cells = <1>;
20 compatible = "mti,cpu-interrupt-controller";
29 compatible = "palmbus";
30 reg = <0x10000000 0x200000>;
31 ranges = <0x0 0x10000000 0x1FFFFF>;
37 compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
42 compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
45 interrupt-parent = <&intc>;
50 compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
53 resets = <&rstctrl 8>;
56 interrupt-parent = <&intc>;
61 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
64 resets = <&rstctrl 19>;
68 #interrupt-cells = <1>;
70 interrupt-parent = <&cpuintc>;
75 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
78 resets = <&rstctrl 20>;
81 interrupt-parent = <&intc>;
86 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
89 resets = <&rstctrl 12>;
92 interrupt-parent = <&intc>;
101 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
104 resets = <&rstctrl 13>;
107 interrupt-parent = <&intc>;
113 ralink,gpio-base = <0>;
114 ralink,num-gpios = <24>;
115 ralink,register-map = [ 00 04 08 0c
121 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
124 interrupt-parent = <&intc>;
130 ralink,gpio-base = <24>;
131 ralink,num-gpios = <16>;
132 ralink,register-map = [ 00 04 08 0c
140 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
143 interrupt-parent = <&intc>;
149 ralink,gpio-base = <40>;
150 ralink,num-gpios = <32>;
151 ralink,register-map = [ 00 04 08 0c
159 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
162 interrupt-parent = <&intc>;
168 ralink,gpio-base = <72>;
169 ralink,num-gpios = <1>;
170 ralink,register-map = [ 00 04 08 0c
178 compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
181 resets = <&rstctrl 16>;
184 #address-cells = <1>;
189 pinctrl-names = "default";
190 pinctrl-0 = <&i2c_pins>;
194 compatible = "ralink,mt7620a-i2s";
197 resets = <&rstctrl 17>;
200 interrupt-parent = <&intc>;
205 dma-names = "tx", "rx";
211 compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
214 resets = <&rstctrl 18>;
217 #address-cells = <1>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&spi_pins>;
227 compatible = "ralink,rt2880-spi";
230 resets = <&rstctrl 18>;
233 #address-cells = <1>;
238 pinctrl-names = "default";
239 pinctrl-0 = <&spi_cs1>;
243 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
246 resets = <&rstctrl 19>;
247 reset-names = "uartl";
249 interrupt-parent = <&intc>;
254 pinctrl-names = "default";
255 pinctrl-0 = <&uartlite_pins>;
259 compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
262 resets = <&rstctrl 28>;
263 reset-names = "intc";
265 interrupt-parent = <&cpuintc>;
270 compatible = "ralink,mt7620a-pcm";
271 reg = <0x2000 0x800>;
273 resets = <&rstctrl 11>;
276 interrupt-parent = <&intc>;
283 compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
284 reg = <0x2800 0x800>;
286 resets = <&rstctrl 14>;
289 interrupt-parent = <&intc>;
293 #dma-channels = <16>;
294 #dma-requests = <16>;
301 compatible = "ralink,rt2880-pinmux";
302 pinctrl-names = "default";
303 pinctrl-0 = <&state_default>;
305 state_default: pinctrl0 {
308 pcm_i2s_pins: pcm_i2s {
310 ralink,group = "uartf";
311 ralink,function = "pcm i2s";
315 uartf_gpio_pins: uartf_gpio {
317 ralink,group = "uartf";
318 ralink,function = "gpio uartf";
324 ralink,group = "spi";
325 ralink,function = "spi";
331 ralink,group = "spi_cs1";
332 ralink,function = "spi_cs1";
338 ralink,group = "i2c";
339 ralink,function = "i2c";
343 uartlite_pins: uartlite {
345 ralink,group = "uartlite";
346 ralink,function = "uartlite";
352 ralink,group = "mdio";
353 ralink,function = "mdio";
359 ralink,group = "ephy";
360 ralink,function = "ephy";
366 ralink,group = "wled";
367 ralink,function = "wled";
371 rgmii1_pins: rgmii1 {
373 ralink,group = "rgmii1";
374 ralink,function = "rgmii1";
378 rgmii2_pins: rgmii2 {
380 ralink,group = "rgmii2";
381 ralink,function = "rgmii2";
387 ralink,group = "pcie";
388 ralink,function = "pcie rst";
394 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
399 compatible = "mediatek,mt7620-usbphy";
402 resets = <&rstctrl 22 &rstctrl 25>;
403 reset-names = "host", "device";
407 compatible = "mediatek,mt7620-eth";
408 reg = <0x10100000 10000>;
410 #address-cells = <1>;
413 interrupt-parent = <&cpuintc>;
416 resets = <&rstctrl 21 &rstctrl 23>;
417 reset-names = "fe", "esw";
419 mediatek,switch = <&gsw>;
422 compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
429 compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
436 #address-cells = <1>;
444 compatible = "mediatek,mt7620-gsw";
445 reg = <0x10110000 8000>;
447 resets = <&rstctrl 23>;
450 interrupt-parent = <&intc>;
455 compatible = "ralink,mt7620-sdhci";
456 reg = <0x10130000 4000>;
458 interrupt-parent = <&intc>;
465 compatible = "generic-ehci";
466 reg = <0x101c0000 0x1000>;
468 interrupt-parent = <&intc>;
478 compatible = "generic-ohci";
479 reg = <0x101c1000 0x1000>;
481 interrupt-parent = <&intc>;
491 compatible = "mediatek,mt7620-pci";
492 reg = <0x10140000 0x100
495 #address-cells = <3>;
498 resets = <&rstctrl 26>;
499 reset-names = "pcie0";
501 interrupt-parent = <&cpuintc>;
504 pinctrl-names = "default";
505 pinctrl-0 = <&pcie_pins>;
511 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
512 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
518 reg = <0x0000 0 0 0 0>;
520 #address-cells = <3>;
528 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
529 reg = <0x10180000 40000>;
531 interrupt-parent = <&cpuintc>;
534 ralink,eeprom = "soc_wmac.eeprom";
538 #include <fbsd-mt7620a.dtsi>