2 * Copyright (c) 1989, 1990 William F. Jolitz.
3 * Copyright (c) 1990 The Regents of the University of California.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
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15 * may be used to endorse or promote products derived from this software
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18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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30 * from: vector.s, 386BSD 0.1 unknown origin
35 * Interrupt entry points for external interrupts triggered by I/O APICs
36 * as well as IPI handlers.
41 #include <machine/asmacros.h>
42 #include <machine/specialreg.h>
43 #include <x86/apicreg.h>
49 /* End Of Interrupt to APIC */
57 movl $MSR_APIC_EOI,%ecx
64 * I/O Interrupt Entry Point. Rather than having one entry point for
65 * each interrupt source, we use one entry point for each 32-bit word
66 * in the ISR. The handler determines the highest bit set in the ISR,
67 * translates that into a vector, and passes the vector to the
68 * lapic_handle_intr() function.
70 #define ISR_VEC(index, vec_name) \
77 FAKE_MCOUNT(TF_EIP(%esp)) ; \
78 cmpl $0,x2apic_mode ; \
80 movl $(MSR_APIC_ISR0 + index),%ecx ; \
84 movl lapic_map, %edx ;/* pointer to local APIC */ \
85 movl LA_ISR + 16 * (index)(%edx), %eax ; /* load ISR */ \
87 bsrl %eax, %eax ; /* index of highest set bit in ISR */ \
89 addl $(32 * index),%eax ; \
91 pushl %eax ; /* pass the IRQ */ \
92 call lapic_handle_intr ; \
93 addl $8, %esp ; /* discard parameter */ \
99 * Handle "spurious INTerrupts".
101 * This is different than the "spurious INTerrupt" generated by an
102 * 8259 PIC for missing INTs. See the APIC documentation for details.
103 * This routine should NOT do an 'EOI' cycle.
109 /* No EOI cycle used here */
113 ISR_VEC(1, apic_isr1)
114 ISR_VEC(2, apic_isr2)
115 ISR_VEC(3, apic_isr3)
116 ISR_VEC(4, apic_isr4)
117 ISR_VEC(5, apic_isr5)
118 ISR_VEC(6, apic_isr6)
119 ISR_VEC(7, apic_isr7)
122 * Local APIC periodic timer handler.
130 FAKE_MCOUNT(TF_EIP(%esp))
132 call lapic_handle_timer
138 * Local APIC CMCI handler.
146 FAKE_MCOUNT(TF_EIP(%esp))
147 call lapic_handle_cmc
152 * Local APIC error interrupt handler.
160 FAKE_MCOUNT(TF_EIP(%esp))
161 call lapic_handle_error
167 * Xen event channel upcall interrupt handler.
168 * Only used when the hypervisor supports direct vector callbacks.
172 IDTVEC(xen_intr_upcall)
176 FAKE_MCOUNT(TF_EIP(%esp))
178 call xen_intr_handle_upcall
186 * Global address space TLB shootdown.
206 * Single page TLB shootdown
220 * Page range TLB shootdown.
243 call invlcache_handler
248 * Handler for IPIs sent via the per-cpu IPI bitmap.
252 IDTVEC(ipi_intr_bitmap_handler)
259 FAKE_MCOUNT(TF_EIP(%esp))
261 call ipi_bitmap_handler
266 * Executed by a CPU when it receives an IPI_STOP from another CPU.
282 * Executed by a CPU when it receives an IPI_SUSPEND from another CPU.
292 call cpususpend_handler
298 * Executed by a CPU when it receives a RENDEZVOUS IPI from another CPU.
300 * - Calls the generic rendezvous action function.
310 movl PCPU(CPUID), %eax
311 movl ipi_rendezvous_counts(,%eax,4), %eax
314 call smp_rendezvous_action