2 * Copyright (c) 1989, 1990 William F. Jolitz.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * Copyright (c) 2007, 2018 The FreeBSD Foundation
7 * Portions of this software were developed by A. Joseph Koshy under
8 * sponsorship from the FreeBSD Foundation and Google, Inc.
9 * Portions of this software were developed by Konstantin Belousov
10 * <kib@FreeBSD.org> under sponsorship from the FreeBSD Foundation.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 #include "opt_atpic.h"
39 #include "opt_hwpmc_hooks.h"
40 #include "opt_hyperv.h"
44 #include <machine/psl.h>
45 #include <machine/asmacros.h>
46 #include <machine/trap.h>
50 .globl dtrace_invop_jump_addr
52 .type dtrace_invop_jump_addr, @object
53 .size dtrace_invop_jump_addr, 4
54 dtrace_invop_jump_addr:
56 .globl dtrace_invop_calltrap_addr
58 .type dtrace_invop_calltrap_addr, @object
59 .size dtrace_invop_calltrap_addr, 4
60 dtrace_invop_calltrap_addr:
64 ENTRY(start_exceptions)
66 tramp_idleptd: .long 0
68 /*****************************************************************************/
70 /*****************************************************************************/
72 * Trap and fault vector routines.
74 * All traps are 'interrupt gates', SDT_SYS386IGT. Interrupts are disabled
75 * by hardware to not allow interrupts until code switched to the kernel
76 * address space and the kernel thread stack.
78 * The cpu will push a certain amount of state onto the kernel stack for
79 * the current process. The amount of state depends on the type of trap
80 * and whether the trap crossed rings or not. See i386/include/frame.h.
81 * At the very least the current EFLAGS (status register, which includes
82 * the interrupt disable state prior to the trap), the code segment register,
83 * and the return instruction pointer are pushed by the cpu. The cpu
84 * will also push an 'error' code for certain traps. We push a dummy
85 * error code for those traps where the cpu doesn't in order to maintain
86 * a consistent frame. We also push a contrived 'trap number'.
88 * The cpu does not push the general registers, we must do that, and we
89 * must restore them prior to calling 'iret'. The cpu adjusts the %cs and
90 * %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we
91 * must load them with appropriate values for supervisor mode operation.
93 * This code is not executed at the linked address, it is copied to the
94 * trampoline area. As the consequence, all code there and in included files
98 #define TRAP(a) pushl $(a) ; jmp alltraps
101 pushl $0; TRAP(T_DIVIDE)
103 pushl $0; TRAP(T_BPTFLT)
105 pushl $0; TRAP(T_DTRACE_RET)
107 pushl $0; TRAP(T_OFLOW)
109 pushl $0; TRAP(T_BOUND)
110 #ifndef KDTRACE_HOOKS
112 pushl $0; TRAP(T_PRIVINFLT)
115 pushl $0; TRAP(T_DNA)
117 pushl $0; TRAP(T_FPOPFLT)
130 testl $PSL_VM, TF_EFLAGS-TF_ERR(%esp)
132 testb $SEL_RPL_MASK, TF_CS-TF_ERR(%esp)
134 cmpl $PMAP_TRM_MIN_ADDRESS, TF_EIP-TF_ERR(%esp)
138 * This is a handshake between copyout_fast.s and page fault
139 * handler. We check for page fault occuring at the special
140 * places in the copyout fast path, where page fault can
141 * legitimately happen while accessing either user space or
142 * kernel pageable memory, and return control to *%edx.
143 * We switch to the idleptd page table from a user page table,
147 movl TF_EIP-TF_ERR+4(%esp), %eax
171 2: movl $tramp_idleptd, %eax
177 movl %edx, TF_EIP-TF_ERR(%esp)
186 upf: pushl $T_PAGEFLT
190 pushl $0; TRAP(T_RESERVED)
192 pushl $0; TRAP(T_ARITHTRAP)
196 pushl $0; TRAP(T_XMMFLT)
199 * All traps except ones for syscalls or invalid segment,
200 * jump to alltraps. If
201 * interrupts were enabled when the trap occurred, then interrupts
202 * are enabled now if the trap was through a trap gate, else
203 * disabled if the trap was through an interrupt gate. Note that
204 * int0x80_syscall is a trap gate. Interrupt gates are used by
205 * page faults, non-maskable interrupts, debug and breakpoint
210 .type alltraps,@function
213 alltraps_with_regs_pushed:
224 * Return via doreti to handle ASTs.
229 .type irettraps,@function
231 testl $PSL_VM, TF_EFLAGS-TF_TRAPNO(%esp)
233 testb $SEL_RPL_MASK, TF_CS-TF_TRAPNO(%esp)
238 * The special case there is the kernel mode with user %cr3 and
239 * trampoline stack. We need to copy both current frame and the
240 * hardware portion of the frame we tried to return to, to the
241 * normal stack. This logic must follow the stack unwind order
249 leal (doreti_iret - 1b)(%ebx), %edx
250 cmpl %edx, TF_EIP(%esp)
252 /* -8 because exception did not switch ring */
253 movl $(2 * TF_SZ - TF_EIP - 8), %ecx
255 2: leal (doreti_popl_ds - 1b)(%ebx), %edx
256 cmpl %edx, TF_EIP(%esp)
258 movl $(2 * TF_SZ - TF_DS - 8), %ecx
260 3: leal (doreti_popl_es - 1b)(%ebx), %edx
261 cmpl %edx, TF_EIP(%esp)
263 movl $(2 * TF_SZ - TF_ES - 8), %ecx
265 4: leal (doreti_popl_fs - 1b)(%ebx), %edx
266 cmpl %edx, TF_EIP(%esp)
268 movl $(2 * TF_SZ - TF_FS - 8), %ecx
269 5: cmpl $PMAP_TRM_MIN_ADDRESS, %esp /* trampoline stack ? */
270 jb calltrap /* if not, no need to change stacks */
271 movl (tramp_idleptd - 1b)(%ebx), %eax
273 movl PCPU(KESP0), %edx
279 /* kernel mode, normal */
283 * Privileged instruction fault.
289 * Check if this is a user fault. If so, just handle it as a normal
292 testl $PSL_VM, 8(%esp) /* and vm86 mode. */
294 cmpl $GSEL_KPL, 4(%esp) /* Check the code segment */
298 * Check if a DTrace hook is registered. The trampoline cannot
301 cmpl $0, dtrace_invop_jump_addr
305 * This is a kernel instruction fault that might have been caused
306 * by a DTrace provider.
312 * Set our jump address for the jump back in the event that
313 * the exception wasn't caused by DTrace at all.
315 movl $norm_ill, dtrace_invop_calltrap_addr
317 /* Jump to the code hooked in by DTrace. */
318 jmpl *dtrace_invop_jump_addr
321 * Process the instruction fault in the normal way.
330 * See comment in the handler for the kernel case T_TRCTRAP in trap.c.
331 * The exception handler must be ready to execute with wrong %cr3.
332 * We save original %cr3 in frame->tf_err, similarly to NMI and MCE
342 movl %eax, TF_ERR(%esp)
345 movl (tramp_idleptd - 1b)(%eax), %eax
347 testl $PSL_VM, TF_EFLAGS(%esp)
349 testb $SEL_RPL_MASK,TF_CS(%esp)
353 movl $handle_ibrs_entry,%eax
359 movl $T_RESERVED, TF_TRAPNO(%esp)
375 * Save %cr3 into tf_err. There is no good place to put it.
376 * Always reload %cr3, since we might have interrupted the
377 * kernel entry or exit.
378 * Do not switch to the thread kernel stack, otherwise we might
379 * obliterate the previous context partially copied from the
381 * Do not re-enable IBRS, there is no good place to store
382 * previous state if we come from the kernel.
385 movl %eax, TF_ERR(%esp)
388 movl (tramp_idleptd - 1b)(%eax), %eax
393 * Trap gate entry for syscalls (int 0x80).
394 * This is used by FreeBSD ELF executables, "new" a.out executables, and all
397 * Even though the name says 'int0x80', this is actually a trap gate, not an
398 * interrupt gate. Thus interrupts are enabled on entry just as they are for
402 IDTVEC(int0x80_syscall)
403 pushl $2 /* sizeof "int 0x80" */
404 pushl $0 /* tf_trapno */
409 movl $handle_ibrs_entry,%eax
418 ENTRY(fork_trampoline)
419 pushl %esp /* trapframe pointer */
420 pushl %ebx /* arg1 */
421 pushl %esi /* function */
422 movl $fork_exit, %eax
425 /* cut from syscall */
428 * Return via doreti to handle ASTs.
439 #include <i386/i386/atpic_vector.S>
442 #if defined(DEV_APIC) && defined(DEV_ATPIC)
450 #include <i386/i386/apic_vector.S>
458 #include <dev/hyperv/vmbus/i386/vmbus_vector.S>
465 #include <i386/i386/vm86bios.S>
469 #include <i386/i386/copyout_fast.S>
472 * void doreti(struct trapframe)
474 * Handle return from interrupts, traps and syscalls.
478 .type doreti,@function
483 * Check if ASTs can be handled now. ASTs cannot be safely
484 * processed when returning from an NMI.
486 cmpb $T_NMI,TF_TRAPNO(%esp)
493 * PSL_VM must be checked first since segment registers only
494 * have an RPL in non-VM86 mode.
495 * ASTs can not be handled now if we are in a vm86 call.
497 testl $PSL_VM,TF_EFLAGS(%esp)
499 movl PCPU(CURPCB),%ecx
500 testl $PCB_VM86CALL,PCB_FLAGS(%ecx)
505 testb $SEL_RPL_MASK,TF_CS(%esp) /* are we returning to user mode? */
506 jz doreti_exit /* can't handle ASTs now if not */
510 * Check for ASTs atomically with returning. Disabling CPU
511 * interrupts provides sufficient locking even in the SMP case,
512 * since we will be informed of any new ASTs by an IPI.
515 movl PCPU(CURTHREAD),%eax
519 pushl %esp /* pass a pointer to the trapframe */
526 * doreti_exit: pop registers, iret.
528 * The segment register pop is a special case, since it may
529 * fault if (for example) a sigreturn specifies bad segment
530 * registers. The fault is handled in trap.c.
533 cmpl $T_NMI, TF_TRAPNO(%esp)
535 cmpl $T_MCHK, TF_TRAPNO(%esp)
537 cmpl $T_TRCTRAP, TF_TRAPNO(%esp)
539 testl $PSL_VM,TF_EFLAGS(%esp)
540 jnz 1f /* PCB_VM86CALL is not set */
541 testl $SEL_RPL_MASK, TF_CS(%esp)
543 1: movl $handle_ibrs_exit,%eax
545 movl mds_handler,%eax
548 movl PCPU(TRAMPSTK), %edx
550 testl $PSL_VM,TF_EFLAGS(%esp)
551 jz 2f /* PCB_VM86CALL is not set */
552 addl $VM86_STACK_SPACE, %ecx
557 movl PCPU(CURPCB),%eax
558 movl PCB_CR3(%eax), %eax
561 .globl doreti_popl_fs
564 .globl doreti_popl_es
567 .globl doreti_popl_ds
577 movl TF_ERR(%esp), %eax
582 * doreti_iret_fault and friends. Alternative return code for
583 * the case where we get a fault in the doreti_exit code
584 * above. trap() (i386/i386/trap.c) catches this specific
585 * case, and continues in the corresponding place in the code
588 * If the fault occurred during return to usermode, we recreate
589 * the trap frame and call trap() to send a signal. Otherwise
590 * the kernel was tricked into fault by attempt to restore invalid
591 * usermode segment selectors on return from nested fault or
592 * interrupt, where interrupted kernel entry code not yet loaded
593 * kernel selectors. In the latter case, emulate iret and zero
594 * the invalid selector.
597 .globl doreti_iret_fault
599 pushl $0 /* tf_err */
600 pushl $0 /* tf_trapno XXXKIB: provide more useful value ? */
604 .globl doreti_popl_ds_fault
605 doreti_popl_ds_fault:
606 testb $SEL_RPL_MASK,TF_CS-TF_DS(%esp)
607 jz doreti_popl_ds_kfault
610 .globl doreti_popl_es_fault
611 doreti_popl_es_fault:
612 testb $SEL_RPL_MASK,TF_CS-TF_ES(%esp)
613 jz doreti_popl_es_kfault
616 .globl doreti_popl_fs_fault
617 doreti_popl_fs_fault:
618 testb $SEL_RPL_MASK,TF_CS-TF_FS(%esp)
619 jz doreti_popl_fs_kfault
620 movl $0,TF_ERR(%esp) /* XXX should be the error code */
621 movl $T_PROTFLT,TF_TRAPNO(%esp)
625 doreti_popl_ds_kfault:
628 doreti_popl_es_kfault:
631 doreti_popl_fs_kfault:
638 * Since we are returning from an NMI, check if the current trap
639 * was from user mode and if so whether the current thread
640 * needs a user call chain capture.
642 testl $PSL_VM, TF_EFLAGS(%esp)
644 testb $SEL_RPL_MASK,TF_CS(%esp)
646 movl PCPU(CURTHREAD),%eax /* curthread present? */
649 testl $TDP_CALLCHAIN,TD_PFLAGS(%eax) /* flagged for capture? */
652 * Switch to thread stack. Reset tf_trapno to not indicate NMI,
653 * to cause normal userspace exit.
655 movl $T_RESERVED, TF_TRAPNO(%esp)
658 * Take the processor out of NMI mode by executing a fake "iret".
664 leal (outofnmi-1b)(%eax),%eax
669 * Call the callchain capture hook after turning interrupts back on.
674 pushl %esp /* frame pointer */
675 pushl $PMC_FN_USER_CALLCHAIN /* command */
676 movl PCPU(CURTHREAD),%eax
677 pushl %eax /* curthread */
684 ENTRY(end_exceptions)