2 * Copyright (c) 1989, 1990 William F. Jolitz.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * Copyright (c) 2007, 2018 The FreeBSD Foundation
7 * Portions of this software were developed by A. Joseph Koshy under
8 * sponsorship from the FreeBSD Foundation and Google, Inc.
9 * Portions of this software were developed by Konstantin Belousov
10 * <kib@FreeBSD.org> under sponsorship from the FreeBSD Foundation.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 #include "opt_atpic.h"
41 #include "opt_hwpmc_hooks.h"
42 #include "opt_hyperv.h"
46 #include <machine/psl.h>
47 #include <machine/asmacros.h>
48 #include <machine/trap.h>
52 .globl dtrace_invop_jump_addr
54 .type dtrace_invop_jump_addr, @object
55 .size dtrace_invop_jump_addr, 4
56 dtrace_invop_jump_addr:
58 .globl dtrace_invop_calltrap_addr
60 .type dtrace_invop_calltrap_addr, @object
61 .size dtrace_invop_calltrap_addr, 4
62 dtrace_invop_calltrap_addr:
66 ENTRY(start_exceptions)
68 tramp_idleptd: .long 0
70 /*****************************************************************************/
72 /*****************************************************************************/
74 * Trap and fault vector routines.
76 * All traps are 'interrupt gates', SDT_SYS386IGT. Interrupts are disabled
77 * by hardware to not allow interrupts until code switched to the kernel
78 * address space and the kernel thread stack.
80 * The cpu will push a certain amount of state onto the kernel stack for
81 * the current process. The amount of state depends on the type of trap
82 * and whether the trap crossed rings or not. See i386/include/frame.h.
83 * At the very least the current EFLAGS (status register, which includes
84 * the interrupt disable state prior to the trap), the code segment register,
85 * and the return instruction pointer are pushed by the cpu. The cpu
86 * will also push an 'error' code for certain traps. We push a dummy
87 * error code for those traps where the cpu doesn't in order to maintain
88 * a consistent frame. We also push a contrived 'trap number'.
90 * The cpu does not push the general registers, we must do that, and we
91 * must restore them prior to calling 'iret'. The cpu adjusts the %cs and
92 * %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we
93 * must load them with appropriate values for supervisor mode operation.
95 * This code is not executed at the linked address, it is copied to the
96 * trampoline area. As the consequence, all code there and in included files
103 #define TRAP(a) pushl $(a) ; jmp alltraps
106 pushl $0; TRAP(T_DIVIDE)
108 pushl $0; TRAP(T_BPTFLT)
110 pushl $0; TRAP(T_DTRACE_RET)
112 pushl $0; TRAP(T_OFLOW)
114 pushl $0; TRAP(T_BOUND)
115 #ifndef KDTRACE_HOOKS
117 pushl $0; TRAP(T_PRIVINFLT)
120 pushl $0; TRAP(T_DNA)
122 pushl $0; TRAP(T_FPOPFLT)
135 testl $PSL_VM, TF_EFLAGS-TF_ERR(%esp)
137 testb $SEL_RPL_MASK, TF_CS-TF_ERR(%esp)
139 cmpl $PMAP_TRM_MIN_ADDRESS, TF_EIP-TF_ERR(%esp)
143 * This is a handshake between copyout_fast.s and page fault
144 * handler. We check for page fault occuring at the special
145 * places in the copyout fast path, where page fault can
146 * legitimately happen while accessing either user space or
147 * kernel pageable memory, and return control to *%edx.
148 * We switch to the idleptd page table from a user page table,
152 movl TF_EIP-TF_ERR+4(%esp), %eax
176 2: movl $tramp_idleptd, %eax
182 movl %edx, TF_EIP-TF_ERR(%esp)
191 upf: pushl $T_PAGEFLT
195 pushl $0; TRAP(T_RESERVED)
197 pushl $0; TRAP(T_ARITHTRAP)
201 pushl $0; TRAP(T_XMMFLT)
204 * All traps except ones for syscalls or invalid segment,
205 * jump to alltraps. If
206 * interrupts were enabled when the trap occurred, then interrupts
207 * are enabled now if the trap was through a trap gate, else
208 * disabled if the trap was through an interrupt gate. Note that
209 * int0x80_syscall is a trap gate. Interrupt gates are used by
210 * page faults, non-maskable interrupts, debug and breakpoint
215 .type alltraps,@function
218 alltraps_with_regs_pushed:
222 FAKE_MCOUNT(TF_EIP(%esp))
230 * Return via doreti to handle ASTs.
236 .type irettraps,@function
238 testl $PSL_VM, TF_EFLAGS-TF_TRAPNO(%esp)
240 testb $SEL_RPL_MASK, TF_CS-TF_TRAPNO(%esp)
245 * The special case there is the kernel mode with user %cr3 and
246 * trampoline stack. We need to copy both current frame and the
247 * hardware portion of the frame we tried to return to, to the
248 * normal stack. This logic must follow the stack unwind order
256 leal (doreti_iret - 1b)(%ebx), %edx
257 cmpl %edx, TF_EIP(%esp)
259 /* -8 because exception did not switch ring */
260 movl $(2 * TF_SZ - TF_EIP - 8), %ecx
262 2: leal (doreti_popl_ds - 1b)(%ebx), %edx
263 cmpl %edx, TF_EIP(%esp)
265 movl $(2 * TF_SZ - TF_DS - 8), %ecx
267 3: leal (doreti_popl_es - 1b)(%ebx), %edx
268 cmpl %edx, TF_EIP(%esp)
270 movl $(2 * TF_SZ - TF_ES - 8), %ecx
272 4: leal (doreti_popl_fs - 1b)(%ebx), %edx
273 cmpl %edx, TF_EIP(%esp)
275 movl $(2 * TF_SZ - TF_FS - 8), %ecx
276 5: cmpl $PMAP_TRM_MIN_ADDRESS, %esp /* trampoline stack ? */
277 jb calltrap /* if not, no need to change stacks */
278 movl (tramp_idleptd - 1b)(%ebx), %eax
280 movl PCPU(KESP0), %edx
286 /* kernel mode, normal */
290 * Privileged instruction fault.
296 * Check if this is a user fault. If so, just handle it as a normal
299 testl $PSL_VM, 8(%esp) /* and vm86 mode. */
301 cmpl $GSEL_KPL, 4(%esp) /* Check the code segment */
305 * Check if a DTrace hook is registered. The trampoline cannot
308 cmpl $0, dtrace_invop_jump_addr
312 * This is a kernel instruction fault that might have been caused
313 * by a DTrace provider.
319 * Set our jump address for the jump back in the event that
320 * the exception wasn't caused by DTrace at all.
322 movl $norm_ill, dtrace_invop_calltrap_addr
324 /* Jump to the code hooked in by DTrace. */
325 jmpl *dtrace_invop_jump_addr
328 * Process the instruction fault in the normal way.
337 * See comment in the handler for the kernel case T_TRCTRAP in trap.c.
338 * The exception handler must be ready to execute with wrong %cr3.
339 * We save original %cr3 in frame->tf_err, similarly to NMI and MCE
349 movl %eax, TF_ERR(%esp)
352 movl (tramp_idleptd - 1b)(%eax), %eax
354 FAKE_MCOUNT(TF_EIP(%esp))
355 testl $PSL_VM, TF_EFLAGS(%esp)
357 testb $SEL_RPL_MASK,TF_CS(%esp)
361 movl $handle_ibrs_entry,%eax
367 movl $T_RESERVED, TF_TRAPNO(%esp)
384 * Save %cr3 into tf_err. There is no good place to put it.
385 * Always reload %cr3, since we might have interrupted the
386 * kernel entry or exit.
387 * Do not switch to the thread kernel stack, otherwise we might
388 * obliterate the previous context partially copied from the
390 * Do not re-enable IBRS, there is no good place to store
391 * previous state if we come from the kernel.
394 movl %eax, TF_ERR(%esp)
397 movl (tramp_idleptd - 1b)(%eax), %eax
399 FAKE_MCOUNT(TF_EIP(%esp))
403 * Trap gate entry for syscalls (int 0x80).
404 * This is used by FreeBSD ELF executables, "new" a.out executables, and all
407 * Even though the name says 'int0x80', this is actually a trap gate, not an
408 * interrupt gate. Thus interrupts are enabled on entry just as they are for
412 IDTVEC(int0x80_syscall)
413 pushl $2 /* sizeof "int 0x80" */
414 pushl $0 /* tf_trapno */
419 movl $handle_ibrs_entry,%eax
422 FAKE_MCOUNT(TF_EIP(%esp))
430 ENTRY(fork_trampoline)
431 pushl %esp /* trapframe pointer */
432 pushl %ebx /* arg1 */
433 pushl %esi /* function */
434 movl $fork_exit, %eax
437 /* cut from syscall */
440 * Return via doreti to handle ASTs.
447 * To efficiently implement classification of trap and interrupt handlers
448 * for profiling, there must be only trap handlers between the labels btrap
449 * and bintr, and only interrupt handlers between the labels bintr and
450 * eintr. This is implemented (partly) by including files that contain
451 * some of the handlers. Before including the files, set up a normal asm
452 * environment so that the included files doen't need to know that they are
463 #include <i386/i386/atpic_vector.s>
466 #if defined(DEV_APIC) && defined(DEV_ATPIC)
474 #include <i386/i386/apic_vector.s>
482 #include <dev/hyperv/vmbus/i386/vmbus_vector.S>
489 #include <i386/i386/vm86bios.s>
494 #include <i386/i386/copyout_fast.s>
497 * void doreti(struct trapframe)
499 * Handle return from interrupts, traps and syscalls.
503 .type doreti,@function
506 FAKE_MCOUNT($bintr) /* init "from" bintr -> doreti */
509 * Check if ASTs can be handled now. ASTs cannot be safely
510 * processed when returning from an NMI.
512 cmpb $T_NMI,TF_TRAPNO(%esp)
519 * PSL_VM must be checked first since segment registers only
520 * have an RPL in non-VM86 mode.
521 * ASTs can not be handled now if we are in a vm86 call.
523 testl $PSL_VM,TF_EFLAGS(%esp)
525 movl PCPU(CURPCB),%ecx
526 testl $PCB_VM86CALL,PCB_FLAGS(%ecx)
531 testb $SEL_RPL_MASK,TF_CS(%esp) /* are we returning to user mode? */
532 jz doreti_exit /* can't handle ASTs now if not */
536 * Check for ASTs atomically with returning. Disabling CPU
537 * interrupts provides sufficient locking even in the SMP case,
538 * since we will be informed of any new ASTs by an IPI.
541 movl PCPU(CURTHREAD),%eax
542 testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%eax)
545 pushl %esp /* pass a pointer to the trapframe */
552 * doreti_exit: pop registers, iret.
554 * The segment register pop is a special case, since it may
555 * fault if (for example) a sigreturn specifies bad segment
556 * registers. The fault is handled in trap.c.
561 cmpl $T_NMI, TF_TRAPNO(%esp)
563 cmpl $T_MCHK, TF_TRAPNO(%esp)
565 cmpl $T_TRCTRAP, TF_TRAPNO(%esp)
567 testl $PSL_VM,TF_EFLAGS(%esp)
568 jnz 1f /* PCB_VM86CALL is not set */
569 testl $SEL_RPL_MASK, TF_CS(%esp)
571 1: movl $handle_ibrs_exit,%eax
573 movl mds_handler,%eax
576 movl PCPU(TRAMPSTK), %edx
578 testl $PSL_VM,TF_EFLAGS(%esp)
579 jz 2f /* PCB_VM86CALL is not set */
580 addl $VM86_STACK_SPACE, %ecx
585 movl PCPU(CURPCB),%eax
586 movl PCB_CR3(%eax), %eax
589 .globl doreti_popl_fs
592 .globl doreti_popl_es
595 .globl doreti_popl_ds
605 movl TF_ERR(%esp), %eax
610 * doreti_iret_fault and friends. Alternative return code for
611 * the case where we get a fault in the doreti_exit code
612 * above. trap() (i386/i386/trap.c) catches this specific
613 * case, and continues in the corresponding place in the code
616 * If the fault occurred during return to usermode, we recreate
617 * the trap frame and call trap() to send a signal. Otherwise
618 * the kernel was tricked into fault by attempt to restore invalid
619 * usermode segment selectors on return from nested fault or
620 * interrupt, where interrupted kernel entry code not yet loaded
621 * kernel selectors. In the latter case, emulate iret and zero
622 * the invalid selector.
625 .globl doreti_iret_fault
627 pushl $0 /* tf_err */
628 pushl $0 /* tf_trapno XXXKIB: provide more useful value ? */
632 .globl doreti_popl_ds_fault
633 doreti_popl_ds_fault:
634 testb $SEL_RPL_MASK,TF_CS-TF_DS(%esp)
635 jz doreti_popl_ds_kfault
638 .globl doreti_popl_es_fault
639 doreti_popl_es_fault:
640 testb $SEL_RPL_MASK,TF_CS-TF_ES(%esp)
641 jz doreti_popl_es_kfault
644 .globl doreti_popl_fs_fault
645 doreti_popl_fs_fault:
646 testb $SEL_RPL_MASK,TF_CS-TF_FS(%esp)
647 jz doreti_popl_fs_kfault
648 movl $0,TF_ERR(%esp) /* XXX should be the error code */
649 movl $T_PROTFLT,TF_TRAPNO(%esp)
653 doreti_popl_ds_kfault:
656 doreti_popl_es_kfault:
659 doreti_popl_fs_kfault:
666 * Since we are returning from an NMI, check if the current trap
667 * was from user mode and if so whether the current thread
668 * needs a user call chain capture.
670 testl $PSL_VM, TF_EFLAGS(%esp)
672 testb $SEL_RPL_MASK,TF_CS(%esp)
674 movl PCPU(CURTHREAD),%eax /* curthread present? */
677 testl $TDP_CALLCHAIN,TD_PFLAGS(%eax) /* flagged for capture? */
680 * Switch to thread stack. Reset tf_trapno to not indicate NMI,
681 * to cause normal userspace exit.
683 movl $T_RESERVED, TF_TRAPNO(%esp)
686 * Take the processor out of NMI mode by executing a fake "iret".
692 leal (outofnmi-1b)(%eax),%eax
697 * Call the callchain capture hook after turning interrupts back on.
702 pushl %esp /* frame pointer */
703 pushl $PMC_FN_USER_CALLCHAIN /* command */
704 movl PCPU(CURTHREAD),%eax
705 pushl %eax /* curthread */
712 ENTRY(end_exceptions)