2 * Copyright (c) 1989, 1990 William F. Jolitz.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * Copyright (c) 2007, 2018 The FreeBSD Foundation
7 * Portions of this software were developed by A. Joseph Koshy under
8 * sponsorship from the FreeBSD Foundation and Google, Inc.
9 * Portions of this software were developed by Konstantin Belousov
10 * <kib@FreeBSD.org> under sponsorship from the FreeBSD Foundation.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 #include "opt_atpic.h"
41 #include "opt_hwpmc_hooks.h"
45 #include <machine/psl.h>
46 #include <machine/asmacros.h>
47 #include <machine/trap.h>
51 .globl dtrace_invop_jump_addr
53 .type dtrace_invop_jump_addr, @object
54 .size dtrace_invop_jump_addr, 4
55 dtrace_invop_jump_addr:
57 .globl dtrace_invop_calltrap_addr
59 .type dtrace_invop_calltrap_addr, @object
60 .size dtrace_invop_calltrap_addr, 4
61 dtrace_invop_calltrap_addr:
65 ENTRY(start_exceptions)
67 tramp_idleptd: .long 0
69 /*****************************************************************************/
71 /*****************************************************************************/
73 * Trap and fault vector routines.
75 * All traps are 'interrupt gates', SDT_SYS386IGT. Interrupts are disabled
76 * by hardware to not allow interrupts until code switched to the kernel
77 * address space and the kernel thread stack.
79 * The cpu will push a certain amount of state onto the kernel stack for
80 * the current process. The amount of state depends on the type of trap
81 * and whether the trap crossed rings or not. See i386/include/frame.h.
82 * At the very least the current EFLAGS (status register, which includes
83 * the interrupt disable state prior to the trap), the code segment register,
84 * and the return instruction pointer are pushed by the cpu. The cpu
85 * will also push an 'error' code for certain traps. We push a dummy
86 * error code for those traps where the cpu doesn't in order to maintain
87 * a consistent frame. We also push a contrived 'trap number'.
89 * The cpu does not push the general registers, we must do that, and we
90 * must restore them prior to calling 'iret'. The cpu adjusts the %cs and
91 * %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we
92 * must load them with appropriate values for supervisor mode operation.
94 * This code is not executed at the linked address, it is copied to the
95 * trampoline area. As the consequence, all code there and in included files
102 #define TRAP(a) pushl $(a) ; jmp alltraps
105 pushl $0; TRAP(T_DIVIDE)
107 pushl $0; TRAP(T_BPTFLT)
109 pushl $0; TRAP(T_DTRACE_RET)
111 pushl $0; TRAP(T_OFLOW)
113 pushl $0; TRAP(T_BOUND)
114 #ifndef KDTRACE_HOOKS
116 pushl $0; TRAP(T_PRIVINFLT)
119 pushl $0; TRAP(T_DNA)
121 pushl $0; TRAP(T_FPOPFLT)
134 cmpl $PMAP_TRM_MIN_ADDRESS, TF_EIP-TF_ERR(%esp)
137 movl %edx, TF_EIP-TF_ERR(%esp)
144 pushl $0; TRAP(T_RESERVED)
146 pushl $0; TRAP(T_ARITHTRAP)
150 pushl $0; TRAP(T_XMMFLT)
153 * All traps except ones for syscalls or invalid segment,
154 * jump to alltraps. If
155 * interrupts were enabled when the trap occurred, then interrupts
156 * are enabled now if the trap was through a trap gate, else
157 * disabled if the trap was through an interrupt gate. Note that
158 * int0x80_syscall is a trap gate. Interrupt gates are used by
159 * page faults, non-maskable interrupts, debug and breakpoint
164 .type alltraps,@function
167 alltraps_with_regs_pushed:
171 FAKE_MCOUNT(TF_EIP(%esp))
179 * Return via doreti to handle ASTs.
185 .type irettraps,@function
187 testl $PSL_VM, TF_EFLAGS-TF_TRAPNO(%esp)
189 testb $SEL_RPL_MASK, TF_CS-TF_TRAPNO(%esp)
194 * The special case there is the kernel mode with user %cr3 and
195 * trampoline stack. We need to copy both current frame and the
196 * hardware portion of the frame we tried to return to, to the
197 * normal stack. This logic must follow the stack unwind order
205 leal (doreti_iret - 1b)(%ebx), %edx
206 cmpl %edx, TF_EIP(%esp)
208 movl $(2 * TF_SZ - TF_EIP), %ecx
210 2: leal (doreti_popl_ds - 1b)(%ebx), %edx
211 cmpl %edx, TF_EIP(%esp)
213 movl $(2 * TF_SZ - TF_DS), %ecx
215 3: leal (doreti_popl_es - 1b)(%ebx), %edx
216 cmpl %edx, TF_EIP(%esp)
218 movl $(2 * TF_SZ - TF_ES), %ecx
220 4: leal (doreti_popl_fs - 1b)(%ebx), %edx
221 cmpl %edx, TF_EIP(%esp)
223 movl $(2 * TF_SZ - TF_FS), %ecx
225 /* kernel mode, normal */
226 5: FAKE_MCOUNT(TF_EIP(%esp))
228 6: cmpl $PMAP_TRM_MIN_ADDRESS, %esp /* trampoline stack ? */
229 jb 5b /* if not, no need to change stacks */
230 movl (tramp_idleptd - 1b)(%ebx), %eax
232 movl PCPU(KESP0), %edx
238 FAKE_MCOUNT(TF_EIP(%esp))
242 * Privileged instruction fault.
248 * Check if this is a user fault. If so, just handle it as a normal
251 testl $PSL_VM, 8(%esp) /* and vm86 mode. */
253 cmpl $GSEL_KPL, 4(%esp) /* Check the code segment */
257 * Check if a DTrace hook is registered. The trampoline cannot
260 cmpl $0, dtrace_invop_jump_addr
264 * This is a kernel instruction fault that might have been caused
265 * by a DTrace provider.
271 * Set our jump address for the jump back in the event that
272 * the exception wasn't caused by DTrace at all.
274 movl $norm_ill, dtrace_invop_calltrap_addr
276 /* Jump to the code hooked in by DTrace. */
277 jmpl *dtrace_invop_jump_addr
280 * Process the instruction fault in the normal way.
289 * See comment in the handler for the kernel case T_TRCTRAP in trap.c.
290 * The exception handler must be ready to execute with wrong %cr3.
291 * We save original %cr3 in frame->tf_err, similarly to NMI and MCE
301 movl %eax, TF_ERR(%esp)
304 movl (tramp_idleptd - 1b)(%eax), %eax
306 FAKE_MCOUNT(TF_EIP(%esp))
307 testl $PSL_VM, TF_EFLAGS(%esp)
309 testb $SEL_RPL_MASK,TF_CS(%esp)
313 movl $handle_ibrs_entry,%eax
319 movl $T_RESERVED, TF_TRAPNO(%esp)
336 * Save %cr3 into tf_err. There is no good place to put it.
337 * Always reload %cr3, since we might have interrupted the
338 * kernel entry or exit.
339 * Do not switch to the thread kernel stack, otherwise we might
340 * obliterate the previous context partially copied from the
342 * Do not re-enable IBRS, there is no good place to store
343 * previous state if we come from the kernel.
346 movl %eax, TF_ERR(%esp)
349 movl (tramp_idleptd - 1b)(%eax), %eax
351 FAKE_MCOUNT(TF_EIP(%esp))
355 * Trap gate entry for syscalls (int 0x80).
356 * This is used by FreeBSD ELF executables, "new" a.out executables, and all
359 * Even though the name says 'int0x80', this is actually a trap gate, not an
360 * interrupt gate. Thus interrupts are enabled on entry just as they are for
364 IDTVEC(int0x80_syscall)
365 pushl $2 /* sizeof "int 0x80" */
366 pushl $0 /* tf_trapno */
371 movl $handle_ibrs_entry,%eax
374 FAKE_MCOUNT(TF_EIP(%esp))
382 ENTRY(fork_trampoline)
383 pushl %esp /* trapframe pointer */
384 pushl %ebx /* arg1 */
385 pushl %esi /* function */
386 movl $fork_exit, %eax
389 /* cut from syscall */
392 * Return via doreti to handle ASTs.
399 * To efficiently implement classification of trap and interrupt handlers
400 * for profiling, there must be only trap handlers between the labels btrap
401 * and bintr, and only interrupt handlers between the labels bintr and
402 * eintr. This is implemented (partly) by including files that contain
403 * some of the handlers. Before including the files, set up a normal asm
404 * environment so that the included files doen't need to know that they are
415 #include <i386/i386/atpic_vector.s>
418 #if defined(DEV_APIC) && defined(DEV_ATPIC)
426 #include <i386/i386/apic_vector.s>
433 #include <i386/i386/vm86bios.s>
438 #include <i386/i386/copyout_fast.s>
441 * void doreti(struct trapframe)
443 * Handle return from interrupts, traps and syscalls.
447 .type doreti,@function
450 FAKE_MCOUNT($bintr) /* init "from" bintr -> doreti */
453 * Check if ASTs can be handled now. ASTs cannot be safely
454 * processed when returning from an NMI.
456 cmpb $T_NMI,TF_TRAPNO(%esp)
463 * PSL_VM must be checked first since segment registers only
464 * have an RPL in non-VM86 mode.
465 * ASTs can not be handled now if we are in a vm86 call.
467 testl $PSL_VM,TF_EFLAGS(%esp)
469 movl PCPU(CURPCB),%ecx
470 testl $PCB_VM86CALL,PCB_FLAGS(%ecx)
475 testb $SEL_RPL_MASK,TF_CS(%esp) /* are we returning to user mode? */
476 jz doreti_exit /* can't handle ASTs now if not */
480 * Check for ASTs atomically with returning. Disabling CPU
481 * interrupts provides sufficient locking even in the SMP case,
482 * since we will be informed of any new ASTs by an IPI.
485 movl PCPU(CURTHREAD),%eax
486 testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%eax)
489 pushl %esp /* pass a pointer to the trapframe */
496 * doreti_exit: pop registers, iret.
498 * The segment register pop is a special case, since it may
499 * fault if (for example) a sigreturn specifies bad segment
500 * registers. The fault is handled in trap.c.
505 cmpl $T_NMI, TF_TRAPNO(%esp)
507 cmpl $T_MCHK, TF_TRAPNO(%esp)
509 cmpl $T_TRCTRAP, TF_TRAPNO(%esp)
512 testl $PSL_VM,TF_EFLAGS(%esp)
513 jz 1f /* PCB_VM86CALL is not set */
514 addl $VM86_STACK_SPACE, %ecx
516 1: testl $SEL_RPL_MASK, TF_CS(%esp)
518 2: movl $handle_ibrs_exit,%eax
519 pushl %ecx /* preserve enough call-used regs */
523 movl PCPU(TRAMPSTK), %edx
528 movl PCPU(CURPCB),%eax
529 movl PCB_CR3(%eax), %eax
532 .globl doreti_popl_fs
535 .globl doreti_popl_es
538 .globl doreti_popl_ds
548 movl TF_ERR(%esp), %eax
553 * doreti_iret_fault and friends. Alternative return code for
554 * the case where we get a fault in the doreti_exit code
555 * above. trap() (i386/i386/trap.c) catches this specific
556 * case, and continues in the corresponding place in the code
559 * If the fault occured during return to usermode, we recreate
560 * the trap frame and call trap() to send a signal. Otherwise
561 * the kernel was tricked into fault by attempt to restore invalid
562 * usermode segment selectors on return from nested fault or
563 * interrupt, where interrupted kernel entry code not yet loaded
564 * kernel selectors. In the latter case, emulate iret and zero
565 * the invalid selector.
568 .globl doreti_iret_fault
570 pushl $0 /* tf_err */
571 pushl $0 /* tf_trapno XXXKIB: provide more useful value ? */
575 .globl doreti_popl_ds_fault
576 doreti_popl_ds_fault:
577 testb $SEL_RPL_MASK,TF_CS-TF_DS(%esp)
578 jz doreti_popl_ds_kfault
581 .globl doreti_popl_es_fault
582 doreti_popl_es_fault:
583 testb $SEL_RPL_MASK,TF_CS-TF_ES(%esp)
584 jz doreti_popl_es_kfault
587 .globl doreti_popl_fs_fault
588 doreti_popl_fs_fault:
589 testb $SEL_RPL_MASK,TF_CS-TF_FS(%esp)
590 jz doreti_popl_fs_kfault
591 movl $0,TF_ERR(%esp) /* XXX should be the error code */
592 movl $T_PROTFLT,TF_TRAPNO(%esp)
596 doreti_popl_ds_kfault:
599 doreti_popl_es_kfault:
602 doreti_popl_fs_kfault:
609 * Since we are returning from an NMI, check if the current trap
610 * was from user mode and if so whether the current thread
611 * needs a user call chain capture.
613 testl $PSL_VM, TF_EFLAGS(%esp)
615 testb $SEL_RPL_MASK,TF_CS(%esp)
617 movl PCPU(CURTHREAD),%eax /* curthread present? */
620 testl $TDP_CALLCHAIN,TD_PFLAGS(%eax) /* flagged for capture? */
623 * Switch to thread stack. Reset tf_trapno to not indicate NMI,
624 * to cause normal userspace exit.
626 movl $T_RESERVED, TF_TRAPNO(%esp)
629 * Take the processor out of NMI mode by executing a fake "iret".
635 leal (outofnmi-1b)(%eax),%eax
640 * Call the callchain capture hook after turning interrupts back on.
645 pushl %esp /* frame pointer */
646 pushl $PMC_FN_USER_CALLCHAIN /* command */
647 movl PCPU(CURTHREAD),%eax
648 pushl %eax /* curthread */
655 ENTRY(end_exceptions)