2 * Copyright (c) 1989, 1990 William F. Jolitz.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * Copyright (c) 2007, 2018 The FreeBSD Foundation
7 * Portions of this software were developed by A. Joseph Koshy under
8 * sponsorship from the FreeBSD Foundation and Google, Inc.
9 * Portions of this software were developed by Konstantin Belousov
10 * <kib@FreeBSD.org> under sponsorship from the FreeBSD Foundation.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 #include "opt_atpic.h"
41 #include "opt_hwpmc_hooks.h"
45 #include <machine/psl.h>
46 #include <machine/asmacros.h>
47 #include <machine/trap.h>
51 .globl dtrace_invop_jump_addr
53 .type dtrace_invop_jump_addr, @object
54 .size dtrace_invop_jump_addr, 4
55 dtrace_invop_jump_addr:
57 .globl dtrace_invop_calltrap_addr
59 .type dtrace_invop_calltrap_addr, @object
60 .size dtrace_invop_calltrap_addr, 4
61 dtrace_invop_calltrap_addr:
65 ENTRY(start_exceptions)
67 tramp_idleptd: .long 0
69 /*****************************************************************************/
71 /*****************************************************************************/
73 * Trap and fault vector routines.
75 * All traps are 'interrupt gates', SDT_SYS386IGT. Interrupts are disabled
76 * by hardware to not allow interrupts until code switched to the kernel
77 * address space and the kernel thread stack.
79 * The cpu will push a certain amount of state onto the kernel stack for
80 * the current process. The amount of state depends on the type of trap
81 * and whether the trap crossed rings or not. See i386/include/frame.h.
82 * At the very least the current EFLAGS (status register, which includes
83 * the interrupt disable state prior to the trap), the code segment register,
84 * and the return instruction pointer are pushed by the cpu. The cpu
85 * will also push an 'error' code for certain traps. We push a dummy
86 * error code for those traps where the cpu doesn't in order to maintain
87 * a consistent frame. We also push a contrived 'trap number'.
89 * The cpu does not push the general registers, we must do that, and we
90 * must restore them prior to calling 'iret'. The cpu adjusts the %cs and
91 * %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we
92 * must load them with appropriate values for supervisor mode operation.
94 * This code is not executed at the linked address, it is copied to the
95 * trampoline area. As the consequence, all code there and in included files
102 #define TRAP(a) pushl $(a) ; jmp alltraps
105 pushl $0; TRAP(T_DIVIDE)
107 pushl $0; TRAP(T_BPTFLT)
109 pushl $0; TRAP(T_DTRACE_RET)
111 pushl $0; TRAP(T_OFLOW)
113 pushl $0; TRAP(T_BOUND)
114 #ifndef KDTRACE_HOOKS
116 pushl $0; TRAP(T_PRIVINFLT)
119 pushl $0; TRAP(T_DNA)
121 pushl $0; TRAP(T_FPOPFLT)
134 testl $PSL_VM, TF_EFLAGS-TF_ERR(%esp)
136 testb $SEL_RPL_MASK, TF_CS-TF_ERR(%esp)
138 cmpl $PMAP_TRM_MIN_ADDRESS, TF_EIP-TF_ERR(%esp)
141 movl %edx, TF_EIP-TF_ERR(%esp)
148 pushl $0; TRAP(T_RESERVED)
150 pushl $0; TRAP(T_ARITHTRAP)
154 pushl $0; TRAP(T_XMMFLT)
157 * All traps except ones for syscalls or invalid segment,
158 * jump to alltraps. If
159 * interrupts were enabled when the trap occurred, then interrupts
160 * are enabled now if the trap was through a trap gate, else
161 * disabled if the trap was through an interrupt gate. Note that
162 * int0x80_syscall is a trap gate. Interrupt gates are used by
163 * page faults, non-maskable interrupts, debug and breakpoint
168 .type alltraps,@function
171 alltraps_with_regs_pushed:
175 FAKE_MCOUNT(TF_EIP(%esp))
183 * Return via doreti to handle ASTs.
189 .type irettraps,@function
191 testl $PSL_VM, TF_EFLAGS-TF_TRAPNO(%esp)
193 testb $SEL_RPL_MASK, TF_CS-TF_TRAPNO(%esp)
198 * The special case there is the kernel mode with user %cr3 and
199 * trampoline stack. We need to copy both current frame and the
200 * hardware portion of the frame we tried to return to, to the
201 * normal stack. This logic must follow the stack unwind order
209 leal (doreti_iret - 1b)(%ebx), %edx
210 cmpl %edx, TF_EIP(%esp)
212 movl $(2 * TF_SZ - TF_EIP), %ecx
214 2: leal (doreti_popl_ds - 1b)(%ebx), %edx
215 cmpl %edx, TF_EIP(%esp)
217 movl $(2 * TF_SZ - TF_DS), %ecx
219 3: leal (doreti_popl_es - 1b)(%ebx), %edx
220 cmpl %edx, TF_EIP(%esp)
222 movl $(2 * TF_SZ - TF_ES), %ecx
224 4: leal (doreti_popl_fs - 1b)(%ebx), %edx
225 cmpl %edx, TF_EIP(%esp)
227 movl $(2 * TF_SZ - TF_FS), %ecx
229 /* kernel mode, normal */
230 5: FAKE_MCOUNT(TF_EIP(%esp))
232 6: cmpl $PMAP_TRM_MIN_ADDRESS, %esp /* trampoline stack ? */
233 jb 5b /* if not, no need to change stacks */
234 movl (tramp_idleptd - 1b)(%ebx), %eax
236 movl PCPU(KESP0), %edx
242 FAKE_MCOUNT(TF_EIP(%esp))
246 * Privileged instruction fault.
252 * Check if this is a user fault. If so, just handle it as a normal
255 testl $PSL_VM, 8(%esp) /* and vm86 mode. */
257 cmpl $GSEL_KPL, 4(%esp) /* Check the code segment */
261 * Check if a DTrace hook is registered. The trampoline cannot
264 cmpl $0, dtrace_invop_jump_addr
268 * This is a kernel instruction fault that might have been caused
269 * by a DTrace provider.
275 * Set our jump address for the jump back in the event that
276 * the exception wasn't caused by DTrace at all.
278 movl $norm_ill, dtrace_invop_calltrap_addr
280 /* Jump to the code hooked in by DTrace. */
281 jmpl *dtrace_invop_jump_addr
284 * Process the instruction fault in the normal way.
293 * See comment in the handler for the kernel case T_TRCTRAP in trap.c.
294 * The exception handler must be ready to execute with wrong %cr3.
295 * We save original %cr3 in frame->tf_err, similarly to NMI and MCE
305 movl %eax, TF_ERR(%esp)
308 movl (tramp_idleptd - 1b)(%eax), %eax
310 FAKE_MCOUNT(TF_EIP(%esp))
311 testl $PSL_VM, TF_EFLAGS(%esp)
313 testb $SEL_RPL_MASK,TF_CS(%esp)
317 movl $handle_ibrs_entry,%eax
323 movl $T_RESERVED, TF_TRAPNO(%esp)
340 * Save %cr3 into tf_err. There is no good place to put it.
341 * Always reload %cr3, since we might have interrupted the
342 * kernel entry or exit.
343 * Do not switch to the thread kernel stack, otherwise we might
344 * obliterate the previous context partially copied from the
346 * Do not re-enable IBRS, there is no good place to store
347 * previous state if we come from the kernel.
350 movl %eax, TF_ERR(%esp)
353 movl (tramp_idleptd - 1b)(%eax), %eax
355 FAKE_MCOUNT(TF_EIP(%esp))
359 * Trap gate entry for syscalls (int 0x80).
360 * This is used by FreeBSD ELF executables, "new" a.out executables, and all
363 * Even though the name says 'int0x80', this is actually a trap gate, not an
364 * interrupt gate. Thus interrupts are enabled on entry just as they are for
368 IDTVEC(int0x80_syscall)
369 pushl $2 /* sizeof "int 0x80" */
370 pushl $0 /* tf_trapno */
375 movl $handle_ibrs_entry,%eax
378 FAKE_MCOUNT(TF_EIP(%esp))
386 ENTRY(fork_trampoline)
387 pushl %esp /* trapframe pointer */
388 pushl %ebx /* arg1 */
389 pushl %esi /* function */
390 movl $fork_exit, %eax
393 /* cut from syscall */
396 * Return via doreti to handle ASTs.
403 * To efficiently implement classification of trap and interrupt handlers
404 * for profiling, there must be only trap handlers between the labels btrap
405 * and bintr, and only interrupt handlers between the labels bintr and
406 * eintr. This is implemented (partly) by including files that contain
407 * some of the handlers. Before including the files, set up a normal asm
408 * environment so that the included files doen't need to know that they are
419 #include <i386/i386/atpic_vector.s>
422 #if defined(DEV_APIC) && defined(DEV_ATPIC)
430 #include <i386/i386/apic_vector.s>
437 #include <i386/i386/vm86bios.s>
442 #include <i386/i386/copyout_fast.s>
445 * void doreti(struct trapframe)
447 * Handle return from interrupts, traps and syscalls.
451 .type doreti,@function
454 FAKE_MCOUNT($bintr) /* init "from" bintr -> doreti */
457 * Check if ASTs can be handled now. ASTs cannot be safely
458 * processed when returning from an NMI.
460 cmpb $T_NMI,TF_TRAPNO(%esp)
467 * PSL_VM must be checked first since segment registers only
468 * have an RPL in non-VM86 mode.
469 * ASTs can not be handled now if we are in a vm86 call.
471 testl $PSL_VM,TF_EFLAGS(%esp)
473 movl PCPU(CURPCB),%ecx
474 testl $PCB_VM86CALL,PCB_FLAGS(%ecx)
479 testb $SEL_RPL_MASK,TF_CS(%esp) /* are we returning to user mode? */
480 jz doreti_exit /* can't handle ASTs now if not */
484 * Check for ASTs atomically with returning. Disabling CPU
485 * interrupts provides sufficient locking even in the SMP case,
486 * since we will be informed of any new ASTs by an IPI.
489 movl PCPU(CURTHREAD),%eax
490 testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%eax)
493 pushl %esp /* pass a pointer to the trapframe */
500 * doreti_exit: pop registers, iret.
502 * The segment register pop is a special case, since it may
503 * fault if (for example) a sigreturn specifies bad segment
504 * registers. The fault is handled in trap.c.
509 cmpl $T_NMI, TF_TRAPNO(%esp)
511 cmpl $T_MCHK, TF_TRAPNO(%esp)
513 cmpl $T_TRCTRAP, TF_TRAPNO(%esp)
516 testl $PSL_VM,TF_EFLAGS(%esp)
517 jz 1f /* PCB_VM86CALL is not set */
518 addl $VM86_STACK_SPACE, %ecx
520 1: testl $SEL_RPL_MASK, TF_CS(%esp)
522 2: movl $handle_ibrs_exit,%eax
523 pushl %ecx /* preserve enough call-used regs */
525 movl mds_handler,%eax
529 movl PCPU(TRAMPSTK), %edx
534 movl PCPU(CURPCB),%eax
535 movl PCB_CR3(%eax), %eax
538 .globl doreti_popl_fs
541 .globl doreti_popl_es
544 .globl doreti_popl_ds
554 movl TF_ERR(%esp), %eax
559 * doreti_iret_fault and friends. Alternative return code for
560 * the case where we get a fault in the doreti_exit code
561 * above. trap() (i386/i386/trap.c) catches this specific
562 * case, and continues in the corresponding place in the code
565 * If the fault occured during return to usermode, we recreate
566 * the trap frame and call trap() to send a signal. Otherwise
567 * the kernel was tricked into fault by attempt to restore invalid
568 * usermode segment selectors on return from nested fault or
569 * interrupt, where interrupted kernel entry code not yet loaded
570 * kernel selectors. In the latter case, emulate iret and zero
571 * the invalid selector.
574 .globl doreti_iret_fault
576 pushl $0 /* tf_err */
577 pushl $0 /* tf_trapno XXXKIB: provide more useful value ? */
581 .globl doreti_popl_ds_fault
582 doreti_popl_ds_fault:
583 testb $SEL_RPL_MASK,TF_CS-TF_DS(%esp)
584 jz doreti_popl_ds_kfault
587 .globl doreti_popl_es_fault
588 doreti_popl_es_fault:
589 testb $SEL_RPL_MASK,TF_CS-TF_ES(%esp)
590 jz doreti_popl_es_kfault
593 .globl doreti_popl_fs_fault
594 doreti_popl_fs_fault:
595 testb $SEL_RPL_MASK,TF_CS-TF_FS(%esp)
596 jz doreti_popl_fs_kfault
597 movl $0,TF_ERR(%esp) /* XXX should be the error code */
598 movl $T_PROTFLT,TF_TRAPNO(%esp)
602 doreti_popl_ds_kfault:
605 doreti_popl_es_kfault:
608 doreti_popl_fs_kfault:
615 * Since we are returning from an NMI, check if the current trap
616 * was from user mode and if so whether the current thread
617 * needs a user call chain capture.
619 testl $PSL_VM, TF_EFLAGS(%esp)
621 testb $SEL_RPL_MASK,TF_CS(%esp)
623 movl PCPU(CURTHREAD),%eax /* curthread present? */
626 testl $TDP_CALLCHAIN,TD_PFLAGS(%eax) /* flagged for capture? */
629 * Switch to thread stack. Reset tf_trapno to not indicate NMI,
630 * to cause normal userspace exit.
632 movl $T_RESERVED, TF_TRAPNO(%esp)
635 * Take the processor out of NMI mode by executing a fake "iret".
641 leal (outofnmi-1b)(%eax),%eax
646 * Call the callchain capture hook after turning interrupts back on.
651 pushl %esp /* frame pointer */
652 pushl $PMC_FN_USER_CALLCHAIN /* command */
653 movl PCPU(CURTHREAD),%eax
654 pushl %eax /* curthread */
661 ENTRY(end_exceptions)