2 * Copyright (c) 1999 Michael Smith <msmith@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/kernel.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/memrange.h>
36 #include <sys/sysctl.h>
38 #include <machine/cputypes.h>
39 #include <machine/md_var.h>
40 #include <machine/specialreg.h>
43 * i686 memory range operations
45 * This code will probably be impenetrable without reference to the
46 * Intel Pentium Pro documentation.
49 static char *mem_owner_bios = "BIOS";
51 #define MR686_FIXMTRR (1<<0)
53 #define mrwithin(mr, a) \
54 (((a) >= (mr)->mr_base) && ((a) < ((mr)->mr_base + (mr)->mr_len)))
55 #define mroverlap(mra, mrb) \
56 (mrwithin(mra, mrb->mr_base) || mrwithin(mrb, mra->mr_base))
58 #define mrvalid(base, len) \
59 ((!(base & ((1 << 12) - 1))) && /* base is multiple of 4k */ \
60 ((len) >= (1 << 12)) && /* length is >= 4k */ \
61 powerof2((len)) && /* ... and power of two */ \
62 !((base) & ((len) - 1))) /* range is not discontiuous */
64 #define mrcopyflags(curr, new) \
65 (((curr) & ~MDF_ATTRMASK) | ((new) & MDF_ATTRMASK))
67 static int mtrrs_disabled;
68 SYSCTL_INT(_machdep, OID_AUTO, disable_mtrrs, CTLFLAG_RDTUN,
69 &mtrrs_disabled, 0, "Disable i686 MTRRs.");
71 static void i686_mrinit(struct mem_range_softc *sc);
72 static int i686_mrset(struct mem_range_softc *sc,
73 struct mem_range_desc *mrd, int *arg);
74 static void i686_mrAPinit(struct mem_range_softc *sc);
75 static void i686_mrreinit(struct mem_range_softc *sc);
77 static struct mem_range_ops i686_mrops = {
84 /* XXX for AP startup hook */
85 static u_int64_t mtrrcap, mtrrdef;
87 /* The bitmask for the PhysBase and PhysMask fields of the variable MTRRs. */
88 static u_int64_t mtrr_physmask;
90 static struct mem_range_desc *mem_range_match(struct mem_range_softc *sc,
91 struct mem_range_desc *mrd);
92 static void i686_mrfetch(struct mem_range_softc *sc);
93 static int i686_mtrrtype(int flags);
94 static int i686_mrt2mtrr(int flags, int oldval);
95 static int i686_mtrrconflict(int flag1, int flag2);
96 static void i686_mrstore(struct mem_range_softc *sc);
97 static void i686_mrstoreone(void *arg);
98 static struct mem_range_desc *i686_mtrrfixsearch(struct mem_range_softc *sc,
100 static int i686_mrsetlow(struct mem_range_softc *sc,
101 struct mem_range_desc *mrd, int *arg);
102 static int i686_mrsetvariable(struct mem_range_softc *sc,
103 struct mem_range_desc *mrd, int *arg);
105 /* i686 MTRR type to memory range type conversion */
106 static int i686_mtrrtomrt[] = {
116 #define MTRRTOMRTLEN (sizeof(i686_mtrrtomrt) / sizeof(i686_mtrrtomrt[0]))
119 i686_mtrr2mrt(int val)
122 if (val < 0 || val >= MTRRTOMRTLEN)
123 return (MDF_UNKNOWN);
124 return (i686_mtrrtomrt[val]);
128 * i686 MTRR conflicts. Writeback and uncachable may overlap.
131 i686_mtrrconflict(int flag1, int flag2)
134 flag1 &= MDF_ATTRMASK;
135 flag2 &= MDF_ATTRMASK;
136 if (flag1 == flag2 ||
137 (flag1 == MDF_WRITEBACK && flag2 == MDF_UNCACHEABLE) ||
138 (flag2 == MDF_WRITEBACK && flag1 == MDF_UNCACHEABLE))
144 * Look for an exactly-matching range.
146 static struct mem_range_desc *
147 mem_range_match(struct mem_range_softc *sc, struct mem_range_desc *mrd)
149 struct mem_range_desc *cand;
152 for (i = 0, cand = sc->mr_desc; i < sc->mr_ndesc; i++, cand++)
153 if ((cand->mr_base == mrd->mr_base) &&
154 (cand->mr_len == mrd->mr_len))
160 * Fetch the current mtrr settings from the current CPU (assumed to
161 * all be in sync in the SMP case). Note that if we are here, we
162 * assume that MTRRs are enabled, and we may or may not have fixed
166 i686_mrfetch(struct mem_range_softc *sc)
168 struct mem_range_desc *mrd;
174 /* Get fixed-range MTRRs. */
175 if (sc->mr_cap & MR686_FIXMTRR) {
176 msr = MSR_MTRR64kBase;
177 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
179 for (j = 0; j < 8; j++, mrd++) {
181 (mrd->mr_flags & ~MDF_ATTRMASK) |
182 i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
183 if (mrd->mr_owner[0] == 0)
184 strcpy(mrd->mr_owner, mem_owner_bios);
188 msr = MSR_MTRR16kBase;
189 for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
191 for (j = 0; j < 8; j++, mrd++) {
193 (mrd->mr_flags & ~MDF_ATTRMASK) |
194 i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
195 if (mrd->mr_owner[0] == 0)
196 strcpy(mrd->mr_owner, mem_owner_bios);
200 msr = MSR_MTRR4kBase;
201 for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
203 for (j = 0; j < 8; j++, mrd++) {
205 (mrd->mr_flags & ~MDF_ATTRMASK) |
206 i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
207 if (mrd->mr_owner[0] == 0)
208 strcpy(mrd->mr_owner, mem_owner_bios);
214 /* Get remainder which must be variable MTRRs. */
215 msr = MSR_MTRRVarBase;
216 for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
218 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
219 i686_mtrr2mrt(msrv & MTRR_PHYSBASE_TYPE);
220 mrd->mr_base = msrv & mtrr_physmask;
221 msrv = rdmsr(msr + 1);
222 mrd->mr_flags = (msrv & MTRR_PHYSMASK_VALID) ?
223 (mrd->mr_flags | MDF_ACTIVE) :
224 (mrd->mr_flags & ~MDF_ACTIVE);
226 /* Compute the range from the mask. Ick. */
227 mrd->mr_len = (~(msrv & mtrr_physmask) &
228 (mtrr_physmask | 0xfffLL)) + 1;
229 if (!mrvalid(mrd->mr_base, mrd->mr_len))
230 mrd->mr_flags |= MDF_BOGUS;
232 /* If unclaimed and active, must be the BIOS. */
233 if ((mrd->mr_flags & MDF_ACTIVE) && (mrd->mr_owner[0] == 0))
234 strcpy(mrd->mr_owner, mem_owner_bios);
239 * Return the MTRR memory type matching a region's flags
242 i686_mtrrtype(int flags)
246 flags &= MDF_ATTRMASK;
248 for (i = 0; i < MTRRTOMRTLEN; i++) {
249 if (i686_mtrrtomrt[i] == MDF_UNKNOWN)
251 if (flags == i686_mtrrtomrt[i])
258 i686_mrt2mtrr(int flags, int oldval)
262 if ((val = i686_mtrrtype(flags)) == -1)
263 return (oldval & 0xff);
268 * Update running CPU(s) MTRRs to match the ranges in the descriptor
271 * XXX Must be called with interrupts enabled.
274 i686_mrstore(struct mem_range_softc *sc)
278 * We should use ipi_all_but_self() to call other CPUs into a
279 * locking gate, then call a target function to do this work.
280 * The "proper" solution involves a generalised locking gate
281 * implementation, not ready yet.
283 smp_rendezvous(NULL, i686_mrstoreone, NULL, sc);
285 disable_intr(); /* disable interrupts */
292 * Update the current CPU's MTRRs with those represented in the
293 * descriptor list. Note that we do this wholesale rather than just
294 * stuffing one entry; this is simpler (but slower, of course).
297 i686_mrstoreone(void *arg)
299 struct mem_range_softc *sc = arg;
300 struct mem_range_desc *mrd;
301 u_int64_t omsrv, msrv;
311 load_cr4(cr4 & ~CR4_PGE);
313 /* Disable caches (CD = 1, NW = 0). */
315 load_cr0((cr0 & ~CR0_NW) | CR0_CD);
317 /* Flushes caches and TLBs. */
321 /* Disable MTRRs (E = 0). */
322 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRR_DEF_ENABLE);
324 /* Set fixed-range MTRRs. */
325 if (sc->mr_cap & MR686_FIXMTRR) {
326 msr = MSR_MTRR64kBase;
327 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
330 for (j = 7; j >= 0; j--) {
332 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
338 msr = MSR_MTRR16kBase;
339 for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
342 for (j = 7; j >= 0; j--) {
344 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
350 msr = MSR_MTRR4kBase;
351 for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
354 for (j = 7; j >= 0; j--) {
356 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
364 /* Set remainder which must be variable MTRRs. */
365 msr = MSR_MTRRVarBase;
366 for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
367 /* base/type register */
369 if (mrd->mr_flags & MDF_ACTIVE) {
370 msrv = mrd->mr_base & mtrr_physmask;
371 msrv |= i686_mrt2mtrr(mrd->mr_flags, omsrv);
377 /* mask/active register */
378 if (mrd->mr_flags & MDF_ACTIVE) {
379 msrv = MTRR_PHYSMASK_VALID |
380 (~(mrd->mr_len - 1) & mtrr_physmask);
384 wrmsr(msr + 1, msrv);
387 /* Flush caches and TLBs. */
392 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_DEF_ENABLE);
394 /* Restore caches and PGE. */
402 * Hunt for the fixed MTRR referencing (addr)
404 static struct mem_range_desc *
405 i686_mtrrfixsearch(struct mem_range_softc *sc, u_int64_t addr)
407 struct mem_range_desc *mrd;
410 for (i = 0, mrd = sc->mr_desc; i < (MTRR_N64K + MTRR_N16K + MTRR_N4K);
412 if ((addr >= mrd->mr_base) &&
413 (addr < (mrd->mr_base + mrd->mr_len)))
419 * Try to satisfy the given range request by manipulating the fixed
420 * MTRRs that cover low memory.
422 * Note that we try to be generous here; we'll bloat the range out to
423 * the next higher/lower boundary to avoid the consumer having to know
424 * too much about the mechanisms here.
426 * XXX note that this will have to be updated when we start supporting
430 i686_mrsetlow(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
432 struct mem_range_desc *first_md, *last_md, *curr_md;
435 if (((first_md = i686_mtrrfixsearch(sc, mrd->mr_base)) == NULL) ||
436 ((last_md = i686_mtrrfixsearch(sc, mrd->mr_base + mrd->mr_len - 1)) == NULL))
439 /* Check that we aren't doing something risky. */
440 if (!(mrd->mr_flags & MDF_FORCE))
441 for (curr_md = first_md; curr_md <= last_md; curr_md++) {
442 if ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN)
446 /* Set flags, clear set-by-firmware flag. */
447 for (curr_md = first_md; curr_md <= last_md; curr_md++) {
448 curr_md->mr_flags = mrcopyflags(curr_md->mr_flags &
449 ~MDF_FIRMWARE, mrd->mr_flags);
450 bcopy(mrd->mr_owner, curr_md->mr_owner, sizeof(mrd->mr_owner));
457 * Modify/add a variable MTRR to satisfy the request.
459 * XXX needs to be updated to properly support "busy" ranges.
462 i686_mrsetvariable(struct mem_range_softc *sc, struct mem_range_desc *mrd,
465 struct mem_range_desc *curr_md, *free_md;
469 * Scan the currently active variable descriptors, look for
470 * one we exactly match (straight takeover) and for possible
471 * accidental overlaps.
473 * Keep track of the first empty variable descriptor in case
474 * we can't perform a takeover.
476 i = (sc->mr_cap & MR686_FIXMTRR) ? MTRR_N64K + MTRR_N16K + MTRR_N4K : 0;
477 curr_md = sc->mr_desc + i;
479 for (; i < sc->mr_ndesc; i++, curr_md++) {
480 if (curr_md->mr_flags & MDF_ACTIVE) {
482 if ((curr_md->mr_base == mrd->mr_base) &&
483 (curr_md->mr_len == mrd->mr_len)) {
485 /* Whoops, owned by someone. */
486 if (curr_md->mr_flags & MDF_BUSY)
489 /* Check that we aren't doing something risky */
490 if (!(mrd->mr_flags & MDF_FORCE) &&
491 ((curr_md->mr_flags & MDF_ATTRMASK) ==
495 /* Ok, just hijack this entry. */
500 /* Non-exact overlap? */
501 if (mroverlap(curr_md, mrd)) {
502 /* Between conflicting region types? */
503 if (i686_mtrrconflict(curr_md->mr_flags,
507 } else if (free_md == NULL) {
512 /* Got somewhere to put it? */
516 /* Set up new descriptor. */
517 free_md->mr_base = mrd->mr_base;
518 free_md->mr_len = mrd->mr_len;
519 free_md->mr_flags = mrcopyflags(MDF_ACTIVE, mrd->mr_flags);
520 bcopy(mrd->mr_owner, free_md->mr_owner, sizeof(mrd->mr_owner));
525 * Handle requests to set memory range attributes by manipulating MTRRs.
528 i686_mrset(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
530 struct mem_range_desc *targ;
534 case MEMRANGE_SET_UPDATE:
536 * Make sure that what's being asked for is even
539 if (!mrvalid(mrd->mr_base, mrd->mr_len) ||
540 i686_mtrrtype(mrd->mr_flags) == -1)
543 #define FIXTOP ((MTRR_N64K * 0x10000) + (MTRR_N16K * 0x4000) + (MTRR_N4K * 0x1000))
545 /* Are the "low memory" conditions applicable? */
546 if ((sc->mr_cap & MR686_FIXMTRR) &&
547 ((mrd->mr_base + mrd->mr_len) <= FIXTOP)) {
548 if ((error = i686_mrsetlow(sc, mrd, arg)) != 0)
551 /* It's time to play with variable MTRRs. */
552 if ((error = i686_mrsetvariable(sc, mrd, arg)) != 0)
557 case MEMRANGE_SET_REMOVE:
558 if ((targ = mem_range_match(sc, mrd)) == NULL)
560 if (targ->mr_flags & MDF_FIXACTIVE)
562 if (targ->mr_flags & MDF_BUSY)
564 targ->mr_flags &= ~MDF_ACTIVE;
565 targ->mr_owner[0] = 0;
572 /* Update the hardware. */
575 /* Refetch to see where we're at. */
581 * Work out how many ranges we support, initialise storage for them,
582 * and fetch the initial settings.
585 i686_mrinit(struct mem_range_softc *sc)
587 struct mem_range_desc *mrd;
589 int i, nmdesc = 0, pabits;
591 mtrrcap = rdmsr(MSR_MTRRcap);
592 mtrrdef = rdmsr(MSR_MTRRdefType);
594 /* For now, bail out if MTRRs are not enabled. */
595 if (!(mtrrdef & MTRR_DEF_ENABLE)) {
597 printf("CPU supports MTRRs but not enabled\n");
600 nmdesc = mtrrcap & MTRR_CAP_VCNT;
602 printf("Pentium Pro MTRR support enabled\n");
605 * Determine the size of the PhysMask and PhysBase fields in
606 * the variable range MTRRs. If the extended CPUID 0x80000008
607 * is present, use that to figure out how many physical
608 * address bits the CPU supports. Otherwise, default to 36
611 if (cpu_exthigh >= 0x80000008) {
612 do_cpuid(0x80000008, regs);
613 pabits = regs[0] & 0xff;
616 mtrr_physmask = ((1ULL << pabits) - 1) & ~0xfffULL;
618 /* If fixed MTRRs supported and enabled. */
619 if ((mtrrcap & MTRR_CAP_FIXED) && (mtrrdef & MTRR_DEF_FIXED_ENABLE)) {
620 sc->mr_cap = MR686_FIXMTRR;
621 nmdesc += MTRR_N64K + MTRR_N16K + MTRR_N4K;
624 sc->mr_desc = malloc(nmdesc * sizeof(struct mem_range_desc), M_MEMDESC,
626 sc->mr_ndesc = nmdesc;
630 /* Populate the fixed MTRR entries' base/length. */
631 if (sc->mr_cap & MR686_FIXMTRR) {
632 for (i = 0; i < MTRR_N64K; i++, mrd++) {
633 mrd->mr_base = i * 0x10000;
634 mrd->mr_len = 0x10000;
635 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
638 for (i = 0; i < MTRR_N16K; i++, mrd++) {
639 mrd->mr_base = i * 0x4000 + 0x80000;
640 mrd->mr_len = 0x4000;
641 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
644 for (i = 0; i < MTRR_N4K; i++, mrd++) {
645 mrd->mr_base = i * 0x1000 + 0xc0000;
646 mrd->mr_len = 0x1000;
647 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
653 * Get current settings, anything set now is considered to
654 * have been set by the firmware. (XXX has something already
659 for (i = 0; i < sc->mr_ndesc; i++, mrd++) {
660 if (mrd->mr_flags & MDF_ACTIVE)
661 mrd->mr_flags |= MDF_FIRMWARE;
666 * Initialise MTRRs on an AP after the BSP has run the init code.
669 i686_mrAPinit(struct mem_range_softc *sc)
673 wrmsr(MSR_MTRRdefType, mtrrdef);
677 * Re-initialise running CPU(s) MTRRs to match the ranges in the descriptor
680 * XXX Must be called with interrupts enabled.
683 i686_mrreinit(struct mem_range_softc *sc)
687 * We should use ipi_all_but_self() to call other CPUs into a
688 * locking gate, then call a target function to do this work.
689 * The "proper" solution involves a generalised locking gate
690 * implementation, not ready yet.
692 smp_rendezvous(NULL, (void *)i686_mrAPinit, NULL, sc);
694 disable_intr(); /* disable interrupts */
701 i686_mem_drvinit(void *unused)
706 if (!(cpu_feature & CPUID_MTRR))
708 if ((cpu_id & 0xf00) != 0x600 && (cpu_id & 0xf00) != 0xf00)
710 switch (cpu_vendor_id) {
711 case CPU_VENDOR_INTEL:
713 case CPU_VENDOR_CENTAUR:
718 mem_range_softc.mr_op = &i686_mrops;
720 SYSINIT(i686memdev, SI_SUB_DRIVERS, SI_ORDER_FIRST, i686_mem_drvinit, NULL);