2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Machine dependent interrupt code for i386. For the i386, we have to
34 * deal with different PICs. Thus, we use the passed in vector to lookup
35 * an interrupt source associated with that vector. The interrupt source
36 * describes which PIC the source belongs to and includes methods to handle
42 #include <sys/param.h>
44 #include <sys/interrupt.h>
46 #include <sys/kernel.h>
48 #include <sys/mutex.h>
51 #include <sys/syslog.h>
52 #include <sys/systm.h>
53 #include <machine/clock.h>
54 #include <machine/intr_machdep.h>
55 #include <machine/smp.h>
60 #define MAX_STRAY_LOG 5
62 typedef void (*mask_fn)(void *);
64 static int intrcnt_index;
65 static struct intsrc *interrupt_sources[NUM_IO_INTS];
66 static struct mtx intr_table_lock;
67 static struct mtx intrcnt_lock;
68 static STAILQ_HEAD(, pic) pics;
71 static int assign_cpu;
74 static int intr_assign_cpu(void *arg, u_char cpu);
75 static void intr_disable_src(void *arg);
76 static void intr_init(void *__dummy);
77 static int intr_pic_registered(struct pic *pic);
78 static void intrcnt_setname(const char *name, int index);
79 static void intrcnt_updatename(struct intsrc *is);
80 static void intrcnt_register(struct intsrc *is);
83 intr_pic_registered(struct pic *pic)
87 STAILQ_FOREACH(p, &pics, pics) {
95 * Register a new interrupt controller (PIC). This is to support suspend
96 * and resume where we suspend/resume controllers rather than individual
97 * sources. This also allows controllers with no active sources (such as
98 * 8259As in a system using the APICs) to participate in suspend and resume.
101 intr_register_pic(struct pic *pic)
105 mtx_lock(&intr_table_lock);
106 if (intr_pic_registered(pic))
109 STAILQ_INSERT_TAIL(&pics, pic, pics);
112 mtx_unlock(&intr_table_lock);
117 * Register a new interrupt source with the global interrupt system.
118 * The global interrupts need to be disabled when this function is
122 intr_register_source(struct intsrc *isrc)
126 KASSERT(intr_pic_registered(isrc->is_pic), ("unregistered PIC"));
127 vector = isrc->is_pic->pic_vector(isrc);
128 if (interrupt_sources[vector] != NULL)
130 error = intr_event_create(&isrc->is_event, isrc, 0, vector,
131 intr_disable_src, (mask_fn)isrc->is_pic->pic_enable_source,
132 (mask_fn)isrc->is_pic->pic_eoi_source, intr_assign_cpu, "irq%d:",
136 mtx_lock(&intr_table_lock);
137 if (interrupt_sources[vector] != NULL) {
138 mtx_unlock(&intr_table_lock);
139 intr_event_destroy(isrc->is_event);
142 intrcnt_register(isrc);
143 interrupt_sources[vector] = isrc;
144 isrc->is_handlers = 0;
145 mtx_unlock(&intr_table_lock);
150 intr_lookup_source(int vector)
153 return (interrupt_sources[vector]);
157 intr_add_handler(const char *name, int vector, driver_filter_t filter,
158 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
163 isrc = intr_lookup_source(vector);
166 error = intr_event_add_handler(isrc->is_event, name, filter, handler,
167 arg, intr_priority(flags), flags, cookiep);
169 mtx_lock(&intr_table_lock);
170 intrcnt_updatename(isrc);
172 if (isrc->is_handlers == 1) {
173 isrc->is_pic->pic_enable_intr(isrc);
174 isrc->is_pic->pic_enable_source(isrc);
176 mtx_unlock(&intr_table_lock);
182 intr_remove_handler(void *cookie)
187 isrc = intr_handler_source(cookie);
188 error = intr_event_remove_handler(cookie);
190 mtx_lock(&intr_table_lock);
192 if (isrc->is_handlers == 0) {
193 isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI);
194 isrc->is_pic->pic_disable_intr(isrc);
196 intrcnt_updatename(isrc);
197 mtx_unlock(&intr_table_lock);
203 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
207 isrc = intr_lookup_source(vector);
210 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
214 intr_disable_src(void *arg)
219 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
223 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
225 struct intr_event *ie;
229 * We count software interrupts when we process them. The
230 * code here follows previous practice, but there's an
231 * argument for counting hardware interrupts when they're
235 PCPU_INC(cnt.v_intr);
240 * XXX: We assume that IRQ 0 is only used for the ISA timer
243 vector = isrc->is_pic->pic_vector(isrc);
248 * For stray interrupts, mask and EOI the source, bump the
249 * stray count, and log the condition.
251 if (intr_event_handle(ie, frame) != 0) {
252 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
253 (*isrc->is_straycount)++;
254 if (*isrc->is_straycount < MAX_STRAY_LOG)
255 log(LOG_ERR, "stray irq%d\n", vector);
256 else if (*isrc->is_straycount == MAX_STRAY_LOG)
258 "too many stray irq %d's: not logging anymore\n",
268 mtx_lock(&intr_table_lock);
269 STAILQ_FOREACH(pic, &pics, pics) {
270 if (pic->pic_resume != NULL)
271 pic->pic_resume(pic);
273 mtx_unlock(&intr_table_lock);
281 mtx_lock(&intr_table_lock);
282 STAILQ_FOREACH(pic, &pics, pics) {
283 if (pic->pic_suspend != NULL)
284 pic->pic_suspend(pic);
286 mtx_unlock(&intr_table_lock);
290 intr_assign_cpu(void *arg, u_char cpu)
297 * Don't do anything during early boot. We will pick up the
298 * assignment once the APs are started.
300 if (assign_cpu && cpu != NOCPU) {
302 mtx_lock(&intr_table_lock);
303 error = isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[cpu]);
304 mtx_unlock(&intr_table_lock);
314 intrcnt_setname(const char *name, int index)
317 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
322 intrcnt_updatename(struct intsrc *is)
325 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
329 intrcnt_register(struct intsrc *is)
331 char straystr[MAXCOMLEN + 1];
333 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
334 mtx_lock_spin(&intrcnt_lock);
335 is->is_index = intrcnt_index;
337 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
338 is->is_pic->pic_vector(is));
339 intrcnt_updatename(is);
340 is->is_count = &intrcnt[is->is_index];
341 intrcnt_setname(straystr, is->is_index + 1);
342 is->is_straycount = &intrcnt[is->is_index + 1];
343 mtx_unlock_spin(&intrcnt_lock);
347 intrcnt_add(const char *name, u_long **countp)
350 mtx_lock_spin(&intrcnt_lock);
351 *countp = &intrcnt[intrcnt_index];
352 intrcnt_setname(name, intrcnt_index);
354 mtx_unlock_spin(&intrcnt_lock);
358 intr_init(void *dummy __unused)
361 intrcnt_setname("???", 0);
364 mtx_init(&intr_table_lock, "intr sources", NULL, MTX_DEF);
365 mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN);
367 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
369 /* Add a description to an active interrupt handler. */
371 intr_describe(u_int vector, void *ih, const char *descr)
376 isrc = intr_lookup_source(vector);
379 error = intr_event_describe_handler(isrc->is_event, ih, descr);
382 intrcnt_updatename(isrc);
388 * Dump data about interrupt handlers
390 DB_SHOW_COMMAND(irqs, db_show_irqs)
392 struct intsrc **isrc;
395 if (strcmp(modif, "v") == 0)
399 isrc = interrupt_sources;
400 for (i = 0; i < NUM_IO_INTS && !db_pager_quit; i++, isrc++)
402 db_dump_intr_event((*isrc)->is_event, verbose);
408 * Support for balancing interrupt sources across CPUs. For now we just
409 * allocate CPUs round-robin.
412 /* The BSP is always a valid target. */
413 static cpumask_t intr_cpus = (1 << 0);
414 static int current_cpu;
417 * Return the CPU that the next interrupt source should use. For now
418 * this just returns the next local APIC according to round-robin.
425 /* Leave all interrupts on the BSP during boot. */
427 return (PCPU_GET(apic_id));
429 mtx_lock_spin(&icu_lock);
430 apic_id = cpu_apic_ids[current_cpu];
433 if (current_cpu > mp_maxid)
435 } while (!(intr_cpus & (1 << current_cpu)));
436 mtx_unlock_spin(&icu_lock);
440 /* Attempt to bind the specified IRQ to the specified CPU. */
442 intr_bind(u_int vector, u_char cpu)
446 isrc = intr_lookup_source(vector);
449 return (intr_event_bind(isrc->is_event, cpu));
453 * Add a CPU to our mask of valid CPUs that can be destinations of
457 intr_add_cpu(u_int cpu)
461 panic("%s: Invalid CPU ID", __func__);
463 printf("INTR: Adding local APIC %d as a target\n",
466 intr_cpus |= (1 << cpu);
470 * Distribute all the interrupt sources among the available CPUs once the
471 * AP's have been launched.
474 intr_shuffle_irqs(void *arg __unused)
486 /* Don't bother on UP. */
490 /* Round-robin assign a CPU to each enabled source. */
491 mtx_lock(&intr_table_lock);
493 for (i = 0; i < NUM_IO_INTS; i++) {
494 isrc = interrupt_sources[i];
495 if (isrc != NULL && isrc->is_handlers > 0) {
497 * If this event is already bound to a CPU,
498 * then assign the source to that CPU instead
499 * of picking one via round-robin. Note that
500 * this is careful to only advance the
501 * round-robin if the CPU assignment succeeds.
503 if (isrc->is_event->ie_cpu != NOCPU)
504 (void)isrc->is_pic->pic_assign_cpu(isrc,
505 cpu_apic_ids[isrc->is_event->ie_cpu]);
506 else if (isrc->is_pic->pic_assign_cpu(isrc,
507 cpu_apic_ids[current_cpu]) == 0)
508 (void)intr_next_cpu();
512 mtx_unlock(&intr_table_lock);
514 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,
518 * Always route interrupts to the current processor in the UP case.
524 return (PCPU_GET(apic_id));