2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Machine dependent interrupt code for i386. For the i386, we have to
34 * deal with different PICs. Thus, we use the passed in vector to lookup
35 * an interrupt source associated with that vector. The interrupt source
36 * describes which PIC the source belongs to and includes methods to handle
42 #include <sys/param.h>
44 #include <sys/interrupt.h>
47 #include <sys/kernel.h>
48 #include <sys/mutex.h>
50 #include <sys/syslog.h>
51 #include <sys/systm.h>
52 #include <machine/clock.h>
53 #include <machine/intr_machdep.h>
54 #include <machine/smp.h>
59 #define MAX_STRAY_LOG 5
61 typedef void (*mask_fn)(void *);
63 static int intrcnt_index;
64 static struct intsrc *interrupt_sources[NUM_IO_INTS];
65 static struct mtx intr_table_lock;
66 static STAILQ_HEAD(, pic) pics;
69 static int assign_cpu;
71 static void intr_assign_next_cpu(struct intsrc *isrc);
74 static void intr_init(void *__dummy);
75 static int intr_pic_registered(struct pic *pic);
76 static void intrcnt_setname(const char *name, int index);
77 static void intrcnt_updatename(struct intsrc *is);
78 static void intrcnt_register(struct intsrc *is);
81 intr_pic_registered(struct pic *pic)
85 STAILQ_FOREACH(p, &pics, pics) {
93 * Register a new interrupt controller (PIC). This is to support suspend
94 * and resume where we suspend/resume controllers rather than individual
95 * sources. This also allows controllers with no active sources (such as
96 * 8259As in a system using the APICs) to participate in suspend and resume.
99 intr_register_pic(struct pic *pic)
103 mtx_lock_spin(&intr_table_lock);
104 if (intr_pic_registered(pic))
107 STAILQ_INSERT_TAIL(&pics, pic, pics);
110 mtx_unlock_spin(&intr_table_lock);
115 * Register a new interrupt source with the global interrupt system.
116 * The global interrupts need to be disabled when this function is
120 intr_register_source(struct intsrc *isrc)
124 KASSERT(intr_pic_registered(isrc->is_pic), ("unregistered PIC"));
125 vector = isrc->is_pic->pic_vector(isrc);
126 if (interrupt_sources[vector] != NULL)
128 error = intr_event_create(&isrc->is_event, isrc, 0,
129 (mask_fn)isrc->is_pic->pic_enable_source, "irq%d:", vector);
132 mtx_lock_spin(&intr_table_lock);
133 if (interrupt_sources[vector] != NULL) {
134 mtx_unlock_spin(&intr_table_lock);
135 intr_event_destroy(isrc->is_event);
138 intrcnt_register(isrc);
139 interrupt_sources[vector] = isrc;
140 isrc->is_enabled = 0;
141 mtx_unlock_spin(&intr_table_lock);
146 intr_lookup_source(int vector)
149 return (interrupt_sources[vector]);
153 intr_add_handler(const char *name, int vector, driver_filter_t filter,
154 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
159 isrc = intr_lookup_source(vector);
162 error = intr_event_add_handler(isrc->is_event, name, filter, handler,
163 arg, intr_priority(flags), flags, cookiep);
165 intrcnt_updatename(isrc);
166 mtx_lock_spin(&intr_table_lock);
167 if (!isrc->is_enabled) {
168 isrc->is_enabled = 1;
171 intr_assign_next_cpu(isrc);
173 mtx_unlock_spin(&intr_table_lock);
174 isrc->is_pic->pic_enable_intr(isrc);
176 mtx_unlock_spin(&intr_table_lock);
177 isrc->is_pic->pic_enable_source(isrc);
183 intr_remove_handler(void *cookie)
188 isrc = intr_handler_source(cookie);
189 error = intr_event_remove_handler(cookie);
191 intrcnt_updatename(isrc);
196 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
200 isrc = intr_lookup_source(vector);
203 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
207 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
210 struct intr_event *ie;
211 struct intr_handler *ih;
212 int error, vector, thread;
217 * We count software interrupts when we process them. The
218 * code here follows previous practice, but there's an
219 * argument for counting hardware interrupts when they're
223 PCPU_LAZY_INC(cnt.v_intr);
228 * XXX: We assume that IRQ 0 is only used for the ISA timer
231 vector = isrc->is_pic->pic_vector(isrc);
236 * For stray interrupts, mask and EOI the source, bump the
237 * stray count, and log the condition.
239 if (ie == NULL || TAILQ_EMPTY(&ie->ie_handlers)) {
240 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
241 (*isrc->is_straycount)++;
242 if (*isrc->is_straycount < MAX_STRAY_LOG)
243 log(LOG_ERR, "stray irq%d\n", vector);
244 else if (*isrc->is_straycount == MAX_STRAY_LOG)
246 "too many stray irq %d's: not logging anymore\n",
252 * Execute fast interrupt handlers directly.
253 * To support clock handlers, if a handler registers
254 * with a NULL argument, then we pass it a pointer to
255 * a trapframe as its argument.
257 td->td_intr_nesting_level++;
260 TAILQ_FOREACH(ih, &ie->ie_handlers, ih_next) {
261 if (ih->ih_filter == NULL) {
265 CTR4(KTR_INTR, "%s: exec %p(%p) for %s", __func__,
266 ih->ih_filter, ih->ih_argument == NULL ? frame :
267 ih->ih_argument, ih->ih_name);
268 if (ih->ih_argument == NULL)
269 ih->ih_filter(frame);
271 ih->ih_filter(ih->ih_argument);
275 * If there are any threaded handlers that need to run,
276 * mask the source as well as sending it an EOI. Otherwise,
277 * just send it an EOI but leave it unmasked.
280 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
282 isrc->is_pic->pic_eoi_source(isrc);
285 /* Schedule the ithread if needed. */
287 error = intr_event_schedule_thread(ie);
288 KASSERT(error == 0, ("bad stray interrupt"));
290 td->td_intr_nesting_level--;
298 mtx_lock_spin(&intr_table_lock);
299 STAILQ_FOREACH(pic, &pics, pics) {
300 if (pic->pic_resume != NULL)
301 pic->pic_resume(pic);
303 mtx_unlock_spin(&intr_table_lock);
311 mtx_lock_spin(&intr_table_lock);
312 STAILQ_FOREACH(pic, &pics, pics) {
313 if (pic->pic_suspend != NULL)
314 pic->pic_suspend(pic);
316 mtx_unlock_spin(&intr_table_lock);
320 intrcnt_setname(const char *name, int index)
323 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
328 intrcnt_updatename(struct intsrc *is)
331 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
335 intrcnt_register(struct intsrc *is)
337 char straystr[MAXCOMLEN + 1];
339 /* mtx_assert(&intr_table_lock, MA_OWNED); */
340 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
341 is->is_index = intrcnt_index;
343 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
344 is->is_pic->pic_vector(is));
345 intrcnt_updatename(is);
346 is->is_count = &intrcnt[is->is_index];
347 intrcnt_setname(straystr, is->is_index + 1);
348 is->is_straycount = &intrcnt[is->is_index + 1];
352 intrcnt_add(const char *name, u_long **countp)
355 mtx_lock_spin(&intr_table_lock);
356 *countp = &intrcnt[intrcnt_index];
357 intrcnt_setname(name, intrcnt_index);
359 mtx_unlock_spin(&intr_table_lock);
363 intr_init(void *dummy __unused)
366 intrcnt_setname("???", 0);
369 mtx_init(&intr_table_lock, "intr table", NULL, MTX_SPIN);
371 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL)
375 * Dump data about interrupt handlers
377 DB_SHOW_COMMAND(irqs, db_show_irqs)
379 struct intsrc **isrc;
382 if (strcmp(modif, "v") == 0)
386 isrc = interrupt_sources;
387 for (i = 0; i < NUM_IO_INTS && !db_pager_quit; i++, isrc++)
389 db_dump_intr_event((*isrc)->is_event, verbose);
395 * Support for balancing interrupt sources across CPUs. For now we just
396 * allocate CPUs round-robin.
399 /* The BSP is always a valid target. */
400 static cpumask_t intr_cpus = (1 << 0);
401 static int current_cpu, num_cpus = 1;
404 intr_assign_next_cpu(struct intsrc *isrc)
410 * Assign this source to a local APIC in a round-robin fashion.
413 apic_id = cpu_apic_ids[current_cpu];
414 pic->pic_assign_cpu(isrc, apic_id);
417 if (current_cpu >= num_cpus)
419 } while (!(intr_cpus & (1 << current_cpu)));
423 * Add a CPU to our mask of valid CPUs that can be destinations of
427 intr_add_cpu(u_int cpu)
431 panic("%s: Invalid CPU ID", __func__);
433 printf("INTR: Adding local APIC %d as a target\n",
436 intr_cpus |= (1 << cpu);
441 * Distribute all the interrupt sources among the available CPUs once the
442 * AP's have been launched.
445 intr_shuffle_irqs(void *arg __unused)
450 /* Don't bother on UP. */
454 /* Round-robin assign a CPU to each enabled source. */
455 mtx_lock_spin(&intr_table_lock);
457 for (i = 0; i < NUM_IO_INTS; i++) {
458 isrc = interrupt_sources[i];
459 if (isrc != NULL && isrc->is_enabled)
460 intr_assign_next_cpu(isrc);
462 mtx_unlock_spin(&intr_table_lock);
464 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs, NULL)