2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Machine dependent interrupt code for i386. For the i386, we have to
34 * deal with different PICs. Thus, we use the passed in vector to lookup
35 * an interrupt source associated with that vector. The interrupt source
36 * describes which PIC the source belongs to and includes methods to handle
42 #include <sys/param.h>
44 #include <sys/interrupt.h>
47 #include <sys/kernel.h>
48 #include <sys/mutex.h>
50 #include <sys/syslog.h>
51 #include <sys/systm.h>
52 #include <machine/clock.h>
53 #include <machine/intr_machdep.h>
58 #define MAX_STRAY_LOG 5
60 typedef void (*mask_fn)(void *);
62 static int intrcnt_index;
63 static struct intsrc *interrupt_sources[NUM_IO_INTS];
64 static struct mtx intr_table_lock;
65 static STAILQ_HEAD(, pic) pics;
68 static int assign_cpu;
70 static void intr_assign_next_cpu(struct intsrc *isrc);
73 static void intr_init(void *__dummy);
74 static int intr_pic_registered(struct pic *pic);
75 static void intrcnt_setname(const char *name, int index);
76 static void intrcnt_updatename(struct intsrc *is);
77 static void intrcnt_register(struct intsrc *is);
80 intr_pic_registered(struct pic *pic)
84 STAILQ_FOREACH(p, &pics, pics) {
92 * Register a new interrupt controller (PIC). This is to support suspend
93 * and resume where we suspend/resume controllers rather than individual
94 * sources. This also allows controllers with no active sources (such as
95 * 8259As in a system using the APICs) to participate in suspend and resume.
98 intr_register_pic(struct pic *pic)
102 mtx_lock_spin(&intr_table_lock);
103 if (intr_pic_registered(pic))
106 STAILQ_INSERT_TAIL(&pics, pic, pics);
109 mtx_unlock_spin(&intr_table_lock);
114 * Register a new interrupt source with the global interrupt system.
115 * The global interrupts need to be disabled when this function is
119 intr_register_source(struct intsrc *isrc)
123 KASSERT(intr_pic_registered(isrc->is_pic), ("unregistered PIC"));
124 vector = isrc->is_pic->pic_vector(isrc);
125 if (interrupt_sources[vector] != NULL)
127 error = intr_event_create(&isrc->is_event, isrc, 0,
128 (mask_fn)isrc->is_pic->pic_enable_source, "irq%d:", vector);
131 mtx_lock_spin(&intr_table_lock);
132 if (interrupt_sources[vector] != NULL) {
133 mtx_unlock_spin(&intr_table_lock);
134 intr_event_destroy(isrc->is_event);
137 intrcnt_register(isrc);
138 interrupt_sources[vector] = isrc;
139 isrc->is_enabled = 0;
140 mtx_unlock_spin(&intr_table_lock);
145 intr_lookup_source(int vector)
148 return (interrupt_sources[vector]);
152 intr_add_handler(const char *name, int vector, driver_intr_t handler,
153 void *arg, enum intr_type flags, void **cookiep)
158 isrc = intr_lookup_source(vector);
161 error = intr_event_add_handler(isrc->is_event, name, handler, arg,
162 intr_priority(flags), flags, cookiep);
164 intrcnt_updatename(isrc);
165 mtx_lock_spin(&intr_table_lock);
166 if (!isrc->is_enabled) {
167 isrc->is_enabled = 1;
170 intr_assign_next_cpu(isrc);
172 mtx_unlock_spin(&intr_table_lock);
173 isrc->is_pic->pic_enable_intr(isrc);
175 mtx_unlock_spin(&intr_table_lock);
176 isrc->is_pic->pic_enable_source(isrc);
182 intr_remove_handler(void *cookie)
186 error = intr_event_remove_handler(cookie);
189 intrcnt_updatename(/* XXX */);
195 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
199 isrc = intr_lookup_source(vector);
202 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
206 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
209 struct intr_event *ie;
210 struct intr_handler *ih;
211 int error, vector, thread;
216 * We count software interrupts when we process them. The
217 * code here follows previous practice, but there's an
218 * argument for counting hardware interrupts when they're
222 PCPU_LAZY_INC(cnt.v_intr);
227 * XXX: We assume that IRQ 0 is only used for the ISA timer
230 vector = isrc->is_pic->pic_vector(isrc);
235 * For stray interrupts, mask and EOI the source, bump the
236 * stray count, and log the condition.
238 if (ie == NULL || TAILQ_EMPTY(&ie->ie_handlers)) {
239 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
240 (*isrc->is_straycount)++;
241 if (*isrc->is_straycount < MAX_STRAY_LOG)
242 log(LOG_ERR, "stray irq%d\n", vector);
243 else if (*isrc->is_straycount == MAX_STRAY_LOG)
245 "too many stray irq %d's: not logging anymore\n",
251 * Execute fast interrupt handlers directly.
252 * To support clock handlers, if a handler registers
253 * with a NULL argument, then we pass it a pointer to
254 * a trapframe as its argument.
256 td->td_intr_nesting_level++;
259 TAILQ_FOREACH(ih, &ie->ie_handlers, ih_next) {
260 if (!(ih->ih_flags & IH_FAST)) {
264 CTR4(KTR_INTR, "%s: exec %p(%p) for %s", __func__,
265 ih->ih_handler, ih->ih_argument == NULL ? frame :
266 ih->ih_argument, ih->ih_name);
267 if (ih->ih_argument == NULL)
268 ih->ih_handler(frame);
270 ih->ih_handler(ih->ih_argument);
274 * If there are any threaded handlers that need to run,
275 * mask the source as well as sending it an EOI. Otherwise,
276 * just send it an EOI but leave it unmasked.
279 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
281 isrc->is_pic->pic_eoi_source(isrc);
284 /* Schedule the ithread if needed. */
286 error = intr_event_schedule_thread(ie);
287 KASSERT(error == 0, ("bad stray interrupt"));
289 td->td_intr_nesting_level--;
297 mtx_lock_spin(&intr_table_lock);
298 STAILQ_FOREACH(pic, &pics, pics) {
299 if (pic->pic_resume != NULL)
300 pic->pic_resume(pic);
302 mtx_unlock_spin(&intr_table_lock);
310 mtx_lock_spin(&intr_table_lock);
311 STAILQ_FOREACH(pic, &pics, pics) {
312 if (pic->pic_suspend != NULL)
313 pic->pic_suspend(pic);
315 mtx_unlock_spin(&intr_table_lock);
319 intrcnt_setname(const char *name, int index)
322 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
327 intrcnt_updatename(struct intsrc *is)
330 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
334 intrcnt_register(struct intsrc *is)
336 char straystr[MAXCOMLEN + 1];
338 /* mtx_assert(&intr_table_lock, MA_OWNED); */
339 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
340 is->is_index = intrcnt_index;
342 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
343 is->is_pic->pic_vector(is));
344 intrcnt_updatename(is);
345 is->is_count = &intrcnt[is->is_index];
346 intrcnt_setname(straystr, is->is_index + 1);
347 is->is_straycount = &intrcnt[is->is_index + 1];
351 intrcnt_add(const char *name, u_long **countp)
354 mtx_lock_spin(&intr_table_lock);
355 *countp = &intrcnt[intrcnt_index];
356 intrcnt_setname(name, intrcnt_index);
358 mtx_unlock_spin(&intr_table_lock);
362 intr_init(void *dummy __unused)
365 intrcnt_setname("???", 0);
368 mtx_init(&intr_table_lock, "intr table", NULL, MTX_SPIN);
370 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL)
374 * Dump data about interrupt handlers
376 DB_SHOW_COMMAND(irqs, db_show_irqs)
378 struct intsrc **isrc;
381 if (strcmp(modif, "v") == 0)
385 isrc = interrupt_sources;
386 for (i = 0; i < NUM_IO_INTS && !db_pager_quit; i++, isrc++)
388 db_dump_intr_event((*isrc)->is_event, verbose);
394 * Support for balancing interrupt sources across CPUs. For now we just
395 * allocate CPUs round-robin.
398 static u_int cpu_apic_ids[MAXCPU];
399 static int current_cpu, num_cpus;
402 intr_assign_next_cpu(struct intsrc *isrc)
408 * Assign this source to a local APIC in a round-robin fashion.
411 apic_id = cpu_apic_ids[current_cpu];
413 if (current_cpu >= num_cpus)
416 printf("INTR: Assigning IRQ %d", pic->pic_vector(isrc));
417 printf(" to local APIC %u\n", apic_id);
419 pic->pic_assign_cpu(isrc, apic_id);
423 * Add a local APIC ID to our list of valid local APIC IDs that can
424 * be destinations of interrupts.
427 intr_add_cpu(u_int apic_id)
431 printf("INTR: Adding local APIC %d as a target\n", apic_id);
432 if (num_cpus >= MAXCPU)
433 panic("WARNING: Local APIC IDs exhausted!");
434 cpu_apic_ids[num_cpus] = apic_id;
439 * Distribute all the interrupt sources among the available CPUs once the
440 * AP's have been launched.
443 intr_shuffle_irqs(void *arg __unused)
448 /* Don't bother on UP. */
452 /* Round-robin assign each enabled source a CPU. */
453 mtx_lock_spin(&intr_table_lock);
455 for (i = 0; i < NUM_IO_INTS; i++) {
456 isrc = interrupt_sources[i];
457 if (isrc != NULL && isrc->is_enabled)
458 intr_assign_next_cpu(isrc);
460 mtx_unlock_spin(&intr_table_lock);
462 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs, NULL)