2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_compat.h"
51 #include "opt_kstack_pages.h"
52 #include "opt_maxmem.h"
53 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
64 #include <sys/callout.h>
65 #include <sys/clock.h>
68 #include <sys/eventhandler.h>
70 #include <sys/imgact.h>
72 #include <sys/kernel.h>
74 #include <sys/linker.h>
76 #include <sys/malloc.h>
77 #include <sys/memrange.h>
78 #include <sys/msgbuf.h>
79 #include <sys/mutex.h>
81 #include <sys/ptrace.h>
82 #include <sys/reboot.h>
83 #include <sys/sched.h>
84 #include <sys/signalvar.h>
85 #include <sys/sysctl.h>
86 #include <sys/sysent.h>
87 #include <sys/sysproto.h>
88 #include <sys/ucontext.h>
89 #include <sys/vmmeter.h>
92 #include <vm/vm_extern.h>
93 #include <vm/vm_kern.h>
94 #include <vm/vm_page.h>
95 #include <vm/vm_map.h>
96 #include <vm/vm_object.h>
97 #include <vm/vm_pager.h>
98 #include <vm/vm_param.h>
102 #error KDB must be enabled in order for DDB to work!
105 #include <ddb/db_sym.h>
110 #include <net/netisr.h>
112 #include <machine/bootinfo.h>
113 #include <machine/clock.h>
114 #include <machine/cpu.h>
115 #include <machine/cputypes.h>
116 #include <machine/intr_machdep.h>
117 #include <machine/md_var.h>
118 #include <machine/metadata.h>
119 #include <machine/pc/bios.h>
120 #include <machine/pcb.h>
121 #include <machine/pcb_ext.h>
122 #include <machine/proc.h>
123 #include <machine/reg.h>
124 #include <machine/sigframe.h>
125 #include <machine/specialreg.h>
126 #include <machine/vm86.h>
128 #include <machine/perfmon.h>
131 #include <machine/smp.h>
135 #include <i386/isa/icu.h>
139 #include <machine/xbox.h>
141 int arch_i386_is_xbox = 0;
142 uint32_t arch_i386_xbox_memsize = 0;
145 /* Sanity check for __curthread() */
146 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
148 extern void init386(int first);
149 extern void dblfault_handler(void);
151 extern void printcpuinfo(void); /* XXX header file */
152 extern void finishidentcpu(void);
153 extern void panicifcpuunsupported(void);
154 extern void initializecpu(void);
156 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
157 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
159 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
160 #define CPU_ENABLE_SSE
163 static void cpu_startup(void *);
164 static void fpstate_drop(struct thread *td);
165 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
166 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
167 #ifdef CPU_ENABLE_SSE
168 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
169 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
170 #endif /* CPU_ENABLE_SSE */
171 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
174 extern vm_offset_t ksym_start, ksym_end;
177 /* Intel ICH registers */
178 #define ICH_PMBASE 0x400
179 #define ICH_SMI_EN ICH_PMBASE + 0x30
181 int _udatasel, _ucodesel;
187 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
189 #ifdef COMPAT_FREEBSD4
190 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
197 FEATURE(pae, "Physical Address Extensions");
201 * The number of PHYSMAP entries must be one less than the number of
202 * PHYSSEG entries because the PHYSMAP entry that spans the largest
203 * physical address that is accessible by ISA DMA is split into two
206 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
208 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
209 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
211 /* must be 2 less so 0 0 can signal end of chunks */
212 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
213 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
215 struct kva_md_info kmi;
217 static struct trapframe proc0_tf;
218 struct pcpu __pcpu[MAXCPU];
222 struct mem_range_softc mem_range_softc;
231 * On MacBooks, we need to disallow the legacy USB circuit to
232 * generate an SMI# because this can cause several problems,
233 * namely: incorrect CPU frequency detection and failure to
235 * We do this by disabling a bit in the SMI_EN (SMI Control and
236 * Enable register) of the Intel ICH LPC Interface Bridge.
238 sysenv = getenv("smbios.system.product");
239 if (sysenv != NULL) {
240 if (strncmp(sysenv, "MacBook", 7) == 0) {
242 printf("Disabling LEGACY_USB_EN bit on "
244 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
250 * Good {morning,afternoon,evening,night}.
254 panicifcpuunsupported();
258 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem),
259 ptoa((uintmax_t)Maxmem) / 1048576);
262 * Display any holes after the first chunk of extended memory.
267 printf("Physical memory chunk(s):\n");
268 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
271 size = phys_avail[indx + 1] - phys_avail[indx];
273 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
274 (uintmax_t)phys_avail[indx],
275 (uintmax_t)phys_avail[indx + 1] - 1,
276 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
280 vm_ksubmap_init(&kmi);
282 printf("avail memory = %ju (%ju MB)\n",
283 ptoa((uintmax_t)cnt.v_free_count),
284 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
287 * Set up buffers, so they can be used to read disk labels.
290 vm_pager_bufferinit();
296 * Send an interrupt to process.
298 * Stack is set up to allow sigcode stored
299 * at top to call routine, followed by kcall
300 * to sigreturn routine below. After sigreturn
301 * resets the signal mask, the stack, and the
302 * frame pointer, it returns to the user
307 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
309 struct osigframe sf, *fp;
313 struct trapframe *regs;
319 PROC_LOCK_ASSERT(p, MA_OWNED);
320 sig = ksi->ksi_signo;
322 mtx_assert(&psp->ps_mtx, MA_OWNED);
324 oonstack = sigonstack(regs->tf_esp);
326 /* Allocate space for the signal handler context. */
327 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
328 SIGISMEMBER(psp->ps_sigonstack, sig)) {
329 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
330 td->td_sigstk.ss_size - sizeof(struct osigframe));
331 #if defined(COMPAT_43)
332 td->td_sigstk.ss_flags |= SS_ONSTACK;
335 fp = (struct osigframe *)regs->tf_esp - 1;
337 /* Translate the signal if appropriate. */
338 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
339 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
341 /* Build the argument list for the signal handler. */
343 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
344 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
345 /* Signal handler installed with SA_SIGINFO. */
346 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
347 sf.sf_siginfo.si_signo = sig;
348 sf.sf_siginfo.si_code = ksi->ksi_code;
349 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
351 /* Old FreeBSD-style arguments. */
352 sf.sf_arg2 = ksi->ksi_code;
353 sf.sf_addr = (register_t)ksi->ksi_addr;
354 sf.sf_ahu.sf_handler = catcher;
356 mtx_unlock(&psp->ps_mtx);
359 /* Save most if not all of trap frame. */
360 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
361 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
362 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
363 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
364 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
365 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
366 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
367 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
368 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
369 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
370 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
371 sf.sf_siginfo.si_sc.sc_gs = rgs();
372 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
374 /* Build the signal context to be used by osigreturn(). */
375 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
376 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
377 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
378 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
379 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
380 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
381 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
382 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
385 * If we're a vm86 process, we want to save the segment registers.
386 * We also change eflags to be our emulated eflags, not the actual
389 if (regs->tf_eflags & PSL_VM) {
390 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
391 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
392 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
394 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
395 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
396 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
397 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
399 if (vm86->vm86_has_vme == 0)
400 sf.sf_siginfo.si_sc.sc_ps =
401 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
402 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
404 /* See sendsig() for comments. */
405 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
409 * Copy the sigframe out to the user's stack.
411 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
413 printf("process %ld has trashed its stack\n", (long)p->p_pid);
419 regs->tf_esp = (int)fp;
420 regs->tf_eip = PS_STRINGS - szosigcode;
421 regs->tf_eflags &= ~(PSL_T | PSL_D);
422 regs->tf_cs = _ucodesel;
423 regs->tf_ds = _udatasel;
424 regs->tf_es = _udatasel;
425 regs->tf_fs = _udatasel;
427 regs->tf_ss = _udatasel;
429 mtx_lock(&psp->ps_mtx);
431 #endif /* COMPAT_43 */
433 #ifdef COMPAT_FREEBSD4
435 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
437 struct sigframe4 sf, *sfp;
441 struct trapframe *regs;
447 PROC_LOCK_ASSERT(p, MA_OWNED);
448 sig = ksi->ksi_signo;
450 mtx_assert(&psp->ps_mtx, MA_OWNED);
452 oonstack = sigonstack(regs->tf_esp);
454 /* Save user context. */
455 bzero(&sf, sizeof(sf));
456 sf.sf_uc.uc_sigmask = *mask;
457 sf.sf_uc.uc_stack = td->td_sigstk;
458 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
459 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
460 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
461 sf.sf_uc.uc_mcontext.mc_gs = rgs();
462 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
464 /* Allocate space for the signal handler context. */
465 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
466 SIGISMEMBER(psp->ps_sigonstack, sig)) {
467 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
468 td->td_sigstk.ss_size - sizeof(struct sigframe4));
469 #if defined(COMPAT_43)
470 td->td_sigstk.ss_flags |= SS_ONSTACK;
473 sfp = (struct sigframe4 *)regs->tf_esp - 1;
475 /* Translate the signal if appropriate. */
476 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
477 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
479 /* Build the argument list for the signal handler. */
481 sf.sf_ucontext = (register_t)&sfp->sf_uc;
482 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
483 /* Signal handler installed with SA_SIGINFO. */
484 sf.sf_siginfo = (register_t)&sfp->sf_si;
485 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
487 /* Fill in POSIX parts */
488 sf.sf_si.si_signo = sig;
489 sf.sf_si.si_code = ksi->ksi_code;
490 sf.sf_si.si_addr = ksi->ksi_addr;
492 /* Old FreeBSD-style arguments. */
493 sf.sf_siginfo = ksi->ksi_code;
494 sf.sf_addr = (register_t)ksi->ksi_addr;
495 sf.sf_ahu.sf_handler = catcher;
497 mtx_unlock(&psp->ps_mtx);
501 * If we're a vm86 process, we want to save the segment registers.
502 * We also change eflags to be our emulated eflags, not the actual
505 if (regs->tf_eflags & PSL_VM) {
506 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
507 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
509 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
510 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
511 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
512 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
514 if (vm86->vm86_has_vme == 0)
515 sf.sf_uc.uc_mcontext.mc_eflags =
516 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
517 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
520 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
521 * syscalls made by the signal handler. This just avoids
522 * wasting time for our lazy fixup of such faults. PSL_NT
523 * does nothing in vm86 mode, but vm86 programs can set it
524 * almost legitimately in probes for old cpu types.
526 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
530 * Copy the sigframe out to the user's stack.
532 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
534 printf("process %ld has trashed its stack\n", (long)p->p_pid);
540 regs->tf_esp = (int)sfp;
541 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
542 regs->tf_eflags &= ~(PSL_T | PSL_D);
543 regs->tf_cs = _ucodesel;
544 regs->tf_ds = _udatasel;
545 regs->tf_es = _udatasel;
546 regs->tf_fs = _udatasel;
547 regs->tf_ss = _udatasel;
549 mtx_lock(&psp->ps_mtx);
551 #endif /* COMPAT_FREEBSD4 */
554 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
556 struct sigframe sf, *sfp;
561 struct trapframe *regs;
567 PROC_LOCK_ASSERT(p, MA_OWNED);
568 sig = ksi->ksi_signo;
570 mtx_assert(&psp->ps_mtx, MA_OWNED);
571 #ifdef COMPAT_FREEBSD4
572 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
573 freebsd4_sendsig(catcher, ksi, mask);
578 if (SIGISMEMBER(psp->ps_osigset, sig)) {
579 osendsig(catcher, ksi, mask);
584 oonstack = sigonstack(regs->tf_esp);
586 /* Save user context. */
587 bzero(&sf, sizeof(sf));
588 sf.sf_uc.uc_sigmask = *mask;
589 sf.sf_uc.uc_stack = td->td_sigstk;
590 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
591 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
592 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
593 sf.sf_uc.uc_mcontext.mc_gs = rgs();
594 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
595 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
596 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
599 /* Allocate space for the signal handler context. */
600 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
601 SIGISMEMBER(psp->ps_sigonstack, sig)) {
602 sp = td->td_sigstk.ss_sp +
603 td->td_sigstk.ss_size - sizeof(struct sigframe);
604 #if defined(COMPAT_43)
605 td->td_sigstk.ss_flags |= SS_ONSTACK;
608 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
609 /* Align to 16 bytes. */
610 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
612 /* Translate the signal if appropriate. */
613 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
614 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
616 /* Build the argument list for the signal handler. */
618 sf.sf_ucontext = (register_t)&sfp->sf_uc;
619 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
620 /* Signal handler installed with SA_SIGINFO. */
621 sf.sf_siginfo = (register_t)&sfp->sf_si;
622 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
624 /* Fill in POSIX parts */
625 sf.sf_si = ksi->ksi_info;
626 sf.sf_si.si_signo = sig; /* maybe a translated signal */
628 /* Old FreeBSD-style arguments. */
629 sf.sf_siginfo = ksi->ksi_code;
630 sf.sf_addr = (register_t)ksi->ksi_addr;
631 sf.sf_ahu.sf_handler = catcher;
633 mtx_unlock(&psp->ps_mtx);
637 * If we're a vm86 process, we want to save the segment registers.
638 * We also change eflags to be our emulated eflags, not the actual
641 if (regs->tf_eflags & PSL_VM) {
642 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
643 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
645 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
646 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
647 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
648 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
650 if (vm86->vm86_has_vme == 0)
651 sf.sf_uc.uc_mcontext.mc_eflags =
652 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
653 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
656 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
657 * syscalls made by the signal handler. This just avoids
658 * wasting time for our lazy fixup of such faults. PSL_NT
659 * does nothing in vm86 mode, but vm86 programs can set it
660 * almost legitimately in probes for old cpu types.
662 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
666 * Copy the sigframe out to the user's stack.
668 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
670 printf("process %ld has trashed its stack\n", (long)p->p_pid);
676 regs->tf_esp = (int)sfp;
677 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
678 regs->tf_eflags &= ~(PSL_T | PSL_D);
679 regs->tf_cs = _ucodesel;
680 regs->tf_ds = _udatasel;
681 regs->tf_es = _udatasel;
682 regs->tf_fs = _udatasel;
683 regs->tf_ss = _udatasel;
685 mtx_lock(&psp->ps_mtx);
689 * System call to cleanup state after a signal
690 * has been taken. Reset signal mask and
691 * stack state from context left by sendsig (above).
692 * Return to previous pc and psl as specified by
693 * context left by sendsig. Check carefully to
694 * make sure that the user has not modified the
695 * state to gain improper privileges.
703 struct osigreturn_args /* {
704 struct osigcontext *sigcntxp;
707 struct osigcontext sc;
708 struct trapframe *regs;
709 struct osigcontext *scp;
710 struct proc *p = td->td_proc;
715 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
720 if (eflags & PSL_VM) {
721 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
722 struct vm86_kernel *vm86;
725 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
726 * set up the vm86 area, and we can't enter vm86 mode.
728 if (td->td_pcb->pcb_ext == 0)
730 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
731 if (vm86->vm86_inited == 0)
734 /* Go back to user mode if both flags are set. */
735 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
736 ksiginfo_init_trap(&ksi);
737 ksi.ksi_signo = SIGBUS;
738 ksi.ksi_code = BUS_OBJERR;
739 ksi.ksi_addr = (void *)regs->tf_eip;
740 trapsignal(td, &ksi);
743 if (vm86->vm86_has_vme) {
744 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
745 (eflags & VME_USERCHANGE) | PSL_VM;
747 vm86->vm86_eflags = eflags; /* save VIF, VIP */
748 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
749 (eflags & VM_USERCHANGE) | PSL_VM;
751 tf->tf_vm86_ds = scp->sc_ds;
752 tf->tf_vm86_es = scp->sc_es;
753 tf->tf_vm86_fs = scp->sc_fs;
754 tf->tf_vm86_gs = scp->sc_gs;
755 tf->tf_ds = _udatasel;
756 tf->tf_es = _udatasel;
757 tf->tf_fs = _udatasel;
760 * Don't allow users to change privileged or reserved flags.
763 * XXX do allow users to change the privileged flag PSL_RF.
764 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
765 * should sometimes set it there too. tf_eflags is kept in
766 * the signal context during signal handling and there is no
767 * other place to remember it, so the PSL_RF bit may be
768 * corrupted by the signal handler without us knowing.
769 * Corruption of the PSL_RF bit at worst causes one more or
770 * one less debugger trap, so allowing it is fairly harmless.
772 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
777 * Don't allow users to load a valid privileged %cs. Let the
778 * hardware check for invalid selectors, excess privilege in
779 * other selectors, invalid %eip's and invalid %esp's.
781 if (!CS_SECURE(scp->sc_cs)) {
782 ksiginfo_init_trap(&ksi);
783 ksi.ksi_signo = SIGBUS;
784 ksi.ksi_code = BUS_OBJERR;
785 ksi.ksi_trapno = T_PROTFLT;
786 ksi.ksi_addr = (void *)regs->tf_eip;
787 trapsignal(td, &ksi);
790 regs->tf_ds = scp->sc_ds;
791 regs->tf_es = scp->sc_es;
792 regs->tf_fs = scp->sc_fs;
795 /* Restore remaining registers. */
796 regs->tf_eax = scp->sc_eax;
797 regs->tf_ebx = scp->sc_ebx;
798 regs->tf_ecx = scp->sc_ecx;
799 regs->tf_edx = scp->sc_edx;
800 regs->tf_esi = scp->sc_esi;
801 regs->tf_edi = scp->sc_edi;
802 regs->tf_cs = scp->sc_cs;
803 regs->tf_ss = scp->sc_ss;
804 regs->tf_isp = scp->sc_isp;
805 regs->tf_ebp = scp->sc_fp;
806 regs->tf_esp = scp->sc_sp;
807 regs->tf_eip = scp->sc_pc;
808 regs->tf_eflags = eflags;
811 #if defined(COMPAT_43)
812 if (scp->sc_onstack & 1)
813 td->td_sigstk.ss_flags |= SS_ONSTACK;
815 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
817 SIGSETOLD(td->td_sigmask, scp->sc_mask);
818 SIG_CANTMASK(td->td_sigmask);
821 return (EJUSTRETURN);
823 #endif /* COMPAT_43 */
825 #ifdef COMPAT_FREEBSD4
830 freebsd4_sigreturn(td, uap)
832 struct freebsd4_sigreturn_args /* {
833 const ucontext4 *sigcntxp;
837 struct proc *p = td->td_proc;
838 struct trapframe *regs;
839 const struct ucontext4 *ucp;
840 int cs, eflags, error;
843 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
848 eflags = ucp->uc_mcontext.mc_eflags;
849 if (eflags & PSL_VM) {
850 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
851 struct vm86_kernel *vm86;
854 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
855 * set up the vm86 area, and we can't enter vm86 mode.
857 if (td->td_pcb->pcb_ext == 0)
859 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
860 if (vm86->vm86_inited == 0)
863 /* Go back to user mode if both flags are set. */
864 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
865 ksiginfo_init_trap(&ksi);
866 ksi.ksi_signo = SIGBUS;
867 ksi.ksi_code = BUS_OBJERR;
868 ksi.ksi_addr = (void *)regs->tf_eip;
869 trapsignal(td, &ksi);
871 if (vm86->vm86_has_vme) {
872 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
873 (eflags & VME_USERCHANGE) | PSL_VM;
875 vm86->vm86_eflags = eflags; /* save VIF, VIP */
876 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
877 (eflags & VM_USERCHANGE) | PSL_VM;
879 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
880 tf->tf_eflags = eflags;
881 tf->tf_vm86_ds = tf->tf_ds;
882 tf->tf_vm86_es = tf->tf_es;
883 tf->tf_vm86_fs = tf->tf_fs;
884 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
885 tf->tf_ds = _udatasel;
886 tf->tf_es = _udatasel;
887 tf->tf_fs = _udatasel;
890 * Don't allow users to change privileged or reserved flags.
893 * XXX do allow users to change the privileged flag PSL_RF.
894 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
895 * should sometimes set it there too. tf_eflags is kept in
896 * the signal context during signal handling and there is no
897 * other place to remember it, so the PSL_RF bit may be
898 * corrupted by the signal handler without us knowing.
899 * Corruption of the PSL_RF bit at worst causes one more or
900 * one less debugger trap, so allowing it is fairly harmless.
902 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
903 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags);
908 * Don't allow users to load a valid privileged %cs. Let the
909 * hardware check for invalid selectors, excess privilege in
910 * other selectors, invalid %eip's and invalid %esp's.
912 cs = ucp->uc_mcontext.mc_cs;
913 if (!CS_SECURE(cs)) {
914 printf("freebsd4_sigreturn: cs = 0x%x\n", cs);
915 ksiginfo_init_trap(&ksi);
916 ksi.ksi_signo = SIGBUS;
917 ksi.ksi_code = BUS_OBJERR;
918 ksi.ksi_trapno = T_PROTFLT;
919 ksi.ksi_addr = (void *)regs->tf_eip;
920 trapsignal(td, &ksi);
924 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
928 #if defined(COMPAT_43)
929 if (ucp->uc_mcontext.mc_onstack & 1)
930 td->td_sigstk.ss_flags |= SS_ONSTACK;
932 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
935 td->td_sigmask = ucp->uc_sigmask;
936 SIG_CANTMASK(td->td_sigmask);
939 return (EJUSTRETURN);
941 #endif /* COMPAT_FREEBSD4 */
949 struct sigreturn_args /* {
950 const struct __ucontext *sigcntxp;
954 struct proc *p = td->td_proc;
955 struct trapframe *regs;
956 const ucontext_t *ucp;
957 int cs, eflags, error, ret;
960 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
965 eflags = ucp->uc_mcontext.mc_eflags;
966 if (eflags & PSL_VM) {
967 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
968 struct vm86_kernel *vm86;
971 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
972 * set up the vm86 area, and we can't enter vm86 mode.
974 if (td->td_pcb->pcb_ext == 0)
976 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
977 if (vm86->vm86_inited == 0)
980 /* Go back to user mode if both flags are set. */
981 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
982 ksiginfo_init_trap(&ksi);
983 ksi.ksi_signo = SIGBUS;
984 ksi.ksi_code = BUS_OBJERR;
985 ksi.ksi_addr = (void *)regs->tf_eip;
986 trapsignal(td, &ksi);
989 if (vm86->vm86_has_vme) {
990 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
991 (eflags & VME_USERCHANGE) | PSL_VM;
993 vm86->vm86_eflags = eflags; /* save VIF, VIP */
994 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
995 (eflags & VM_USERCHANGE) | PSL_VM;
997 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
998 tf->tf_eflags = eflags;
999 tf->tf_vm86_ds = tf->tf_ds;
1000 tf->tf_vm86_es = tf->tf_es;
1001 tf->tf_vm86_fs = tf->tf_fs;
1002 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1003 tf->tf_ds = _udatasel;
1004 tf->tf_es = _udatasel;
1005 tf->tf_fs = _udatasel;
1008 * Don't allow users to change privileged or reserved flags.
1011 * XXX do allow users to change the privileged flag PSL_RF.
1012 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1013 * should sometimes set it there too. tf_eflags is kept in
1014 * the signal context during signal handling and there is no
1015 * other place to remember it, so the PSL_RF bit may be
1016 * corrupted by the signal handler without us knowing.
1017 * Corruption of the PSL_RF bit at worst causes one more or
1018 * one less debugger trap, so allowing it is fairly harmless.
1020 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1021 printf("sigreturn: eflags = 0x%x\n", eflags);
1026 * Don't allow users to load a valid privileged %cs. Let the
1027 * hardware check for invalid selectors, excess privilege in
1028 * other selectors, invalid %eip's and invalid %esp's.
1030 cs = ucp->uc_mcontext.mc_cs;
1031 if (!CS_SECURE(cs)) {
1032 printf("sigreturn: cs = 0x%x\n", cs);
1033 ksiginfo_init_trap(&ksi);
1034 ksi.ksi_signo = SIGBUS;
1035 ksi.ksi_code = BUS_OBJERR;
1036 ksi.ksi_trapno = T_PROTFLT;
1037 ksi.ksi_addr = (void *)regs->tf_eip;
1038 trapsignal(td, &ksi);
1042 ret = set_fpcontext(td, &ucp->uc_mcontext);
1045 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1049 #if defined(COMPAT_43)
1050 if (ucp->uc_mcontext.mc_onstack & 1)
1051 td->td_sigstk.ss_flags |= SS_ONSTACK;
1053 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1056 td->td_sigmask = ucp->uc_sigmask;
1057 SIG_CANTMASK(td->td_sigmask);
1060 return (EJUSTRETURN);
1064 * Machine dependent boot() routine
1066 * I haven't seen anything to put here yet
1067 * Possibly some stuff might be grafted back here from boot()
1074 /* Get current clock frequency for the given cpu id. */
1076 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1079 uint64_t tsc1, tsc2;
1081 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1084 return (EOPNOTSUPP);
1086 /* If we're booting, trust the rate calibrated moments ago. */
1093 /* Schedule ourselves on the indicated cpu. */
1094 thread_lock(curthread);
1095 sched_bind(curthread, cpu_id);
1096 thread_unlock(curthread);
1099 /* Calibrate by measuring a short delay. */
1100 reg = intr_disable();
1107 thread_lock(curthread);
1108 sched_unbind(curthread);
1109 thread_unlock(curthread);
1113 * Calculate the difference in readings, convert to Mhz, and
1114 * subtract 0.5% of the total. Empirical testing has shown that
1115 * overhead in DELAY() works out to approximately this value.
1118 *rate = tsc2 * 1000 - tsc2 * 5;
1123 * Shutdown the CPU as much as possible
1133 * Hook to idle the CPU when possible. In the SMP case we default to
1134 * off because a halted cpu will not currently pick up a new thread in the
1135 * run queue until the next timer tick. If turned on this will result in
1136 * approximately a 4.2% loss in real time performance in buildworld tests
1137 * (but improves user and sys times oddly enough), and saves approximately
1138 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3).
1140 * XXX we need to have a cpu mask of idle cpus and generate an IPI or
1141 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT.
1142 * Then we can have our cake and eat it too.
1144 * XXX I'm turning it on for SMP as well by default for now. It seems to
1145 * help lock contention somewhat, and this is critical for HTT. -Peter
1147 static int cpu_idle_hlt = 1;
1148 TUNABLE_INT("machdep.cpu_idle_hlt", &cpu_idle_hlt);
1149 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
1150 &cpu_idle_hlt, 0, "Idle loop HLT enable");
1153 cpu_idle_default(void)
1156 * we must absolutely guarentee that hlt is the
1157 * absolute next instruction after sti or we
1158 * introduce a timing window.
1160 __asm __volatile("sti; hlt");
1164 * Note that we have to be careful here to avoid a race between checking
1165 * sched_runnable() and actually halting. If we don't do this, we may waste
1166 * the time between calling hlt and the next interrupt even though there
1167 * is a runnable process.
1174 if (mp_grab_cpu_hlt())
1180 if (sched_runnable())
1187 /* Other subsystems (e.g., ACPI) can hook this later. */
1188 void (*cpu_idle_hook)(void) = cpu_idle_default;
1191 * Reset registers to default values on exec.
1194 exec_setregs(td, entry, stack, ps_strings)
1200 struct trapframe *regs = td->td_frame;
1201 struct pcb *pcb = td->td_pcb;
1203 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1204 pcb->pcb_gs = _udatasel;
1207 mtx_lock_spin(&dt_lock);
1208 if (td->td_proc->p_md.md_ldt)
1211 mtx_unlock_spin(&dt_lock);
1213 bzero((char *)regs, sizeof(struct trapframe));
1214 regs->tf_eip = entry;
1215 regs->tf_esp = stack;
1216 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1217 regs->tf_ss = _udatasel;
1218 regs->tf_ds = _udatasel;
1219 regs->tf_es = _udatasel;
1220 regs->tf_fs = _udatasel;
1221 regs->tf_cs = _ucodesel;
1223 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1224 regs->tf_ebx = ps_strings;
1227 * Reset the hardware debug registers if they were in use.
1228 * They won't have any meaning for the newly exec'd process.
1230 if (pcb->pcb_flags & PCB_DBREGS) {
1237 if (pcb == PCPU_GET(curpcb)) {
1239 * Clear the debug registers on the running
1240 * CPU, otherwise they will end up affecting
1241 * the next process we switch to.
1245 pcb->pcb_flags &= ~PCB_DBREGS;
1249 * Initialize the math emulator (if any) for the current process.
1250 * Actually, just clear the bit that says that the emulator has
1251 * been initialized. Initialization is delayed until the process
1252 * traps to the emulator (if it is done at all) mainly because
1253 * emulators don't provide an entry point for initialization.
1255 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1256 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1259 * Drop the FP state if we hold it, so that the process gets a
1260 * clean FP state if it uses the FPU again.
1265 * XXX - Linux emulator
1266 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1269 td->td_retval[1] = 0;
1280 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1282 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1283 * instructions. We must set the CR0_MP bit and use the CR0_TS
1284 * bit to control the trap, because setting the CR0_EM bit does
1285 * not cause WAIT instructions to trap. It's important to trap
1286 * WAIT instructions - otherwise the "wait" variants of no-wait
1287 * control instructions would degenerate to the "no-wait" variants
1288 * after FP context switches but work correctly otherwise. It's
1289 * particularly important to trap WAITs when there is no NPX -
1290 * otherwise the "wait" variants would always degenerate.
1292 * Try setting CR0_NE to get correct error reporting on 486DX's.
1293 * Setting it should fail or do nothing on lesser processors.
1295 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1300 u_long bootdev; /* not a struct cdev *- encoding is different */
1301 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1302 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1305 * Initialize 386 and configure to run kernel
1309 * Initialize segments & interrupt table
1313 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1314 static struct gate_descriptor idt0[NIDT];
1315 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1316 union descriptor ldt[NLDT]; /* local descriptor table */
1317 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1318 struct mtx dt_lock; /* lock for GDT and LDT */
1320 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1321 extern int has_f00f_bug;
1324 static struct i386tss dblfault_tss;
1325 static char dblfault_stack[PAGE_SIZE];
1327 extern vm_offset_t proc0kstack;
1331 * software prototypes -- in more palatable form.
1333 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1334 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1336 struct soft_segment_descriptor gdt_segs[] = {
1337 /* GNULL_SEL 0 Null Descriptor */
1338 { 0x0, /* segment base address */
1340 0, /* segment type */
1341 0, /* segment descriptor priority level */
1342 0, /* segment descriptor present */
1344 0, /* default 32 vs 16 bit size */
1345 0 /* limit granularity (byte/page units)*/ },
1346 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1347 { 0x0, /* segment base address */
1348 0xfffff, /* length - all address space */
1349 SDT_MEMRWA, /* segment type */
1350 0, /* segment descriptor priority level */
1351 1, /* segment descriptor present */
1353 1, /* default 32 vs 16 bit size */
1354 1 /* limit granularity (byte/page units)*/ },
1355 /* GUFS_SEL 2 %fs Descriptor for user */
1356 { 0x0, /* segment base address */
1357 0xfffff, /* length - all address space */
1358 SDT_MEMRWA, /* segment type */
1359 SEL_UPL, /* segment descriptor priority level */
1360 1, /* segment descriptor present */
1362 1, /* default 32 vs 16 bit size */
1363 1 /* limit granularity (byte/page units)*/ },
1364 /* GUGS_SEL 3 %gs Descriptor for user */
1365 { 0x0, /* segment base address */
1366 0xfffff, /* length - all address space */
1367 SDT_MEMRWA, /* segment type */
1368 SEL_UPL, /* segment descriptor priority level */
1369 1, /* segment descriptor present */
1371 1, /* default 32 vs 16 bit size */
1372 1 /* limit granularity (byte/page units)*/ },
1373 /* GCODE_SEL 4 Code Descriptor for kernel */
1374 { 0x0, /* segment base address */
1375 0xfffff, /* length - all address space */
1376 SDT_MEMERA, /* segment type */
1377 0, /* segment descriptor priority level */
1378 1, /* segment descriptor present */
1380 1, /* default 32 vs 16 bit size */
1381 1 /* limit granularity (byte/page units)*/ },
1382 /* GDATA_SEL 5 Data Descriptor for kernel */
1383 { 0x0, /* segment base address */
1384 0xfffff, /* length - all address space */
1385 SDT_MEMRWA, /* segment type */
1386 0, /* segment descriptor priority level */
1387 1, /* segment descriptor present */
1389 1, /* default 32 vs 16 bit size */
1390 1 /* limit granularity (byte/page units)*/ },
1391 /* GUCODE_SEL 6 Code Descriptor for user */
1392 { 0x0, /* segment base address */
1393 0xfffff, /* length - all address space */
1394 SDT_MEMERA, /* segment type */
1395 SEL_UPL, /* segment descriptor priority level */
1396 1, /* segment descriptor present */
1398 1, /* default 32 vs 16 bit size */
1399 1 /* limit granularity (byte/page units)*/ },
1400 /* GUDATA_SEL 7 Data Descriptor for user */
1401 { 0x0, /* segment base address */
1402 0xfffff, /* length - all address space */
1403 SDT_MEMRWA, /* segment type */
1404 SEL_UPL, /* segment descriptor priority level */
1405 1, /* segment descriptor present */
1407 1, /* default 32 vs 16 bit size */
1408 1 /* limit granularity (byte/page units)*/ },
1409 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1410 { 0x400, /* segment base address */
1411 0xfffff, /* length */
1412 SDT_MEMRWA, /* segment type */
1413 0, /* segment descriptor priority level */
1414 1, /* segment descriptor present */
1416 1, /* default 32 vs 16 bit size */
1417 1 /* limit granularity (byte/page units)*/ },
1418 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1420 0x0, /* segment base address */
1421 sizeof(struct i386tss)-1,/* length */
1422 SDT_SYS386TSS, /* segment type */
1423 0, /* segment descriptor priority level */
1424 1, /* segment descriptor present */
1426 0, /* unused - default 32 vs 16 bit size */
1427 0 /* limit granularity (byte/page units)*/ },
1428 /* GLDT_SEL 10 LDT Descriptor */
1429 { (int) ldt, /* segment base address */
1430 sizeof(ldt)-1, /* length - all address space */
1431 SDT_SYSLDT, /* segment type */
1432 SEL_UPL, /* segment descriptor priority level */
1433 1, /* segment descriptor present */
1435 0, /* unused - default 32 vs 16 bit size */
1436 0 /* limit granularity (byte/page units)*/ },
1437 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1438 { (int) ldt, /* segment base address */
1439 (512 * sizeof(union descriptor)-1), /* length */
1440 SDT_SYSLDT, /* segment type */
1441 0, /* segment descriptor priority level */
1442 1, /* segment descriptor present */
1444 0, /* unused - default 32 vs 16 bit size */
1445 0 /* limit granularity (byte/page units)*/ },
1446 /* GPANIC_SEL 12 Panic Tss Descriptor */
1447 { (int) &dblfault_tss, /* segment base address */
1448 sizeof(struct i386tss)-1,/* length - all address space */
1449 SDT_SYS386TSS, /* segment type */
1450 0, /* segment descriptor priority level */
1451 1, /* segment descriptor present */
1453 0, /* unused - default 32 vs 16 bit size */
1454 0 /* limit granularity (byte/page units)*/ },
1455 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1456 { 0, /* segment base address (overwritten) */
1457 0xfffff, /* length */
1458 SDT_MEMERA, /* segment type */
1459 0, /* segment descriptor priority level */
1460 1, /* segment descriptor present */
1462 0, /* default 32 vs 16 bit size */
1463 1 /* limit granularity (byte/page units)*/ },
1464 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1465 { 0, /* segment base address (overwritten) */
1466 0xfffff, /* length */
1467 SDT_MEMERA, /* segment type */
1468 0, /* segment descriptor priority level */
1469 1, /* segment descriptor present */
1471 0, /* default 32 vs 16 bit size */
1472 1 /* limit granularity (byte/page units)*/ },
1473 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1474 { 0, /* segment base address (overwritten) */
1475 0xfffff, /* length */
1476 SDT_MEMRWA, /* segment type */
1477 0, /* segment descriptor priority level */
1478 1, /* segment descriptor present */
1480 1, /* default 32 vs 16 bit size */
1481 1 /* limit granularity (byte/page units)*/ },
1482 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1483 { 0, /* segment base address (overwritten) */
1484 0xfffff, /* length */
1485 SDT_MEMRWA, /* segment type */
1486 0, /* segment descriptor priority level */
1487 1, /* segment descriptor present */
1489 0, /* default 32 vs 16 bit size */
1490 1 /* limit granularity (byte/page units)*/ },
1491 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1492 { 0, /* segment base address (overwritten) */
1493 0xfffff, /* length */
1494 SDT_MEMRWA, /* segment type */
1495 0, /* segment descriptor priority level */
1496 1, /* segment descriptor present */
1498 0, /* default 32 vs 16 bit size */
1499 1 /* limit granularity (byte/page units)*/ },
1500 /* GNDIS_SEL 18 NDIS Descriptor */
1501 { 0x0, /* segment base address */
1503 0, /* segment type */
1504 0, /* segment descriptor priority level */
1505 0, /* segment descriptor present */
1507 0, /* default 32 vs 16 bit size */
1508 0 /* limit granularity (byte/page units)*/ },
1511 static struct soft_segment_descriptor ldt_segs[] = {
1512 /* Null Descriptor - overwritten by call gate */
1513 { 0x0, /* segment base address */
1514 0x0, /* length - all address space */
1515 0, /* segment type */
1516 0, /* segment descriptor priority level */
1517 0, /* segment descriptor present */
1519 0, /* default 32 vs 16 bit size */
1520 0 /* limit granularity (byte/page units)*/ },
1521 /* Null Descriptor - overwritten by call gate */
1522 { 0x0, /* segment base address */
1523 0x0, /* length - all address space */
1524 0, /* segment type */
1525 0, /* segment descriptor priority level */
1526 0, /* segment descriptor present */
1528 0, /* default 32 vs 16 bit size */
1529 0 /* limit granularity (byte/page units)*/ },
1530 /* Null Descriptor - overwritten by call gate */
1531 { 0x0, /* segment base address */
1532 0x0, /* length - all address space */
1533 0, /* segment type */
1534 0, /* segment descriptor priority level */
1535 0, /* segment descriptor present */
1537 0, /* default 32 vs 16 bit size */
1538 0 /* limit granularity (byte/page units)*/ },
1539 /* Code Descriptor for user */
1540 { 0x0, /* segment base address */
1541 0xfffff, /* length - all address space */
1542 SDT_MEMERA, /* segment type */
1543 SEL_UPL, /* segment descriptor priority level */
1544 1, /* segment descriptor present */
1546 1, /* default 32 vs 16 bit size */
1547 1 /* limit granularity (byte/page units)*/ },
1548 /* Null Descriptor - overwritten by call gate */
1549 { 0x0, /* segment base address */
1550 0x0, /* length - all address space */
1551 0, /* segment type */
1552 0, /* segment descriptor priority level */
1553 0, /* segment descriptor present */
1555 0, /* default 32 vs 16 bit size */
1556 0 /* limit granularity (byte/page units)*/ },
1557 /* Data Descriptor for user */
1558 { 0x0, /* segment base address */
1559 0xfffff, /* length - all address space */
1560 SDT_MEMRWA, /* segment type */
1561 SEL_UPL, /* segment descriptor priority level */
1562 1, /* segment descriptor present */
1564 1, /* default 32 vs 16 bit size */
1565 1 /* limit granularity (byte/page units)*/ },
1569 setidt(idx, func, typ, dpl, selec)
1576 struct gate_descriptor *ip;
1579 ip->gd_looffset = (int)func;
1580 ip->gd_selector = selec;
1586 ip->gd_hioffset = ((int)func)>>16 ;
1590 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1591 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1592 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1593 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1594 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1598 * Display the index and function name of any IDT entries that don't use
1599 * the default 'rsvd' entry point.
1601 DB_SHOW_COMMAND(idt, db_show_idt)
1603 struct gate_descriptor *ip;
1608 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1609 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1610 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1611 db_printf("%3d\t", idx);
1612 db_printsym(func, DB_STGY_PROC);
1619 /* Show privileged registers. */
1620 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1622 uint64_t idtr, gdtr;
1625 db_printf("idtr\t0x%08x/%04x\n",
1626 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1628 db_printf("gdtr\t0x%08x/%04x\n",
1629 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1630 db_printf("ldtr\t0x%04x\n", rldt());
1631 db_printf("tr\t0x%04x\n", rtr());
1632 db_printf("cr0\t0x%08x\n", rcr0());
1633 db_printf("cr2\t0x%08x\n", rcr2());
1634 db_printf("cr3\t0x%08x\n", rcr3());
1635 db_printf("cr4\t0x%08x\n", rcr4());
1641 struct segment_descriptor *sd;
1642 struct soft_segment_descriptor *ssd;
1644 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1645 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1646 ssd->ssd_type = sd->sd_type;
1647 ssd->ssd_dpl = sd->sd_dpl;
1648 ssd->ssd_p = sd->sd_p;
1649 ssd->ssd_def32 = sd->sd_def32;
1650 ssd->ssd_gran = sd->sd_gran;
1654 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1658 physmap_idx = *physmap_idxp;
1660 if (boothowto & RB_VERBOSE)
1661 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1662 smap->type, smap->base, smap->length);
1664 if (smap->type != SMAP_TYPE_MEMORY)
1667 if (smap->length == 0)
1671 if (smap->base >= 0xffffffff) {
1672 printf("%uK of memory above 4GB ignored\n",
1673 (u_int)(smap->length / 1024));
1678 for (i = 0; i <= physmap_idx; i += 2) {
1679 if (smap->base < physmap[i + 1]) {
1680 if (boothowto & RB_VERBOSE)
1682 "Overlapping or non-monotonic memory region, ignoring second region\n");
1687 if (smap->base == physmap[physmap_idx + 1]) {
1688 physmap[physmap_idx + 1] += smap->length;
1693 *physmap_idxp = physmap_idx;
1694 if (physmap_idx == PHYSMAP_SIZE) {
1696 "Too many segments in the physical address map, giving up\n");
1699 physmap[physmap_idx] = smap->base;
1700 physmap[physmap_idx + 1] = smap->base + smap->length;
1705 * Populate the (physmap) array with base/bound pairs describing the
1706 * available physical memory in the system, then test this memory and
1707 * build the phys_avail array describing the actually-available memory.
1709 * If we cannot accurately determine the physical memory map, then use
1710 * value from the 0xE801 call, and failing that, the RTC.
1712 * Total memory size may be set by the kernel environment variable
1713 * hw.physmem or the compile-time define MAXMEM.
1715 * XXX first should be vm_paddr_t.
1718 getmemsize(int first)
1720 int i, off, physmap_idx, pa_indx, da_indx;
1721 int hasbrokenint12, has_smap;
1722 u_long physmem_tunable;
1724 struct vm86frame vmf;
1725 struct vm86context vmc;
1726 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1728 struct bios_smap *smap, *smapbase, *smapend;
1730 quad_t dcons_addr, dcons_size;
1735 if (arch_i386_is_xbox) {
1737 * We queried the memory size before, so chop off 4MB for
1738 * the framebuffer and inform the OS of this.
1741 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
1748 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1749 bzero(&vmf, sizeof(vmf));
1750 bzero(physmap, sizeof(physmap));
1754 * Some newer BIOSes has broken INT 12H implementation which cause
1755 * kernel panic immediately. In this case, we need to scan SMAP
1756 * with INT 15:E820 first, then determine base memory size.
1758 if (hasbrokenint12) {
1763 * Perform "base memory" related probes & setup
1765 vm86_intcall(0x12, &vmf);
1766 basemem = vmf.vmf_ax;
1767 if (basemem > 640) {
1768 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1774 * XXX if biosbasemem is now < 640, there is a `hole'
1775 * between the end of base memory and the start of
1776 * ISA memory. The hole may be empty or it may
1777 * contain BIOS code or data. Map it read/write so
1778 * that the BIOS can write to it. (Memory from 0 to
1779 * the physical end of the kernel is mapped read-only
1780 * to begin with and then parts of it are remapped.
1781 * The parts that aren't remapped form holes that
1782 * remain read-only and are unused by the kernel.
1783 * The base memory area is below the physical end of
1784 * the kernel and right now forms a read-only hole.
1785 * The part of it from PAGE_SIZE to
1786 * (trunc_page(biosbasemem * 1024) - 1) will be
1787 * remapped and used by the kernel later.)
1789 * This code is similar to the code used in
1790 * pmap_mapdev, but since no memory needs to be
1791 * allocated we simply change the mapping.
1793 for (pa = trunc_page(basemem * 1024);
1794 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1795 pmap_kenter(KERNBASE + pa, pa);
1798 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1799 * the vm86 page table so that vm86 can scribble on them using
1800 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1801 * page 0, at least as initialized here?
1803 pte = (pt_entry_t *)vm86paddr;
1804 for (i = basemem / 4; i < 160; i++)
1805 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1809 * Fetch the memory map with INT 15:E820. First, check to see
1810 * if the loader supplied it and use that if so. Otherwise,
1811 * use vm86 to invoke the BIOS call directly.
1815 kmdp = preload_search_by_type("elf kernel");
1817 kmdp = preload_search_by_type("elf32 kernel");
1819 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1820 MODINFO_METADATA | MODINFOMD_SMAP);
1821 if (smapbase != NULL) {
1822 /* subr_module.c says:
1823 * "Consumer may safely assume that size value precedes data."
1824 * ie: an int32_t immediately precedes smap.
1826 smapsize = *((u_int32_t *)smapbase - 1);
1827 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1830 for (smap = smapbase; smap < smapend; smap++)
1831 if (!add_smap_entry(smap, physmap, &physmap_idx))
1835 * map page 1 R/W into the kernel page table so we can use it
1836 * as a buffer. The kernel will unmap this page later.
1838 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
1840 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE +
1842 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1846 vmf.vmf_eax = 0xE820;
1847 vmf.vmf_edx = SMAP_SIG;
1848 vmf.vmf_ecx = sizeof(struct bios_smap);
1849 i = vm86_datacall(0x15, &vmf, &vmc);
1850 if (i || vmf.vmf_eax != SMAP_SIG)
1853 if (!add_smap_entry(smap, physmap, &physmap_idx))
1855 } while (vmf.vmf_ebx != 0);
1859 * Perform "base memory" related probes & setup based on SMAP
1862 for (i = 0; i <= physmap_idx; i += 2) {
1863 if (physmap[i] == 0x00000000) {
1864 basemem = physmap[i + 1] / 1024;
1870 * XXX this function is horribly organized and has to the same
1871 * things that it does above here.
1875 if (basemem > 640) {
1877 "Preposterous BIOS basemem of %uK, truncating to 640K\n",
1883 * Let vm86 scribble on pages between basemem and
1884 * ISA_HOLE_START, as above.
1886 for (pa = trunc_page(basemem * 1024);
1887 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1888 pmap_kenter(KERNBASE + pa, pa);
1889 pte = (pt_entry_t *)vm86paddr;
1890 for (i = basemem / 4; i < 160; i++)
1891 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1894 if (physmap[1] != 0)
1898 * If we failed above, try memory map with INT 15:E801
1900 vmf.vmf_ax = 0xE801;
1901 if (vm86_intcall(0x15, &vmf) == 0) {
1902 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1906 vm86_intcall(0x15, &vmf);
1907 extmem = vmf.vmf_ax;
1910 * Prefer the RTC value for extended memory.
1912 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1917 * Special hack for chipsets that still remap the 384k hole when
1918 * there's 16MB of memory - this really confuses people that
1919 * are trying to use bus mastering ISA controllers with the
1920 * "16MB limit"; they only have 16MB, but the remapping puts
1921 * them beyond the limit.
1923 * If extended memory is between 15-16MB (16-17MB phys address range),
1926 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1930 physmap[1] = basemem * 1024;
1932 physmap[physmap_idx] = 0x100000;
1933 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1937 * Now, physmap contains a map of physical memory.
1941 /* make hole for AP bootstrap code */
1942 physmap[1] = mp_bootaddress(physmap[1]);
1946 * Maxmem isn't the "maximum memory", it's one larger than the
1947 * highest page of the physical address space. It should be
1948 * called something like "Maxphyspage". We may adjust this
1949 * based on ``hw.physmem'' and the results of the memory test.
1951 Maxmem = atop(physmap[physmap_idx + 1]);
1954 Maxmem = MAXMEM / 4;
1957 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1958 Maxmem = atop(physmem_tunable);
1961 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
1962 * the amount of memory in the system.
1964 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
1965 Maxmem = atop(physmap[physmap_idx + 1]);
1967 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1968 (boothowto & RB_VERBOSE))
1969 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1972 * If Maxmem has been increased beyond what the system has detected,
1973 * extend the last memory segment to the new limit.
1975 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1976 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1978 /* call pmap initialization to make new kernel address space */
1979 pmap_bootstrap(first);
1982 * Size up each available chunk of physical memory.
1984 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1987 phys_avail[pa_indx++] = physmap[0];
1988 phys_avail[pa_indx] = physmap[0];
1989 dump_avail[da_indx] = physmap[0];
1993 * Get dcons buffer address
1995 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1996 getenv_quad("dcons.size", &dcons_size) == 0)
2000 * physmap is in bytes, so when converting to page boundaries,
2001 * round up the start address and round down the end address.
2003 for (i = 0; i <= physmap_idx; i += 2) {
2006 end = ptoa((vm_paddr_t)Maxmem);
2007 if (physmap[i + 1] < end)
2008 end = trunc_page(physmap[i + 1]);
2009 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2010 int tmp, page_bad, full;
2011 int *ptr = (int *)CADDR1;
2015 * block out kernel memory as not available.
2017 if (pa >= KERNLOAD && pa < first)
2021 * block out dcons buffer
2024 && pa >= trunc_page(dcons_addr)
2025 && pa < dcons_addr + dcons_size)
2031 * map page into kernel: valid, read/write,non-cacheable
2033 *pte = pa | PG_V | PG_RW | PG_N;
2038 * Test for alternating 1's and 0's
2040 *(volatile int *)ptr = 0xaaaaaaaa;
2041 if (*(volatile int *)ptr != 0xaaaaaaaa)
2044 * Test for alternating 0's and 1's
2046 *(volatile int *)ptr = 0x55555555;
2047 if (*(volatile int *)ptr != 0x55555555)
2052 *(volatile int *)ptr = 0xffffffff;
2053 if (*(volatile int *)ptr != 0xffffffff)
2058 *(volatile int *)ptr = 0x0;
2059 if (*(volatile int *)ptr != 0x0)
2062 * Restore original value.
2067 * Adjust array of valid/good pages.
2069 if (page_bad == TRUE)
2072 * If this good page is a continuation of the
2073 * previous set of good pages, then just increase
2074 * the end pointer. Otherwise start a new chunk.
2075 * Note that "end" points one higher than end,
2076 * making the range >= start and < end.
2077 * If we're also doing a speculative memory
2078 * test and we at or past the end, bump up Maxmem
2079 * so that we keep going. The first bad page
2080 * will terminate the loop.
2082 if (phys_avail[pa_indx] == pa) {
2083 phys_avail[pa_indx] += PAGE_SIZE;
2086 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2088 "Too many holes in the physical address space, giving up\n");
2093 phys_avail[pa_indx++] = pa; /* start */
2094 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2098 if (dump_avail[da_indx] == pa) {
2099 dump_avail[da_indx] += PAGE_SIZE;
2102 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2106 dump_avail[da_indx++] = pa; /* start */
2107 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2119 * The last chunk must contain at least one page plus the message
2120 * buffer to avoid complicating other code (message buffer address
2121 * calculation, etc.).
2123 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2124 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
2125 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2126 phys_avail[pa_indx--] = 0;
2127 phys_avail[pa_indx--] = 0;
2130 Maxmem = atop(phys_avail[pa_indx]);
2132 /* Trim off space for the message buffer. */
2133 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
2135 /* Map the message buffer. */
2136 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2137 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2145 struct gate_descriptor *gdp;
2146 int gsel_tss, metadata_missing, x;
2149 thread0.td_kstack = proc0kstack;
2150 thread0.td_pcb = (struct pcb *)
2151 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2154 * This may be done better later if it gets more high level
2155 * components in it. If so just link td->td_proc here.
2157 proc_linkup0(&proc0, &thread0);
2159 metadata_missing = 0;
2160 if (bootinfo.bi_modulep) {
2161 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2162 preload_bootstrap_relocate(KERNBASE);
2164 metadata_missing = 1;
2167 kern_envp = static_env;
2168 else if (bootinfo.bi_envp)
2169 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2171 /* Init basic tunables, hz etc */
2175 * Make gdt memory segments. All segments cover the full 4GB
2176 * of address space and permissions are enforced at page level.
2178 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2179 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2180 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2181 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2182 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2183 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2186 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2187 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2188 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2190 for (x = 0; x < NGDT; x++)
2191 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2193 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2194 r_gdt.rd_base = (int) gdt;
2195 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2198 pcpu_init(pc, 0, sizeof(struct pcpu));
2199 PCPU_SET(prvspace, pc);
2200 PCPU_SET(curthread, &thread0);
2201 PCPU_SET(curpcb, thread0.td_pcb);
2204 * Initialize mutexes.
2206 * icu_lock: in order to allow an interrupt to occur in a critical
2207 * section, to set pcpu->ipending (etc...) properly, we
2208 * must be able to get the icu lock, so it can't be
2212 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2214 /* make ldt memory segments */
2215 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2216 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2217 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2218 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2220 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2222 PCPU_SET(currentldt, _default_ldt);
2225 for (x = 0; x < NIDT; x++)
2226 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2227 GSEL(GCODE_SEL, SEL_KPL));
2228 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2229 GSEL(GCODE_SEL, SEL_KPL));
2230 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2231 GSEL(GCODE_SEL, SEL_KPL));
2232 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2233 GSEL(GCODE_SEL, SEL_KPL));
2234 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2235 GSEL(GCODE_SEL, SEL_KPL));
2236 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2237 GSEL(GCODE_SEL, SEL_KPL));
2238 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2239 GSEL(GCODE_SEL, SEL_KPL));
2240 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2241 GSEL(GCODE_SEL, SEL_KPL));
2242 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2243 , GSEL(GCODE_SEL, SEL_KPL));
2244 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2245 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2246 GSEL(GCODE_SEL, SEL_KPL));
2247 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2248 GSEL(GCODE_SEL, SEL_KPL));
2249 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2250 GSEL(GCODE_SEL, SEL_KPL));
2251 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2252 GSEL(GCODE_SEL, SEL_KPL));
2253 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2254 GSEL(GCODE_SEL, SEL_KPL));
2255 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2256 GSEL(GCODE_SEL, SEL_KPL));
2257 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2258 GSEL(GCODE_SEL, SEL_KPL));
2259 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2260 GSEL(GCODE_SEL, SEL_KPL));
2261 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2262 GSEL(GCODE_SEL, SEL_KPL));
2263 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2264 GSEL(GCODE_SEL, SEL_KPL));
2265 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2266 GSEL(GCODE_SEL, SEL_KPL));
2268 r_idt.rd_limit = sizeof(idt0) - 1;
2269 r_idt.rd_base = (int) idt;
2274 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2275 * This should be 0x10de / 0x02a5.
2277 * This is exactly what Linux does.
2279 outl(0xcf8, 0x80000000);
2280 if (inl(0xcfc) == 0x02a510de) {
2281 arch_i386_is_xbox = 1;
2282 pic16l_setled(XBOX_LED_GREEN);
2285 * We are an XBOX, but we may have either 64MB or 128MB of
2286 * memory. The PCI host bridge should be programmed for this,
2287 * so we just query it.
2289 outl(0xcf8, 0x80000084);
2290 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2295 * Initialize the i8254 before the console so that console
2296 * initialization can use DELAY().
2301 * Initialize the console before we print anything out.
2305 if (metadata_missing)
2306 printf("WARNING: loader(8) metadata is missing!\n");
2314 ksym_start = bootinfo.bi_symtab;
2315 ksym_end = bootinfo.bi_esymtab;
2321 if (boothowto & RB_KDB)
2322 kdb_enter_why(KDB_WHY_BOOTFLAGS,
2323 "Boot flags requested debugger");
2326 finishidentcpu(); /* Final stage of CPU initialization */
2327 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2328 GSEL(GCODE_SEL, SEL_KPL));
2329 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2330 GSEL(GCODE_SEL, SEL_KPL));
2331 initializecpu(); /* Initialize CPU registers */
2333 /* make an initial tss so cpu can get interrupt stack on syscall! */
2334 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2335 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2336 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2337 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2338 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2339 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2340 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2341 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2344 /* pointer to selector slot for %fs/%gs */
2345 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2347 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2348 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2349 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2350 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2352 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2354 dblfault_tss.tss_cr3 = (int)IdlePTD;
2356 dblfault_tss.tss_eip = (int)dblfault_handler;
2357 dblfault_tss.tss_eflags = PSL_KERNEL;
2358 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2359 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2360 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2361 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2362 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2366 init_param2(physmem);
2368 /* now running on new page tables, configured,and u/iom is accessible */
2370 msgbufinit(msgbufp, MSGBUF_SIZE);
2372 /* make a call gate to reenter kernel with */
2373 gdp = &ldt[LSYS5CALLS_SEL].gd;
2375 x = (int) &IDTVEC(lcall_syscall);
2376 gdp->gd_looffset = x;
2377 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2379 gdp->gd_type = SDT_SYS386CGT;
2380 gdp->gd_dpl = SEL_UPL;
2382 gdp->gd_hioffset = x >> 16;
2384 /* XXX does this work? */
2386 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2387 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2389 /* transfer to user mode */
2391 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2392 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2394 /* setup proc 0's pcb */
2395 thread0.td_pcb->pcb_flags = 0;
2397 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2399 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2401 thread0.td_pcb->pcb_ext = 0;
2402 thread0.td_frame = &proc0_tf;
2406 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2409 pcpu->pc_acpi_id = 0xffffffff;
2413 spinlock_enter(void)
2418 if (td->td_md.md_spinlock_count == 0)
2419 td->td_md.md_saved_flags = intr_disable();
2420 td->td_md.md_spinlock_count++;
2431 td->td_md.md_spinlock_count--;
2432 if (td->td_md.md_spinlock_count == 0)
2433 intr_restore(td->td_md.md_saved_flags);
2436 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2437 static void f00f_hack(void *unused);
2438 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2441 f00f_hack(void *unused)
2443 struct gate_descriptor *new_idt;
2451 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2453 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2455 panic("kmem_alloc returned 0");
2457 /* Put the problematic entry (#6) at the end of the lower page. */
2458 new_idt = (struct gate_descriptor*)
2459 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2460 bcopy(idt, new_idt, sizeof(idt0));
2461 r_idt.rd_base = (u_int)new_idt;
2464 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2465 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2466 panic("vm_map_protect failed");
2468 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2471 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2472 * we want to start a backtrace from the function that caused us to enter
2473 * the debugger. We have the context in the trapframe, but base the trace
2474 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2475 * enough for a backtrace.
2478 makectx(struct trapframe *tf, struct pcb *pcb)
2481 pcb->pcb_edi = tf->tf_edi;
2482 pcb->pcb_esi = tf->tf_esi;
2483 pcb->pcb_ebp = tf->tf_ebp;
2484 pcb->pcb_ebx = tf->tf_ebx;
2485 pcb->pcb_eip = tf->tf_eip;
2486 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2490 ptrace_set_pc(struct thread *td, u_long addr)
2493 td->td_frame->tf_eip = addr;
2498 ptrace_single_step(struct thread *td)
2500 td->td_frame->tf_eflags |= PSL_T;
2505 ptrace_clear_single_step(struct thread *td)
2507 td->td_frame->tf_eflags &= ~PSL_T;
2512 fill_regs(struct thread *td, struct reg *regs)
2515 struct trapframe *tp;
2519 regs->r_fs = tp->tf_fs;
2520 regs->r_es = tp->tf_es;
2521 regs->r_ds = tp->tf_ds;
2522 regs->r_edi = tp->tf_edi;
2523 regs->r_esi = tp->tf_esi;
2524 regs->r_ebp = tp->tf_ebp;
2525 regs->r_ebx = tp->tf_ebx;
2526 regs->r_edx = tp->tf_edx;
2527 regs->r_ecx = tp->tf_ecx;
2528 regs->r_eax = tp->tf_eax;
2529 regs->r_eip = tp->tf_eip;
2530 regs->r_cs = tp->tf_cs;
2531 regs->r_eflags = tp->tf_eflags;
2532 regs->r_esp = tp->tf_esp;
2533 regs->r_ss = tp->tf_ss;
2534 regs->r_gs = pcb->pcb_gs;
2539 set_regs(struct thread *td, struct reg *regs)
2542 struct trapframe *tp;
2545 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2546 !CS_SECURE(regs->r_cs))
2549 tp->tf_fs = regs->r_fs;
2550 tp->tf_es = regs->r_es;
2551 tp->tf_ds = regs->r_ds;
2552 tp->tf_edi = regs->r_edi;
2553 tp->tf_esi = regs->r_esi;
2554 tp->tf_ebp = regs->r_ebp;
2555 tp->tf_ebx = regs->r_ebx;
2556 tp->tf_edx = regs->r_edx;
2557 tp->tf_ecx = regs->r_ecx;
2558 tp->tf_eax = regs->r_eax;
2559 tp->tf_eip = regs->r_eip;
2560 tp->tf_cs = regs->r_cs;
2561 tp->tf_eflags = regs->r_eflags;
2562 tp->tf_esp = regs->r_esp;
2563 tp->tf_ss = regs->r_ss;
2564 pcb->pcb_gs = regs->r_gs;
2568 #ifdef CPU_ENABLE_SSE
2570 fill_fpregs_xmm(sv_xmm, sv_87)
2571 struct savexmm *sv_xmm;
2572 struct save87 *sv_87;
2574 register struct env87 *penv_87 = &sv_87->sv_env;
2575 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2578 bzero(sv_87, sizeof(*sv_87));
2580 /* FPU control/status */
2581 penv_87->en_cw = penv_xmm->en_cw;
2582 penv_87->en_sw = penv_xmm->en_sw;
2583 penv_87->en_tw = penv_xmm->en_tw;
2584 penv_87->en_fip = penv_xmm->en_fip;
2585 penv_87->en_fcs = penv_xmm->en_fcs;
2586 penv_87->en_opcode = penv_xmm->en_opcode;
2587 penv_87->en_foo = penv_xmm->en_foo;
2588 penv_87->en_fos = penv_xmm->en_fos;
2591 for (i = 0; i < 8; ++i)
2592 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2596 set_fpregs_xmm(sv_87, sv_xmm)
2597 struct save87 *sv_87;
2598 struct savexmm *sv_xmm;
2600 register struct env87 *penv_87 = &sv_87->sv_env;
2601 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2604 /* FPU control/status */
2605 penv_xmm->en_cw = penv_87->en_cw;
2606 penv_xmm->en_sw = penv_87->en_sw;
2607 penv_xmm->en_tw = penv_87->en_tw;
2608 penv_xmm->en_fip = penv_87->en_fip;
2609 penv_xmm->en_fcs = penv_87->en_fcs;
2610 penv_xmm->en_opcode = penv_87->en_opcode;
2611 penv_xmm->en_foo = penv_87->en_foo;
2612 penv_xmm->en_fos = penv_87->en_fos;
2615 for (i = 0; i < 8; ++i)
2616 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2618 #endif /* CPU_ENABLE_SSE */
2621 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2623 #ifdef CPU_ENABLE_SSE
2625 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm,
2626 (struct save87 *)fpregs);
2629 #endif /* CPU_ENABLE_SSE */
2630 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2635 set_fpregs(struct thread *td, struct fpreg *fpregs)
2637 #ifdef CPU_ENABLE_SSE
2639 set_fpregs_xmm((struct save87 *)fpregs,
2640 &td->td_pcb->pcb_save.sv_xmm);
2643 #endif /* CPU_ENABLE_SSE */
2644 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2649 * Get machine context.
2652 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2654 struct trapframe *tp;
2658 PROC_LOCK(curthread->td_proc);
2659 mcp->mc_onstack = sigonstack(tp->tf_esp);
2660 PROC_UNLOCK(curthread->td_proc);
2661 mcp->mc_gs = td->td_pcb->pcb_gs;
2662 mcp->mc_fs = tp->tf_fs;
2663 mcp->mc_es = tp->tf_es;
2664 mcp->mc_ds = tp->tf_ds;
2665 mcp->mc_edi = tp->tf_edi;
2666 mcp->mc_esi = tp->tf_esi;
2667 mcp->mc_ebp = tp->tf_ebp;
2668 mcp->mc_isp = tp->tf_isp;
2669 mcp->mc_eflags = tp->tf_eflags;
2670 if (flags & GET_MC_CLEAR_RET) {
2673 mcp->mc_eflags &= ~PSL_C;
2675 mcp->mc_eax = tp->tf_eax;
2676 mcp->mc_edx = tp->tf_edx;
2678 mcp->mc_ebx = tp->tf_ebx;
2679 mcp->mc_ecx = tp->tf_ecx;
2680 mcp->mc_eip = tp->tf_eip;
2681 mcp->mc_cs = tp->tf_cs;
2682 mcp->mc_esp = tp->tf_esp;
2683 mcp->mc_ss = tp->tf_ss;
2684 mcp->mc_len = sizeof(*mcp);
2685 get_fpcontext(td, mcp);
2690 * Set machine context.
2692 * However, we don't set any but the user modifiable flags, and we won't
2693 * touch the cs selector.
2696 set_mcontext(struct thread *td, const mcontext_t *mcp)
2698 struct trapframe *tp;
2702 if (mcp->mc_len != sizeof(*mcp))
2704 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2705 (tp->tf_eflags & ~PSL_USERCHANGE);
2706 if ((ret = set_fpcontext(td, mcp)) == 0) {
2707 tp->tf_fs = mcp->mc_fs;
2708 tp->tf_es = mcp->mc_es;
2709 tp->tf_ds = mcp->mc_ds;
2710 tp->tf_edi = mcp->mc_edi;
2711 tp->tf_esi = mcp->mc_esi;
2712 tp->tf_ebp = mcp->mc_ebp;
2713 tp->tf_ebx = mcp->mc_ebx;
2714 tp->tf_edx = mcp->mc_edx;
2715 tp->tf_ecx = mcp->mc_ecx;
2716 tp->tf_eax = mcp->mc_eax;
2717 tp->tf_eip = mcp->mc_eip;
2718 tp->tf_eflags = eflags;
2719 tp->tf_esp = mcp->mc_esp;
2720 tp->tf_ss = mcp->mc_ss;
2721 td->td_pcb->pcb_gs = mcp->mc_gs;
2728 get_fpcontext(struct thread *td, mcontext_t *mcp)
2731 mcp->mc_fpformat = _MC_FPFMT_NODEV;
2732 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2734 union savefpu *addr;
2737 * XXX mc_fpstate might be misaligned, since its declaration is not
2738 * unportabilized using __attribute__((aligned(16))) like the
2739 * declaration of struct savemm, and anyway, alignment doesn't work
2740 * for auto variables since we don't use gcc's pessimal stack
2741 * alignment. Work around this by abusing the spare fields after
2744 * XXX unpessimize most cases by only aligning when fxsave might be
2745 * called, although this requires knowing too much about
2746 * npxgetregs()'s internals.
2748 addr = (union savefpu *)&mcp->mc_fpstate;
2749 if (td == PCPU_GET(fpcurthread) &&
2750 #ifdef CPU_ENABLE_SSE
2753 ((uintptr_t)(void *)addr & 0xF)) {
2755 addr = (void *)((char *)addr + 4);
2756 while ((uintptr_t)(void *)addr & 0xF);
2758 mcp->mc_ownedfp = npxgetregs(td, addr);
2759 if (addr != (union savefpu *)&mcp->mc_fpstate) {
2760 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2761 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
2763 mcp->mc_fpformat = npxformat();
2768 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2770 union savefpu *addr;
2772 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2774 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2775 mcp->mc_fpformat != _MC_FPFMT_XMM)
2777 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2778 /* We don't care what state is left in the FPU or PCB. */
2780 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2781 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2782 /* XXX align as above. */
2783 addr = (union savefpu *)&mcp->mc_fpstate;
2784 if (td == PCPU_GET(fpcurthread) &&
2785 #ifdef CPU_ENABLE_SSE
2788 ((uintptr_t)(void *)addr & 0xF)) {
2790 addr = (void *)((char *)addr + 4);
2791 while ((uintptr_t)(void *)addr & 0xF);
2792 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
2795 #ifdef CPU_ENABLE_SSE
2797 addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask;
2800 * XXX we violate the dubious requirement that npxsetregs()
2801 * be called with interrupts disabled.
2803 npxsetregs(td, addr);
2806 * Don't bother putting things back where they were in the
2807 * misaligned case, since we know that the caller won't use
2816 fpstate_drop(struct thread *td)
2822 if (PCPU_GET(fpcurthread) == td)
2826 * XXX force a full drop of the npx. The above only drops it if we
2827 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
2829 * XXX I don't much like npxgetregs()'s semantics of doing a full
2830 * drop. Dropping only to the pcb matches fnsave's behaviour.
2831 * We only need to drop to !PCB_INITDONE in sendsig(). But
2832 * sendsig() is the only caller of npxgetregs()... perhaps we just
2833 * have too many layers.
2835 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
2840 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2845 dbregs->dr[0] = rdr0();
2846 dbregs->dr[1] = rdr1();
2847 dbregs->dr[2] = rdr2();
2848 dbregs->dr[3] = rdr3();
2849 dbregs->dr[4] = rdr4();
2850 dbregs->dr[5] = rdr5();
2851 dbregs->dr[6] = rdr6();
2852 dbregs->dr[7] = rdr7();
2855 dbregs->dr[0] = pcb->pcb_dr0;
2856 dbregs->dr[1] = pcb->pcb_dr1;
2857 dbregs->dr[2] = pcb->pcb_dr2;
2858 dbregs->dr[3] = pcb->pcb_dr3;
2861 dbregs->dr[6] = pcb->pcb_dr6;
2862 dbregs->dr[7] = pcb->pcb_dr7;
2868 set_dbregs(struct thread *td, struct dbreg *dbregs)
2874 load_dr0(dbregs->dr[0]);
2875 load_dr1(dbregs->dr[1]);
2876 load_dr2(dbregs->dr[2]);
2877 load_dr3(dbregs->dr[3]);
2878 load_dr4(dbregs->dr[4]);
2879 load_dr5(dbregs->dr[5]);
2880 load_dr6(dbregs->dr[6]);
2881 load_dr7(dbregs->dr[7]);
2884 * Don't let an illegal value for dr7 get set. Specifically,
2885 * check for undefined settings. Setting these bit patterns
2886 * result in undefined behaviour and can lead to an unexpected
2889 for (i = 0; i < 4; i++) {
2890 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2892 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
2899 * Don't let a process set a breakpoint that is not within the
2900 * process's address space. If a process could do this, it
2901 * could halt the system by setting a breakpoint in the kernel
2902 * (if ddb was enabled). Thus, we need to check to make sure
2903 * that no breakpoints are being enabled for addresses outside
2904 * process's address space.
2906 * XXX - what about when the watched area of the user's
2907 * address space is written into from within the kernel
2908 * ... wouldn't that still cause a breakpoint to be generated
2909 * from within kernel mode?
2912 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2913 /* dr0 is enabled */
2914 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2918 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2919 /* dr1 is enabled */
2920 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2924 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2925 /* dr2 is enabled */
2926 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2930 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2931 /* dr3 is enabled */
2932 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2936 pcb->pcb_dr0 = dbregs->dr[0];
2937 pcb->pcb_dr1 = dbregs->dr[1];
2938 pcb->pcb_dr2 = dbregs->dr[2];
2939 pcb->pcb_dr3 = dbregs->dr[3];
2940 pcb->pcb_dr6 = dbregs->dr[6];
2941 pcb->pcb_dr7 = dbregs->dr[7];
2943 pcb->pcb_flags |= PCB_DBREGS;
2950 * Return > 0 if a hardware breakpoint has been hit, and the
2951 * breakpoint was in user space. Return 0, otherwise.
2954 user_dbreg_trap(void)
2956 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2957 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2958 int nbp; /* number of breakpoints that triggered */
2959 caddr_t addr[4]; /* breakpoint addresses */
2963 if ((dr7 & 0x000000ff) == 0) {
2965 * all GE and LE bits in the dr7 register are zero,
2966 * thus the trap couldn't have been caused by the
2967 * hardware debug registers
2974 bp = dr6 & 0x0000000f;
2978 * None of the breakpoint bits are set meaning this
2979 * trap was not caused by any of the debug registers
2985 * at least one of the breakpoints were hit, check to see
2986 * which ones and if any of them are user space addresses
2990 addr[nbp++] = (caddr_t)rdr0();
2993 addr[nbp++] = (caddr_t)rdr1();
2996 addr[nbp++] = (caddr_t)rdr2();
2999 addr[nbp++] = (caddr_t)rdr3();
3002 for (i = 0; i < nbp; i++) {
3003 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3005 * addr[i] is in user space
3012 * None of the breakpoints are in user space.
3018 #include <machine/apicvar.h>
3021 * Provide stub functions so that the MADT APIC enumerator in the acpi
3022 * kernel module will link against a kernel without 'device apic'.
3024 * XXX - This is a gross hack.
3027 apic_register_enumerator(struct apic_enumerator *enumerator)
3032 ioapic_create(vm_paddr_t addr, int32_t apic_id, int intbase)
3038 ioapic_disable_pin(void *cookie, u_int pin)
3044 ioapic_get_vector(void *cookie, u_int pin)
3050 ioapic_register(void *cookie)
3055 ioapic_remap_vector(void *cookie, u_int pin, int vector)
3061 ioapic_set_extint(void *cookie, u_int pin)
3067 ioapic_set_nmi(void *cookie, u_int pin)
3073 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
3079 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
3085 lapic_create(u_int apic_id, int boot_cpu)
3090 lapic_init(vm_paddr_t addr)
3095 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
3101 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
3107 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger)
3116 * Provide inb() and outb() as functions. They are normally only
3117 * available as macros calling inlined functions, thus cannot be
3118 * called from the debugger.
3120 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
3126 /* silence compiler warnings */
3128 void outb(u_int, u_char);
3135 * We use %%dx and not %1 here because i/o is done at %dx and not at
3136 * %edx, while gcc generates inferior code (movw instead of movl)
3137 * if we tell it to load (u_short) port.
3139 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
3144 outb(u_int port, u_char data)
3148 * Use an unnecessary assignment to help gcc's register allocator.
3149 * This make a large difference for gcc-1.40 and a tiny difference
3150 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
3151 * best results. gcc-2.6.0 can't handle this.
3154 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));